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81. 发明申请

US20050009296A1 Method for manufacturing a multilayer semiconductor structure that includes an irregular layer 有权
标题翻译：一种制造包括不规则层的多层半导体结构的方法
公开(公告)号：US20050009296A1
公开(公告)日：2005-01-13
申请号：US10728341
申请日：2003-12-03
申请人： Bruno Ghyselen , Takeshi Akatsu
发明人： Bruno Ghyselen , Takeshi Akatsu
IPC分类号： H01L21/30 , H01L21/762
CPC分类号： H01L21/76254
摘要： A method for manufacturing a multilayer semiconductor structure that includes an irregular layer. In an embodiment, the method includes providing a layer of irregular material on a donor substrate. The irregular layer has a flat face at an interface with the donor substrate, and has an opposite, irregular face. Next; a weakened zone is created at a predetermined depth within the donor substrate. An intermediate layer of material is then provided that covers the irregular face of the irregular layer, the intermediate layer providing a substantially flat surface. The substantially flat surface of the intermediate layer is then bonded to a receiver substrate, and the donor substrate is detached along the weakened zone to form the multilayer semiconductor structure. The multilayer structure includes an useful layer, the irregular layer, the intermediate layer and the receiver substrate, wherein all of the irregular material of the irregular layer is present in the structure.
摘要翻译：一种制造包括不规则层的多层半导体结构的方法。在一个实施例中，该方法包括在施主衬底上提供不规则材料层。不规则层在与施主衬底的界面处具有平坦的表面，并且具有相反的不规则面。下一个; 在供体衬底内的预定深度产生弱化区。然后提供覆盖不规则层的不规则面的中间材料层，中间层提供基本平坦的表面。然后将中间层的基本上平坦的表面接合到接收器基板，并且施主基板沿着弱化区域分离以形成多层半导体结构。多层结构包括有用层，不规则层，中间层和接收衬底，其中不规则层的所有不规则材料都存在于结构中。

82. 发明申请

US20100314628A1 PROCESS FOR TRANSFERRING A LAYER OF STRAINED SEMICONDUCTOR MATERIAL 有权
标题翻译：用于传输应变半导体材料层的方法
公开(公告)号：US20100314628A1
公开(公告)日：2010-12-16
申请号：US12862471
申请日：2010-08-24
申请人： Bruno Ghyselen , Daniel Bensahel , Thomas Skotnicki
发明人： Bruno Ghyselen , Daniel Bensahel , Thomas Skotnicki
IPC分类号： H01L29/24 , H01L29/12
CPC分类号： H01L29/1054 , H01L21/76254 , H01L21/76259 , Y10S438/938
摘要： Semiconductor wafers having a thin layer of strained semiconductor material. These structures include a substrate; an oxide layer upon the substrate; a silicon carbide (SiC) layer upon the oxide layer, and a strained layer of a semiconductor material in a strained state upon the silicon carbide layer, or a matching layer upon the donor substrate that is made from a material that induces strain in subsequent epitaxially grown layers thereon; a strained layer of a semiconductor material of defined thickness in a strained state; and an insulating or semi-insulating layer upon the strained layer in a thickness that retains the strained state of the strained layer. The insulating or semi-insulating layers are made of silicon carbide or oxides and act to retain strain in the strained layer.
摘要翻译：半导体晶片具有应变半导体材料的薄层。这些结构包括底物; 基底上的氧化物层; 氧化物层上的碳化硅（SiC）层，以及在碳化硅层上处于应变状态的半导体材料的应变层，或者由施主衬底上的由随后的外延生长引起应变的材料制成的匹配层生长层; 在应变状态下具有规定厚度的半导体材料的应变层; 以及在应变层上的绝缘或半绝缘层，其厚度保持应变层的应变状态。绝缘层或半绝缘层由碳化硅或氧化物制成并用于将应变保留在应变层中。

83. 发明申请

US20100210090A1 FORMING STRUCTURES THAT INCLUDE A RELAXED OR PSEUDO-RELAXED LAYER ON A SUBSTRATE 有权
标题翻译：在基材上包含松散或松散层的形成结构
公开(公告)号：US20100210090A1
公开(公告)日：2010-08-19
申请号：US12769299
申请日：2010-04-28
申请人： Bruno Ghyselen , Carlos Mazure , Emmanuel Arene
发明人： Bruno Ghyselen , Carlos Mazure , Emmanuel Arene
IPC分类号： H01L21/20
CPC分类号： H01L21/76259 , H01L21/324 , H01L21/76254 , H01L2221/68363
摘要： A method for forming a structure that includes a relaxed or pseudo-relaxed layer on a substrate. The method includes the steps of growing an elastically stressed layer of semiconductor material on a donor substrate; forming a glassy layer of a viscous material on the stressed layer; removing a portion of the donor substrate to form a structure that includes the glassy layer, the stressed layer and a surface layer of donor substrate material; patterning the stressed layer; and heat treating the structure at a temperature of at least a viscosity temperature of the glassy layer to relax the stressed layer and form the relaxed or pseudo-relaxed layer of the structure.
摘要翻译：一种用于形成在衬底上包括松弛或假松弛层的结构的方法。该方法包括在施主衬底上生长半导体材料的弹性应力层的步骤; 在应力层上形成粘性材料的玻璃状层; 去除供体衬底的一部分以形成包括玻璃层，应力层和供体衬底材料的表面层的结构; 图案化应力层; 并且在至少玻璃质层的粘度温度的温度下对该结构进行热处理，以使应力层松弛以形成结构的松弛或假松弛层。

84. 发明申请

US20100167500A1 METHOD OF RECYCLING AN EPITAXIED DONOR WAFER 审中-公开
标题翻译：回收离子沉淀法的方法
公开(公告)号：US20100167500A1
公开(公告)日：2010-07-01
申请号：US12718804
申请日：2010-03-05
申请人： Nabil Chhaimi , Eric Guiot , Patrick Reynaud , Bruno Ghyselen , Cécile Aulnette , Bénédite Osternaud , Takeshi Akatsu , Yves-Matthieu Le Vaillant
发明人： Nabil Chhaimi , Eric Guiot , Patrick Reynaud , Bruno Ghyselen , Cécile Aulnette , Bénédite Osternaud , Takeshi Akatsu , Yves-Matthieu Le Vaillant
IPC分类号： H01L21/78
CPC分类号： H01L21/76254 , H01L21/02032
摘要： A method for forming a semiconductor structure that includes a thin layer of semiconductor material on a receiver wafer is disclosed. The method includes removing a thickness of material from a donor wafer, which comprises a support substrate and an epitaxial layer, for surface preparation and transferring a portion of the epitaxial layer from the donor wafer to the receiver wafer. The thickness removed during the surface preparation is adapted to enable formation of a new semiconductor structure from the remaining epitaxial portion of the donor wafer.
摘要翻译：公开了一种在接收器晶片上形成半导体材料薄层的半导体结构的方法。该方法包括从施主晶片去除材料的厚度，其包括支撑衬底和外延层，用于表面制备并将外延层的一部分从施主晶片转移到接收器晶片。在表面处理期间去除的厚度适于能够从施主晶片的剩余外延部分形成新的半导体结构。

85. 发明申请

US20090325362A1 METHOD OF RECYCLING AN EPITAXIED DONOR WAFER 审中-公开
标题翻译：回收离子沉淀法的方法
公开(公告)号：US20090325362A1
公开(公告)日：2009-12-31
申请号：US12503537
申请日：2009-07-15
申请人： Nabil Chhaimi , Eric Guiot , Patrick Reynaud , Bruno Ghyselen , Cécile Aulnette , Bénédicte Osternaud , Takeshi Akatsu , Bruce Faure
发明人： Nabil Chhaimi , Eric Guiot , Patrick Reynaud , Bruno Ghyselen , Cécile Aulnette , Bénédicte Osternaud , Takeshi Akatsu , Bruce Faure
IPC分类号： H01L21/762
CPC分类号： H01L21/76254 , H01L21/02032
摘要： A method for forming a semiconductor structure that includes a thin layer of semiconductor material on a receiver wafer is disclosed. The method includes removing a thickness of material from a donor wafer, which comprises a support substrate and an epitaxial layer, for surface preparation and transferring a portion of the epitaxial layer from the donor wafer to the receiver wafer. The thickness removed during the surface preparation is adapted to enable formation of a new semiconductor structure from the remaining epitaxial portion of the donor wafer.
摘要翻译：公开了一种在接收器晶片上形成半导体材料薄层的半导体结构的方法。该方法包括从施主晶片去除材料的厚度，其包括支撑衬底和外延层，用于表面制备并将外延层的一部分从施主晶片转移到接收器晶片。在表面处理期间去除的厚度适于能够从施主晶片的剩余外延部分形成新的半导体结构。

86. 发明授权

US07615463B2 Method for making thin layers containing microcomponents 有权
标题翻译：制备含有微量元素的薄层的方法
公开(公告)号：US07615463B2
公开(公告)日：2009-11-10
申请号：US10492343
申请日：2002-10-08
申请人： Bernard Aspar , Christelle Lagahe , Bruno Ghyselen
发明人： Bernard Aspar , Christelle Lagahe , Bruno Ghyselen
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/76254 , H01L2221/68322
摘要： The invention concerns a method for making thin layers containing microcomponents using a substrate. The method includes the following steps: a) provides a substrate; b) local implantation of at least a gaseous species in said substrate perpendicular to a plurality of implantation zones defined on the surface of the substrate, avoiding, by adequate selection of the depth and the shape of said implantation zones, degradation of said surface of the substrate during the step c); c) producing microcomponents in the surface layer of the substrate delimited by the implanting depth; and d) separating the substrate in two parts, one part containing the surface layer including said microcomponents, and the other the rest of the substrate. The invention is useful for producing microcomponents to be integrate on supports different from the those used for their manufacture.
摘要翻译：本发明涉及一种使用底物制备含微量组分的薄层的方法。该方法包括以下步骤：a）提供衬底; b）在所述衬底中至少一种气态物质的局部植入垂直于限定在衬底的表面上的多个注入区，避免通过充分选择所述注入区的深度和形状，使所述衬底的所述表面退化在步骤c）期间的底物; c）在由植入深度限定的衬底的表面层中产生微组件; 以及d）将基片分成两部分，一部分含有包含所述微组分的表面层，另一部分含有底物的其余部分。本发明可用于生产微型组件，以集成在与用于其制造的那些不同的支架上。

87. 发明授权

US07544586B2 Method of fabricating chips and an associated support 有权
标题翻译：制造芯片和相关支持的方法
公开(公告)号：US07544586B2
公开(公告)日：2009-06-09
申请号：US11136252
申请日：2005-05-23
申请人： Bruno Ghyselen , Olivier Rayssac
发明人： Bruno Ghyselen , Olivier Rayssac
IPC分类号： H01L21/00
CPC分类号： H01L21/78 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a plurality of chips, with each chip including at least one circuit. This method includes the successive steps of creating chips on a layer of semiconductor material that is integral with a substrate; forming a weakening pattern corresponding to a predetermined cutting pattern on a support; transferring the chip-containing layer from the substrate to the support; and forming individual chips by cutting the chip-containing layer in accordance with the predetermined cutting pattern. Also, an assembly for fabricating a plurality of chips, each chip including at least one circuit provided on a layer of semiconductor material that is carried by a support that includes a weakening pattern corresponding to a predetermined cutting pattern for forming individual chips, with the support being obtained by assembling a plurality of individual tiles with boundaries between the individual tiles corresponding to the weakening pattern. The tiles may be assembled by disposing a binder between the individual tiles, with the binder ensuring temporary bonding of the tiles.
摘要翻译：一种制造多个芯片的方法，每个芯片包括至少一个电路。该方法包括在与衬底成一体的半导体材料层上产生芯片的连续步骤; 在支撑件上形成对应于预定切割图案的削弱图案; 将含芯片的层从基底转移到载体上; 以及通过根据预定的切割图案切割含芯片层而形成单独的芯片。另外，用于制造多个芯片的组件，每个芯片包括至少一个电路，该至少一个电路设置在由支撑体承载的半导体材料层上，所述支撑件包括对应于用于形成单独芯片的预定切割图案的弱化图案，支撑件通过组合具有对应于弱化图案的各个瓦片之间的边界的多个单独的瓦片来获得。可以通过在各个瓦片之间设置粘合剂来组装瓦片，粘合剂确保瓦片的临时粘合。

88. 发明授权

US07476930B2 Multi-gate FET with multi-layer channel 失效
标题翻译：多栅极FET多层通道
公开(公告)号：US07476930B2
公开(公告)日：2009-01-13
申请号：US11773816
申请日：2007-07-05
申请人： Fréderic Allibert , Takeshi Akatsu , Bruno Ghyselen
发明人： Fréderic Allibert , Takeshi Akatsu , Bruno Ghyselen
IPC分类号： H01L29/772
CPC分类号： H01L29/785 , H01L29/66742 , H01L29/7842 , H01L29/78687
摘要： The invention concerns a field-effect transistor with a drain, a source, a channel in electrical contact with the source and the drain, and at least one gate, so as to apply an electric field to the channel when each gate is polarized, where the channel has a multi-layer structure with at least three layers, and with at least one of the layers of the multi-layer structure having electrical properties that are substantially different from those of another layer of the multi-layer structure, and wherein a single gate or two gates are arranged substantially perpendicular to a reference plane of the channel defined by an interface plane between two layers of the multi-layer structure.
摘要翻译：本发明涉及具有漏极，源极，与源极和漏极电接触的沟道以及至少一个栅极的场效应晶体管，以便当每个栅极极化时，向沟道施加电场，其中所述通道具有至少三层的多层结构，并且所述多层结构的所述层中的至少一层具有与所述多层结构的另一层的电性质基本不同的电特性，并且其中单栅极或两个栅极基本上垂直于由多层结构的两层之间的界面平面限定的沟道的参考平面布置。

89. 发明申请

US20080265261A1 PROCESS FOR TRANSFERRING A LAYER OF STRAINED SEMICONDUCTOR MATERIAL 有权
标题翻译：用于传输应变半导体材料层的方法
公开(公告)号：US20080265261A1
公开(公告)日：2008-10-30
申请号：US12170583
申请日：2008-07-10
申请人： Bruno Ghyselen , Daniel Bensahel , Thomas Skotnicki
发明人： Bruno Ghyselen , Daniel Bensahel , Thomas Skotnicki
IPC分类号： H01L29/24 , H01L21/30 , H01L29/267
CPC分类号： H01L29/1054 , H01L21/76254 , H01L21/76259 , Y10S438/938
摘要： Semiconductor wafers having a thin layer of strained semiconductor material. These structures include a substrate; an oxide layer upon the substrate; a silicon carbide (SiC) layer upon the oxide layer, and a strained layer of a semiconductor material in a strained state upon the silicon carbide layer, or a matching layer upon the donor substrate that is made from a material that induces strain in subsequent epitaxially grown layers thereon; a strained layer of a semiconductor material of defined thickness in a strained state; and an insulating or semi-insulating layer upon the strained layer in a thickness that retains the strained state of the strained layer. The insulating or semi-insulating layers are made of silicon carbide or oxides and act to retain strain in the strained layer.
摘要翻译：半导体晶片具有应变半导体材料的薄层。这些结构包括底物; 基底上的氧化物层; 氧化物层上的碳化硅（SiC）层，以及在碳化硅层上处于应变状态的半导体材料的应变层，或者由施主衬底上的由随后的外延生长引起应变的材料制成的匹配层生长层; 在应变状态下具有规定厚度的半导体材料的应变层; 以及在应变层上的绝缘或半绝缘层，其厚度保持应变层的应变状态。绝缘层或半绝缘层由碳化硅或氧化物制成并用于将应变保留在应变层中。

90. 发明授权

US07232488B2 Method of fabrication of a substrate for an epitaxial growth 有权
标题翻译：用于外延生长的衬底的制造方法
公开(公告)号：US07232488B2
公开(公告)日：2007-06-19
申请号：US10827437
申请日：2004-04-20
申请人： Takeshi Akatsu , Cecile Aulnette , Bruno Ghyselen
发明人： Takeshi Akatsu , Cecile Aulnette , Bruno Ghyselen
IPC分类号： C30B25/04
CPC分类号： H01L21/76254 , C30B25/02 , C30B29/52 , Y10S117/915
摘要： The present invention relates to a method of fabrication of a substrate for an epitaxial growth. A relaxed epitaxial base layer is obtained on an auxiliary substrate. The invention allows the fabrication of substrates with a more efficient epitaxial growth of a material with a desired lattice parameter on another material with a different lattice parameter. The material can be grown with a high thermodynamic and crystallographic stability. At least a part of the epitaxial base layer is transferred onto a carrier substrate, forming a base substrate, and growing the material of the epitaxial base layer is further grown on the carrier substrate.
摘要翻译：本发明涉及一种外延生长用基板的制造方法。在辅助基板上获得松弛的外延基层。本发明允许用具有不同晶格参数的另一材料上具有期望的晶格参数的材料的更有效的外延生长来制造衬底。该材料可以以高热力学和晶体学稳定性生长。将外延基底层的至少一部分转移到载体基板上，形成基底基板，并且在载体基板上进一步生长外延基底层的材料。

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