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    • 83. 发明授权
    • Methods for forming interconnects in vias and microelectronic workpieces including such interconnects
    • 用于在通孔和包括这种互连的微电子工件中形成互连的方法
    • US07425499B2
    • 2008-09-16
    • US10925501
    • 2004-08-24
    • Steven D. OliverKyle K. KirbyWilliam M. Hiatt
    • Steven D. OliverKyle K. KirbyWilliam M. Hiatt
    • H01L21/44
    • H01L21/76898
    • Methods for forming interconnects in blind vias or other types of holes, and microelectronic workpieces having such interconnects. The blind vias can be formed by first removing the bulk of the material from portions of the back side of the workpiece without thinning the entire workpiece. The bulk removal process, for example, can form a first opening that extends to an intermediate depth within the workpiece, but does not extend to the contact surface of the electrically conductive element. After forming the first opening, a second opening is formed from the intermediate depth in the first opening to the contact surface of the conductive element. The second opening has a second width less than the first width of the first opening. This method further includes filling the blind vias with a conductive material and subsequently thinning the workpiece from the exterior side until the cavity is eliminated.
    • 用于在盲孔或其它类型的孔中形成互连的方法,以及具有这种互连的微电子工件。 盲孔可以通过首先从工件的后侧的部分去除大部分材料而不使整个工件变薄来形成。 散装移除过程例如可以形成延伸到工件内的中间深度但不延伸到导电元件的接触表面的第一开口。 在形成第一开口之后,从第一开口的中间深度到导电元件的接触表面形成第二开口。 第二开口具有小于第一开口的第一宽度的第二宽度。 该方法还包括用导电材料填充盲孔,随后从外侧使工件变薄直到空腔被消除。