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71. 发明授权

US06960800B2 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06960800B2
公开(公告)日：2005-11-01
申请号：US09734176
申请日：2000-12-12
申请人： Takumi Mikawa , Yuji Judai
发明人： Takumi Mikawa , Yuji Judai
IPC分类号： H01G4/12 , H01L21/02 , H01L21/203 , H01L21/768 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/76 , H01L23/48 , H01L23/52 , H01L29/00
CPC分类号： H01L28/55 , H01L28/60 , H01L28/75
摘要： A lower electrode is formed on a substrate, a capacitive insulating film is formed out of a ferroelectric film on the lower electrode, and an upper electrode is formed on the capacitive insulating film. A contact layer is formed on the upper electrode. The contact layer is either a single-layer film made of a metal oxide or a metal nitride or a multilayer structure made up of metal oxide and metal nitride films. An insulating film is formed to cover the lower electrode, capacitive insulating film, upper electrode and contact layer. A contact hole is opened through the insulating film and the contact layer to reach the upper electrode. A metal interconnect, which is filled in the contact hole and connected to the upper electrode, is formed on a part of the insulating film.
摘要翻译：在基板上形成下电极，在下电极上由铁电体膜形成电容绝缘膜，在电容绝缘膜上形成上电极。接触层形成在上电极上。接触层是由金属氧化物或金属氮化物制成的单层膜或由金属氧化物和金属氮化物膜构成的多层结构。形成绝缘膜以覆盖下电极，电容绝缘膜，上电极和接触层。通过绝缘膜和接触层打开接触孔以到达上电极。填充在接触孔中并连接到上电极的金属互连件形成在绝缘膜的一部分上。

72. 发明授权

US06958508B2 Ferroelectric memory having ferroelectric capacitor insulative film 有权
标题翻译：具有铁电电容器绝缘膜的铁电存储器
公开(公告)号：US06958508B2
公开(公告)日：2005-10-25
申请号：US09968948
申请日：2001-10-03
申请人： Takumi Mikawa
发明人： Takumi Mikawa
IPC分类号： H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8239 , H01L21/8246 , H01L27/105 , H01L27/115 , H01L27/108
CPC分类号： H01L27/11509 , H01L21/28568 , H01L21/76895 , H01L27/105 , H01L27/1052 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/60 , H01L28/75
摘要： A capacitor upper electrode and a wiring are electrically connected to each other by using a plug and a conductive layer formed below a capacitive element without using a plug that directly connects the capacitor upper electrode to the wiring provided thereon via an interlayer insulating film therebetween. Alternatively, the capacitor upper electrode is covered by a conductive hydrogen barrier film, and the capacitor upper electrode and the wiring are electrically connected to each other via both a plug connecting the wiring and the conductive hydrogen barrier film to each other and the conductive hydrogen barrier film.
摘要翻译：电容器上电极和布线通过使用形成在电容元件下方的插塞和导电层而彼此电连接，而不使用通过其间的层间绝缘膜将电容器上电极直接连接到设置在其上的布线的插头。或者，电容器上电极被导电氢阻挡膜覆盖，并且电容器上电极和布线通过将布线和导电氢阻挡膜彼此连接的插塞彼此电连接，并且导电氢屏障电影。

73. 发明申请

US20050082637A1 Dielectric memory and method for fabricating the same 审中-公开
标题翻译：介质记忆及其制造方法
公开(公告)号：US20050082637A1
公开(公告)日：2005-04-21
申请号：US10964703
申请日：2004-10-15
申请人： Takumi Mikawa , Eiji Fujii
发明人： Takumi Mikawa , Eiji Fujii
IPC分类号： H01L21/02 , H01L21/314 , H01L21/316 , H01L21/768 , H01L21/8242 , H01L29/00
CPC分类号： H01L28/55 , H01L21/7687 , H01L28/56 , H01L28/65 , H01L28/75 , H01L28/91
摘要： A semiconductor device is provided with an insulating film which is formed on a semiconductor substrate and has a first recess, a capacitor lower electrode which is formed on the walls and the bottom of the first recess and has a second recess, and a capacitor insulating film which is formed on the walls and the bottom of the second recess and has a third recess, and a capacitor upper electrode embedded in the third recess.
摘要翻译：半导体器件设置有绝缘膜，该绝缘膜形成在半导体衬底上并且具有第一凹部，形成在第一凹部的壁和底部上并具有第二凹部的电容器下电极，以及电容器绝缘膜其形成在第二凹部的壁和底部上，并且具有第三凹部，以及嵌入在第三凹部中的电容器上电极。

74. 发明申请

US20050041505A1 Ferroelectric memory and method for manufacturing the same 有权
公开(公告)号：US20050041505A1
公开(公告)日：2005-02-24
申请号：US10957618
申请日：2004-10-05
申请人： Takumi Mikawa
发明人： Takumi Mikawa
IPC分类号： H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8239 , H01L21/8246 , H01L27/105 , H01L27/115 , G11C7/00
CPC分类号： H01L27/11509 , H01L21/28568 , H01L21/76895 , H01L27/105 , H01L27/1052 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/60 , H01L28/75
摘要： A capacitor upper electrode and a wiring are electrically connected to each other by using a plug and a conductive layer formed below a capacitive element without using a plug that directly connects the capacitor upper electrode to the wiring provided thereon via an interlayer insulating film therebetween. Alternatively, the capacitor upper electrode is covered by a conductive hydrogen barrier film, and the capacitor upper electrode and the wiring are electrically connected to each other via both a plug connecting the wiring and the conductive hydrogen barrier film to each other and the conductive hydrogen barrier film.

75. 发明授权

US06753566B2 Semiconductor device with an oxygen diffusion barrier layer formed from a composite nitride 有权
标题翻译：具有由复合氮化物形成的氧扩散阻挡层的半导体器件
公开(公告)号：US06753566B2
公开(公告)日：2004-06-22
申请号：US10441118
申请日：2003-05-20
申请人： Toshie Kutsunai , Shinichiro Hayashi , Takumi Mikawa , Yuji Judai
发明人： Toshie Kutsunai , Shinichiro Hayashi , Takumi Mikawa , Yuji Judai
IPC分类号： H01L27108
CPC分类号： H01L28/55
摘要： An impurity diffusion layer serving as the source or the drain of a transistor is formed in a semiconductor substrate, and a protection insulating film is formed so as to cover the transistor. A capacitor lower electrode, a capacitor dielectric film of an oxide dielectric film and a capacitor upper electrode are successively formed on the protection insulating film. A plug for electrically connecting the impurity diffusion layer of the transistor to the capacitor lower electrode is buried in the protection insulating film. An oxygen barrier layer is formed between the plug and the capacitor lower electrode. The oxygen barrier layer is made from a composite nitride that is a mixture or an alloy of a first nitride having a conducting property and a second nitride having an insulating property.
摘要翻译：在半导体衬底中形成用作晶体管的源极或漏极的杂质扩散层，形成覆盖晶体管的保护绝缘膜。在保护绝缘膜上依次形成电容器下电极，氧化物电介质膜的电容电介质膜和电容器上电极。用于将晶体管的杂质扩散层电连接到电容器下电极的插头埋入保护绝缘膜中。在塞子和电容器下电极之间形成氧阻隔层。氧阻隔层由作为具有导电性的第一氮化物和具有绝缘性的第二氮化物的混合物或合金的复合氮化物制成。

76. 发明授权

US06750492B2 Semiconductor memory with hydrogen barrier 有权
标题翻译：具有氢屏障的半导体存储器
公开(公告)号：US06750492B2
公开(公告)日：2004-06-15
申请号：US10053693
申请日：2002-01-24
申请人： Takumi Mikawa , Toshie Kutsunai , Yuji Judai
发明人： Takumi Mikawa , Toshie Kutsunai , Yuji Judai
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , H01L27/10894 , H01L27/11507 , H01L28/55
摘要： A semiconductor memory device of the present invention includes: a semiconductor substrate; a memory cell capacitor for storing data, including a first electrode provided above the semiconductor substrate, a capacitance insulating film formed on the first electrode, and a second electrode provided on the capacitance insulating film; a step reducing film covering an upper surface and a side surface of the memory cell capacitor; and an overlying hydrogen barrier film covering the step reducing film.
摘要翻译：本发明的半导体存储器件包括：半导体衬底; 用于存储数据的存储单元电容器，包括设置在半导体衬底上的第一电极，形成在第一电极上的电容绝缘膜和设置在电容绝缘膜上的第二电极; 覆盖所述存储单元电容器的上表面和侧面的阶梯降低膜; 以及覆盖降低层的覆盖氢阻挡膜。

77. 发明授权

US08871561B2 Variable resistance nonvolatile storage device and method for manufacturing the same 有权
标题翻译：可变电阻非易失性存储装置及其制造方法
公开(公告)号：US08871561B2
公开(公告)日：2014-10-28
申请号：US13805233
申请日：2012-01-30
申请人： Ichirou Takahashi , Takumi Mikawa
发明人： Ichirou Takahashi , Takumi Mikawa
IPC分类号： H01L21/00 , H01L21/20 , H01L45/00 , H01L27/24
CPC分类号： H01L45/1683 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/1625
摘要： Provided is a method for manufacturing a variable resistance nonvolatile storage device, which prevents electrical conduction between lower electrodes and upper electrodes of variable resistance elements in the memory cell holes. The method includes: forming lower copper lines; forming a third interlayer insulating layer; forming memory cell holes in the third interlayer insulating layer, an opening diameter of upper portions of the memory cell holes being smaller than bottom portions; forming a metal electrode layer on the bottom of each memory cell holes by sputtering; embedding and forming a variable resistance layer in each memory cell hole; and forming upper copper lines connected to the variable resistance layer embedded and formed in each memory cell hole.
摘要翻译：提供一种制造可变电阻非易失性存储装置的方法，其防止存储单元孔中的下电极和可变电阻元件的上电极之间的导电。该方法包括：形成较低的铜线; 形成第三层间绝缘层; 在第三层间绝缘层中形成存储单元孔，存储单元孔的上部的开口直径小于底部; 通过溅射在每个存储单元孔的底部形成金属电极层; 在每个存储单元孔中嵌入并形成可变电阻层; 并且形成连接到嵌入并形成在每个存储单元孔中的可变电阻层的上铜线。

78. 发明授权

US08861257B2 Nonvolatile memory element, manufacturing method thereof, nonvolatile memory device, and design support method for nonvolatile memory element 有权
标题翻译：非易失性存储元件，其制造方法，非易失性存储器件以及用于非易失性存储元件的设计支持方法
公开(公告)号：US08861257B2
公开(公告)日：2014-10-14
申请号：US13634700
申请日：2011-11-24
申请人： Yukio Hayakawa , Takumi Mikawa , Takeki Ninomiya
发明人： Yukio Hayakawa , Takumi Mikawa , Takeki Ninomiya
IPC分类号： G11C11/00 , H01L27/10 , H01L45/00 , H01L27/02 , H01L27/24 , G11C13/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/32 , G11C2213/34 , G11C2213/55 , H01L27/02 , H01L27/2427 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： A nonvolatile memory element includes a variable resistance layer located between a lower electrode and an upper electrode and having a resistance value that reversibly changes based on electrical signals applied between these electrodes. The variable resistance layer includes at least two layers: a first variable resistance layer including a first transition metal oxide; and a second variable resistance layer including a second transition metal oxide and a transition metal compound. The second transition metal oxide has an oxygen content atomic percentage lower than an oxygen content atomic percentage of the first transition metal oxide, the transition metal compound contains either oxygen and nitrogen or oxygen and fluorine, and the second transition metal oxide and the transition metal compound are in contact with the first variable resistance layer.
摘要翻译：非易失性存储元件包括位于下电极和上电极之间的可变电阻层，并且具有基于施加在这些电极之间的电信号而可逆地改变的电阻值。可变电阻层包括至少两层：包含第一过渡金属氧化物的第一可变电阻层; 以及包含第二过渡金属氧化物和过渡金属化合物的第二可变电阻层。第二过渡金属氧化物的氧含量原子百分比低于第一过渡金属氧化物的氧含量原子百分比，过渡金属化合物含有氧和氮或氧和氟，第二过渡金属氧化物和过渡金属化合物与第一可变电阻层接触。

79. 发明授权

US08692222B2 Nonvolatile memory element and method of manufacturing the nonvolatile memory element 有权
标题翻译：非易失性存储元件和制造非易失性存储元件的方法
公开(公告)号：US08692222B2
公开(公告)日：2014-04-08
申请号：US13575338
申请日：2011-12-12
申请人： Shinichi Yoneda , Takumi Mikawa
发明人： Shinichi Yoneda , Takumi Mikawa
IPC分类号： H01L47/00
CPC分类号： H01L45/146 , G11C13/0007 , G11C2213/72 , H01L45/1233
摘要： A nonvolatile memory element according to the present disclosure includes: a variable resistance element including a first electrode layer, a second electrode layer, and a variable resistance layer which is located between the first electrode layer and the second electrode layer and has a resistance value that reversibly changes based on an electrical signal applied between the first electrode layer and the second electrode layer; and a fixed resistance layer having a predetermined resistance value and stacked together with the variable resistance element. The variable resistance layer includes (i) a first transition metal oxide layer which is oxygen deficient and (ii) a second transition metal oxide layer which has a higher oxygen content atomic percentage than the first transition metal oxide layer. The predetermined resistance value ranges from 70Ω to 1000Ω inclusive.
摘要翻译：根据本公开的非易失性存储元件包括：可变电阻元件，包括位于第一电极层和第二电极层之间的第一电极层，第二电极层和可变电阻层，并且具有电阻值，基于施加在第一电极层和第二电极层之间的电信号可逆地改变; 以及具有预定电阻值并与可变电阻元件一起堆叠的固定电阻层。可变电阻层包括（i）缺氧的第一过渡金属氧化物层和（ii）具有比第一过渡金属氧化物层更高的氧含量原子百分比的第二过渡金属氧化物层。预定电阻值范围为70＆OHgr; 至1000＆OHgr; 包括的。

80. 发明授权

US08559205B2 Nonvolatile semiconductor memory apparatus and manufacturing method thereof 有权
标题翻译：非易失性半导体存储装置及其制造方法
公开(公告)号：US08559205B2
公开(公告)日：2013-10-15
申请号：US13563321
申请日：2012-07-31
申请人： Takumi Mikawa , Takeshi Takagi
发明人： Takumi Mikawa , Takeshi Takagi
IPC分类号： G11C17/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/32 , G11C2213/72 , G11C2213/73 , H01L27/0688 , H01L27/112 , H01L27/115 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1683
摘要： A nonvolatile semiconductor memory apparatus including a substrate, lower-layer electrode wires provided on the substrate, an interlayer insulating layer provided with contact holes at locations respectively opposite to the lower-layer electrode wires, resistance variable layers which are respectively connected to the lower-layer electrode wires; and non-ohmic devices which are respectively provided on the resistance variable layers. The non-ohmic devices each has a laminated-layer structure including plural semiconductor layers, a laminated-layer structure including a metal electrode layer and an insulator layer, or a laminated-layer structure including a metal electrode layer and a semiconductor layer. One layer of the laminated-layer structure is embedded to fill each of the contact holes and the semiconductor layer or the insulator layer which is the other layer of the laminated-layer structure has a larger area than an opening of each of the contact holes and is provided on the interlayer insulating layer.
摘要翻译：一种非易失性半导体存储装置，包括基板，设置在基板上的下层电极布线，在与下层电极布线分别相对的位置设置有接触孔的层间绝缘层，分别与下层电极布线连接的电阻变化层，层电极线; 以及分别设置在电阻变化层上的非欧姆器件。非欧姆性器件各自具有包括多个半导体层的层压层结构，包括金属电极层和绝缘体层的层叠层结构，或者包括金属电极层和半导体层的层叠结构。嵌入层叠层结构的一层以填充每个接触孔，作为层叠层结构的另一层的半导体层或绝缘体层的面积比每个接触孔的开口大，设置在层间绝缘层上。

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