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    • 71. 发明申请
    • REFERENCE VOLTAGE GENERATION CIRCUIT
    • 参考电压发生电路
    • US20100315060A1
    • 2010-12-16
    • US12518050
    • 2007-11-30
    • Takeshi IkedaHiroshi Miyagi
    • Takeshi IkedaHiroshi Miyagi
    • G05F3/16
    • G05F3/30G05F3/08
    • A basic structure of a reference voltage generation circuit is formed by a buffer amplifier (21) and a resistive element (22) without using a band gap regulator. Thus, an influence of a noise of the band gap regulator as in the conventional art is eliminated. There are provided comparators (23) and (24) for comparing an input voltage of the buffer amplifier (21) with an output voltage of a band gap regulator (10), and a control circuit (25) for variably controlling a resistance value of the resistive element (22) in response to comparison signals. Consequently, even if an output voltage (Vout) of the buffer amplifier (21) temporarily fluctuates with a change in a source voltage (VDD), it returns into a desirable voltage range and converges through a variable control of the resistance value.
    • 参考电压产生电路的基本结构由缓冲放大器(21)和电阻元件(22)形成,而不使用带隙调节器。 因此,消除了像现有技术那样的带隙调节器的噪声的影响。 提供了用于将缓冲放大器(21)的输入电压与带隙调节器(10)的输出电压进行比较的比较器(23)和(24),以及控制电路(25),用于可变地控制 电阻元件(22)响应于比较信号。 因此,即使缓冲放大器(21)的输出电压(Vout)随着源极电压(VDD)的变化而暂时波动,也能够回到期望的电压范围,并通过电阻值的可变控制进行收敛。
    • 72. 发明授权
    • Image processing method, image display apparatus, and television apparatus
    • 图像处理方法,图像显示装置和电视装置
    • US07817210B2
    • 2010-10-19
    • US11168288
    • 2005-06-29
    • Takeshi IkedaOsamu SaganoNaoto Abe
    • Takeshi IkedaOsamu SaganoNaoto Abe
    • H04N5/202
    • G09G3/2007G09G2320/0276H04N1/407
    • An image processing method comprising: reading out corrected data from a memory which prestored the corrected data, by referring to low P bit (P is an integer number ≧1, and ≦to M) in M bits digital image data (M is an integer number ≧to 2); calculating corrected data based on data for operation read out from the memory which prestored the data, wherein the data is read out by referring to high R bit (R is an integer number ≧1, and ≦M−1) in the digital image data; and outputting the read-out corrected data in a case that a value of the digital image data is not greater than a predetermined value, and outputting the calculated corrected data in a case that the value is greater than the predetermined value.
    • 一种图像处理方法,包括:通过参考M位数字图像数据中的低P位(P是整数为1,并且n1E到M),从预先存储校正数据的存储器读出校正数据(M是 整数≧〜2); 基于从预先存储数据的存储器读出的操作数据计算校正数据,其中通过参考数字图像中的高R位(R是整数≥1,≦̸ M-1)来读出数据 数据; 以及在所述数字图像数据的值不大于预定值的情况下输出所述读出的校正数据,并且在所述值大于所述预定值的情况下输出所计算的校正数据。
    • 76. 发明授权
    • Image pickup apparatus having iris member and filter units
    • 具有虹膜构件和过滤单元的摄像装置
    • US07619679B2
    • 2009-11-17
    • US11626591
    • 2007-01-24
    • Takeshi Ikeda
    • Takeshi Ikeda
    • H04N5/225
    • H04N5/23232H04N5/23245H04N5/2352H04N5/238
    • An image pickup apparatus capable of preventing a decline of resolution of a still image while keeping a dynamic range of exposure control. The image pickup apparatus capable of photographing with changing over a moving image and a still image, includes an iris mechanism for changing an amount of light input to an image pickup element by changing an aperture diameter, a filter unit, having a single density or a plurality of densities, for changing the amount of the light input to the image pickup element by its advancing towards and withdrawing from the aperture diameter of the iris mechanism, a unit for driving the iris mechanism and the filter unit independently, and a control unit for setting the filter unit in one of two types of states such as fully covering the aperture diameter of the iris mechanism and fully withdrawing from the aperture diameter in the still image photography.
    • 一种能够在保持动态曝光控制范围的同时防止静止图像的分辨率下降的摄像装置。 能够通过改变运动图像和静止图像拍摄的图像拾取装置包括:虹膜机构,用于通过改变孔直径来改变输入到图像拾取元件的光量;滤光器单元,具有单一密度或 多个密度,用于通过其向虹膜机构的孔径的前进方向前进和退出来改变输入到图像拾取元件的光量,用于独立地驱动虹膜机构和滤光单元的单元,以及用于 将过滤器单元设置为两种状态之一,例如完全覆盖光圈机构的孔径直径并从静止图像摄影中的孔直径完全退出。
    • 77. 发明申请
    • FREQUENCY SYNTHESIZER AND LOOP FILTER USED THEREIN
    • 使用的频率合成器和环路滤波器
    • US20090237036A1
    • 2009-09-24
    • US12375803
    • 2007-03-23
    • Takeshi IkedaHiroshi Miyagi
    • Takeshi IkedaHiroshi Miyagi
    • H02J7/00H03B21/00H03B19/00
    • H03L7/093H03L7/18
    • An LPF (15) includes a plurality of capacitors (C1) to (Cn) connected in parallel, switches (SW11) to (SW1n) and (SW21) to (SW2n) for carrying out switching to perform their charging/discharging operation as a pipeline processing, and a capacitor (CH) connected to an output side of a parallel circuit having the capacitors (C1) to (Cn), and electric charges stored sequentially in the capacitors (C1) to (Cn) are obtained as an output of the parallel circuit and are sequentially stored in the capacitor (CH). Consequently, it is possible to implement a great time constant as the whole circuit even if the time constant is reduced with a decrease in capacitance values of the capacitors (C1) to (Cn) and (CH).
    • LPF(15)包括并联连接的多个电容器(C1)至(Cn),开关(SW11)至(SW1n)和(SW21)至(SW2n),用于执行开关以执行充电/放电操作 流水线处理和连接到具有电容器(C1)至(Cn)的并联电路的输出侧的电容器(CH),并且顺序地存储在电容器(C1)至(Cn)中的电荷被获得作为 并联电路并依次存储在电容器(CH)中。 因此,即使随着电容器(C1)至(Cn)和(CH)的电容值的减小而减小时间常数,也可以实现作为整个电路的大的时间常数。
    • 78. 发明授权
    • Frequency synthesizer and charge pump circuit used therein
    • 其中使用的频率合成器和电荷泵电路
    • US07579888B2
    • 2009-08-25
    • US11915112
    • 2005-12-28
    • Takeshi IkedaHiroshi Miyagi
    • Takeshi IkedaHiroshi Miyagi
    • H03L7/06
    • H03L7/0895H03L7/0891H03L7/18
    • There are included a signal generating circuit (8) that generates, based on a comparison signal outputted from a phase comparator (3) and a clock signal outputted from a crystal oscillation circuit (1) and having a shorter pulse width than the comparison signal, a control signal obtained from a logical product of the two signals; and a charge pump circuit that performs, based on the control signal from the signal generating circuit (8), a charging or discharging operation of a capacitor. The charging or discharging operation of the capacitor is gradually performed little by little based on the control signal having the shorter pulse width than the conversional comparison signal, whereby even if the capacitance value of the capacitor is reduced, the substantial time constant can be enlarged, resulting in a stable operation of a frequency synthesizer.
    • 包括信号生成电路(8),其基于从相位比较器(3)输出的比较信号和从晶体振荡电路(1)输出的具有比比较信号更短的脉冲宽度的时钟信号, 从两个信号的逻辑积获得的控制信号; 以及基于来自信号发生电路(8)的控制信号执行电容器的充电或放电操作的电荷泵电路。 基于具有比会话比较信号更短的脉冲宽度的控制信号逐渐地逐渐执行电容器的充电或放电操作,由此即使电容器的电容值减小,可以扩大实质时间常数, 导致频率合成器的稳定操作。
    • 79. 发明授权
    • Frequency synthesizer and charge pump circuit used for the same
    • 频率合成器和电荷泵电路用于相同
    • US07576578B2
    • 2009-08-18
    • US11834305
    • 2007-08-06
    • Takeshi IkedaHiroshi Miyagi
    • Takeshi IkedaHiroshi Miyagi
    • H03L7/06
    • H03L7/18H03L7/0895
    • A frequency synthesizer includes an AND circuit (17) for detecting whether a frequency synthesizer is in a lock state according to a signal outputted from an Up terminal and a Down terminal of a phase comparator and switching circuits (18, 19) for switching between presence and absence of connections of constant current circuits (14, 15) constituting a charge pump circuit (4) according to the output signal of the AND circuit (17). When the AND circuit (17) has detected a high impedance state of the charge pump circuit (4), the switching circuits (18, 19) disconnects the constant current circuits (14, 15) by the switching circuits (18, 19). Thus, it is possible to eliminate current flowing into the charge pump circuit (4) without using a control signal from outside such as a power cut signal and an intermittent signal.
    • 频率合成器包括用于根据从相位比较器的Up端和Down端输出的信号检测频率合成器是否处于锁定状态的AND电路(17),以及用于在存在之间切换的切换电路(18,19) 以及根据AND电路(17)的输出信号构成电荷泵电路(4)的恒流电路(14,15)的连接不存在。 当AND电路(17)检测到电荷泵电路(4)的高阻抗状态时,开关电路(18,19)通过开关电路(18,19)断开恒流电路(14,15)。 因此,可以在不使用来自外部的控制信号(例如断电信号和间歇信号)的情况下消除流入电荷泵电路(4)的电流。
    • 80. 发明申请
    • LINEAR MATERIAL AND STATOR STRUCTURE
    • 线性材料和定子结构
    • US20090102309A1
    • 2009-04-23
    • US12298524
    • 2007-04-20
    • Hiroyuki KamibayashiYasunori KashimaTakafumi TanabeTakeshi IkedaYasushi Kawakami
    • Hiroyuki KamibayashiYasunori KashimaTakafumi TanabeTakeshi IkedaYasushi Kawakami
    • H02K3/04H01B7/00
    • H02K1/165H02K3/12H02K15/045Y10T29/49117
    • A stator structure includes: a stator core (104) having a large number of concave slots (105) and a large number of convex magnetic poles (106) circumferentially alternately arranged; and magnet wires (101) of rectangular cross section in each of which an insulating coating (103) is formed on the outer surface of a metal wire (102), wherein each of the slots (105) is formed so that the distance (W2) between both the side surfaces (109, 109) of the slot (105) gradually decreases from the bottom (107) to a distal opening (108) of the slot (105), each of the magnet wires (101) is wound around the associated magnetic pole (106) and inserted in tiers in the associated slot (105), and the magnet wire (101) is placed in the slot (105) so that the width (W1) thereof continuously or stepwise decreases from the bottom (107) to the distal opening (108) of the slot (105).
    • 定子结构包括:定子芯(104),其具有大量凹槽(105)和大量周向交替布置的凸极磁极(106); 以及在金属线(102)的外表面上形成有绝缘涂层(103)的矩形截面的电磁线(101),其中每个槽(105)形成为使得距离(W2 (105)的两个侧面(109,109)之间的距离从底部(107)到槽(105)的远端开口(108)逐渐减小,每个磁体线(101)被卷绕 相关联的磁极(106)并插入到相关联的狭槽(105)中的层中,并且磁体线(101)被放置在狭槽(105)中,使得其连续或逐步地从底部( 107)延伸到狭槽(105)的远端开口(108)。