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71. 发明申请

US20100207165A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100207165A1
公开(公告)日：2010-08-19
申请号：US12769108
申请日：2010-04-28
申请人： Tomohiro MURATA , Yutaka Hirose , Yasuhiro Uemoto , Tsuyoshi Tanaka
发明人： Tomohiro MURATA , Yutaka Hirose , Yasuhiro Uemoto , Tsuyoshi Tanaka
IPC分类号： H01L29/812
CPC分类号： H01L29/7786 , H01L29/2003 , H01L29/66462
摘要： According to a method for fabricating a semiconductor device, a first semiconductor layer made of a first nitride semiconductor is formed over a substrate. Thereafter, a mask film covering part of the upper surface of the first semiconductor layer is selectively formed on the first semiconductor layer. A multilayer film, in which second and third nitride semiconductors having different band gaps are stacked, is selectively formed on the first semiconductor layer with the mask film used as a formation mask. On the multilayer film, an ohmic electrode is formed.
摘要翻译：根据半导体器件的制造方法，在基板上形成由第一氮化物半导体构成的第一半导体层。此后，在第一半导体层上选择性地形成覆盖第一半导体层的上表面的一部分的掩模膜。选择性地在第一半导体层上形成具有不同带隙的第二和第三氮化物半导体的多层膜，其中掩模膜用作形成掩模。在多层膜上形成欧姆电极。

72. 发明申请

US20100135053A1 POWER CONVERSION CIRCUIT 有权
标题翻译：电源转换电路
公开(公告)号：US20100135053A1
公开(公告)日：2010-06-03
申请号：US12598387
申请日：2008-12-11
申请人： Atsushi Morimoto , Matsuo Shiraishi , Kouichi Ishikawa , Tatsuo Morita , Yasuhiro Uemoto , Tsuyoshi Tanaka
发明人： Atsushi Morimoto , Matsuo Shiraishi , Kouichi Ishikawa , Tatsuo Morita , Yasuhiro Uemoto , Tsuyoshi Tanaka
IPC分类号： H02M7/217
CPC分类号： H02M3/1582 , H02M7/219
摘要： A power conversion circuit includes a bidirectional switch 2. The bidirectional switch 2 has a first gate terminal G1, a second gate terminal G2, a first ohmic terminal S1 and a second ohmic terminal S2. The bidirectional switch 2 has four operation states. In the first state, the bidirectional switch 2 operates as a diode having a cathode as the first ohmic terminal S1 and an anode as the second ohmic terminal S2. In a second state, the bidirectional switch 2 operates as a diode having an anode as the first ohmic terminal S1 and a cathode as the second ohmic terminal S2. In a third state, the bidirectional switch 2 is bidirectionally conductive with via a diode between the first and second ohmic terminals S1 and S2. In a fourth state, the bidirectional switch 2 cuts off a bidirectional current between the first and second ohmic terminals.
摘要翻译：功率转换电路包括双向开关2.双向开关2具有第一栅极端子G1，第二栅极端子G2，第一欧姆端子S1和第二欧姆端子S2。双向开关2具有四个操作状态。在第一状态下，双向开关2作为具有阴极的第二欧姆端子S1和阳极作为第二欧姆端子S2的二极管工作。在第二状态下，双向开关2作为具有阳极的第二欧姆端子S1和阴极作为第二欧姆端子S2的二极管工作。在第三状态下，双向开关2通过第一和第二欧姆端子S1和S2之间的二极管双向导通。在第四状态下，双向开关2切断第一和第二欧姆端子之间的双向电流。

73. 发明申请

US20100129992A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100129992A1
公开(公告)日：2010-05-27
申请号：US12695759
申请日：2010-01-28
申请人： Tomohiro MURATA , Yutaka Hirose , Tsuyoshi Tanaka , Yasuhiro Uemoto
发明人： Tomohiro MURATA , Yutaka Hirose , Tsuyoshi Tanaka , Yasuhiro Uemoto
IPC分类号： H01L21/20
CPC分类号： H01L29/66871 , H01L21/28 , H01L29/2003 , H01L29/42316 , H01L29/66462 , H01L29/7787 , H01L29/8128
摘要： A semiconductor device of the present invention includes: a III-V nitride semiconductor layer including a channel region in which carriers travel; a concave portion provided in an upper portion of the channel region in the III-V nitride semiconductor layer; and a Schottky electrode consisting of a conductive material forming a Schottky junction with the semiconductor layer, and formed on a semiconductor layer, which spreads over the concave portion and peripheral portions of the concave portion, on the III-V nitride semiconductor layer. A dimension of the concave portion in a depth direction is set so that a portion of the Schottky electrode provided in the concave portion can adjust a quantity of the carriers traveling in the channel region.
摘要翻译：本发明的半导体器件包括：III-V族氮化物半导体层，其包括载流子行进的沟道区; 设置在III-V族氮化物半导体层中的沟道区的上部的凹部; 和由形成与半导体层形成肖特基结的导电材料构成的肖特基电极，形成在III-V族氮化物半导体层上的在凹部的凹部和周边部分上方扩散的半导体层上。深度方向上的凹部的尺寸被设定为使得设置在凹部中的肖特基电极的一部分可以调节在沟道区域中行进的载流子的量。

74. 发明申请

US20100127652A1 MOTOR DRIVING CIRCUIT 有权
标题翻译：电机驱动电路
公开(公告)号：US20100127652A1
公开(公告)日：2010-05-27
申请号：US12596770
申请日：2008-12-02
申请人： Tatsuo Morita , Yasuhiro Uemoto , Tsuyoshi Tanaka , Matsuo Shiraishi , Atsushi Morimoto , Kouichi Ishikawa
发明人： Tatsuo Morita , Yasuhiro Uemoto , Tsuyoshi Tanaka , Matsuo Shiraishi , Atsushi Morimoto , Kouichi Ishikawa
IPC分类号： H02P6/14
CPC分类号： H02M7/53871 , H01L29/1066 , H01L29/2003 , H01L29/41758 , H01L29/7787 , H02P27/08
摘要： A motor driving circuit includes a three-phase inverter circuit 8, including three upper-arm switching elements 56a to 56c for driving upper arms of different phases of a three-phase motor 3, and three lower-arm switching elements 56d to 56f for driving lower arms of different phases. At least one of the upper-arm switching elements 56a to 56c and the lower-arm switching elements 56d to 56f is a semiconductor element that performs a diode operation. The diode operation is an operation in which a voltage less than or equal to a threshold voltage of a gate electrode G is applied to the gate electrode G with reference to a potential of a first ohmic electrode S, thereby conducting a current flow from the first ohmic electrode S to a second ohmic electrode D and blocking a current flow from the second ohmic electrode D to the first ohmic electrode S.
摘要翻译：电动机驱动电路包括三相逆变器电路8，其包括用于驱动三相电动机3的不同相的上臂的三个上臂开关元件56a至56c和用于驱动的三个下臂开关元件56d至56f 不同阶段的下臂。上臂开关元件56a至56c和下臂开关元件56d至56f中的至少一个是执行二极管操作的半导体元件。二极管操作是参照第一欧姆电极S的电位将小于或等于栅电极G的阈值电压的电压施加到栅电极G的操作，从而从第一欧姆电极S连接到第二欧姆电极D并阻塞从第二欧姆电极D到第一欧姆电极S的电流。

75. 发明申请

US20070126026A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20070126026A1
公开(公告)日：2007-06-07
申请号：US11593016
申请日：2006-11-06
申请人： Hiroaki Ueno , Manabu Yanagihara , Yasuhiro Uemoto , Tsuyoshi Tanaka
发明人： Hiroaki Ueno , Manabu Yanagihara , Yasuhiro Uemoto , Tsuyoshi Tanaka
IPC分类号： H01L31/00
CPC分类号： H01L29/7787 , H01L23/3732 , H01L29/2003 , H01L29/66462 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a first group-III nitride semiconductor layer formed on a substrate; a second group-III nitride semiconductor layer made of a single layer or two or more layers, formed on the first group-III nitride semiconductor layer, and acting as a barrier layer; a source electrode, a drain electrode, and a gate electrode formed on the second group-III nitride semiconductor layer, the gate electrode controlling a current flowing between the source and drain electrodes; and a heat radiation film with high thermal conductivity which covers, as a surface passivation film, the entire surface other than a bonding pad.
摘要翻译：半导体器件包括：形成在衬底上的第一III族氮化物半导体层; 形成在第一III族氮化物半导体层上并且用作阻挡层的由单层或两层或更多层制成的第二III族氮化物半导体层; 形成在所述第二III族氮化物半导体层上的源电极，漏电极和栅极，所述栅电极控制在所述源极和漏极之间流动的电流; 以及具有高导热性的热辐射膜，其覆盖除了焊盘之外的整个表面作为表面钝化膜。

76. 发明授权

US08344463B2 Bidirectional switch 有权
标题翻译：双向开关
公开(公告)号：US08344463B2
公开(公告)日：2013-01-01
申请号：US12681567
申请日：2009-07-10
申请人： Manabu Yanagihara , Kazushi Nakazawa , Tatsuo Morita , Yasuhiro Uemoto
发明人： Manabu Yanagihara , Kazushi Nakazawa , Tatsuo Morita , Yasuhiro Uemoto
IPC分类号： H01L27/88
CPC分类号： H01L27/088 , H01L23/481 , H01L23/4824 , H01L29/0692 , H01L29/1608 , H01L29/2003 , H01L29/4175 , H01L29/42316 , H01L29/475 , H01L29/7786 , H01L2924/0002 , H01L2924/00
摘要： A bidirectional switch includes a plurality of unit cells 11 including a first ohmic electrode 15, a first gate electrode 17, a second gate electrode 18, and a second ohmic electrode 16. The first gate electrodes 15 are electrically connected via a first interconnection 31 to a first gate electrode pad 43. The second gate electrodes 18 are electrically connected via a second interconnection 32 to a second gate electrode pad 44. A unit cell 11 including a first gate electrode 17 having the shortest interconnect distance from the first gate electrode pad 43 includes a second gate electrode 18 having the shortest interconnect distance from the second gate electrode pad 44.
摘要翻译：双向开关包括多个单元电池11，其包括第一欧姆电极15，第一栅极电极17，第二栅极电极18和第二欧姆电极16.第一栅电极15经由第一互连线31电连接到第一栅极电极焊盘43.第二栅电极18经由第二互连32电连接到第二栅极电极焊盘44.单元电池11包括与第一栅电极焊盘43的布线距离最短的第一栅电极17 包括与第二栅电极焊盘44的互连距离最短的第二栅电极18。

77. 发明申请

US20060065918A1 Semiconductor device and method of fabricating the same 有权
公开(公告)号：US20060065918A1
公开(公告)日：2006-03-30
申请号：US11270615
申请日：2005-11-10
申请人： Yoshihisa Nagano , Yasuhiro Uemoto
发明人： Yoshihisa Nagano , Yasuhiro Uemoto
IPC分类号： H01L21/8244
CPC分类号： H01L27/10894 , H01L27/10852 , H01L27/11507 , H01L27/11509 , H01L28/55
摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

78. 发明授权

US06867462B2 Semiconductor device using an SOI substrate and having a trench isolation and method for fabricating the same 失效
标题翻译：使用SOI衬底并具有沟槽隔离的半导体器件及其制造方法
公开(公告)号：US06867462B2
公开(公告)日：2005-03-15
申请号：US10636653
申请日：2003-08-08
申请人： Satoshi Nakazawa , Satoru Ouchi , Yasuhiro Uemoto
发明人： Satoshi Nakazawa , Satoru Ouchi , Yasuhiro Uemoto
IPC分类号： H01L21/762 , H01L21/84 , H01L27/12 , H01L27/095 , H01L29/861
CPC分类号： H01L21/76275 , H01L21/76264 , H01L21/76283 , H01L21/84 , H01L27/1203
摘要： A trench isolation region separating active regions in which MISFETs are formed includes: side insulating films covering the sides of a trench; polycrystalline semiconductor layers of a first conductivity type covering the respective sides of the side insulating films; and a polycrystalline semiconductor layer of a second conductivity type filling a gap between the polycrystalline semiconductor layers of the first conductivity type. Two pn junctions extending along the depth direction of the trench are formed between each of the polycrystalline semiconductor layers of the first conductivity type and the polycrystalline semiconductor layer of the second conductivity type. Upon application of a voltage between the active regions, a depletion layer expands in one of the pn junctions, so that the voltage is also partly applied to the depletion layer. As a result, the concentration of electric field in the side insulating films is relaxed.
摘要翻译：分离其中形成有MISFET的有源区的沟槽隔离区包括：覆盖沟槽侧面的侧绝缘膜; 覆盖侧面绝缘膜的各个侧面的第一导电类型的多晶半导体层; 以及填充第一导电类型的多晶半导体层之间的间隙的第二导电类型的多晶半导体层。在沟道的深度方向上延伸的两个pn结形成在第一导电类型的多晶半导体层和第二导电类型的多晶半导体层之间。在有源区域之间施加电压时，耗尽层在pn结中的一个中膨胀，使得电压也部分地施加到耗尽层。结果，侧绝缘膜中的电场浓度被放宽。

79. 发明授权

US06849521B2 Method for manufacturing a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US06849521B2
公开(公告)日：2005-02-01
申请号：US09938528
申请日：2001-08-27
申请人： Koji Arita , Yasuhiro Uemoto
发明人： Koji Arita , Yasuhiro Uemoto
IPC分类号： H01L21/02 , H01L21/76 , H01L21/762 , H01L27/08 , H01L27/12
CPC分类号： H01L21/76264 , H01L21/76283 , H01L21/76286
摘要： In a semiconductor layer formed on a first insulating film is formed an element isolation groove extending to the first insulating film. Thereafter, a second insulating film is deposited in the element isolation groove by using a vapor deposition method.
摘要翻译：在形成在第一绝缘膜上的半导体层中形成有延伸到第一绝缘膜的元件隔离槽。此后，通过使用气相沉积法将第二绝缘膜沉积在元件隔离槽中。

80. 发明授权

US06756282B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06756282B2
公开(公告)日：2004-06-29
申请号：US10164409
申请日：2002-06-10
申请人： Yoshihisa Nagano , Yasuhiro Uemoto
发明人： Yoshihisa Nagano , Yasuhiro Uemoto
IPC分类号： H01L2120
CPC分类号： H01L27/10894 , H01L27/10852 , H01L27/11507 , H01L27/11509 , H01L28/55
摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.
摘要翻译：保护绝缘膜沉积在形成在半导体衬底上的第一和第二场效应晶体管上。在保护绝缘膜上形成由电容器下电极构成的电容器，由绝缘金属氧化物膜构成的电容绝缘膜和电容器上电极。形成在保护绝缘膜中的第一接触插塞提供电容器下电极和第一场效应晶体管的杂质扩散层之间的直接连接。形成在保护绝缘膜中的第二接触插塞提供电容器上电极和第二场效应晶体管的杂质扩散层之间的直接连接。

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