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71. 发明申请

US20090191701A1 MICROELECTRONIC DEVICES AND METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC DEVICES 有权
标题翻译：用于在微电子设备中形成互连的微电子器件和方法
公开(公告)号：US20090191701A1
公开(公告)日：2009-07-30
申请号：US12419029
申请日：2009-04-06
申请人： Kyle K. Kirby , Salman Akram , David R. Hembree , Sidney B. Rigg , Warren M. Farnworth , William M. Hiatt
发明人： Kyle K. Kirby , Salman Akram , David R. Hembree , Sidney B. Rigg , Warren M. Farnworth , William M. Hiatt
IPC分类号： H01L21/768
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/48 , H01L2224/48091 , H01L2224/48465 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H05K1/0306 , H05K3/4038 , H05K3/422 , H05K3/423 , H05K2201/0305 , H05K2201/09827 , H05K2203/072 , H05K2203/1147 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.
摘要翻译：本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微电子器件中形成互连的方法。在一个实施例中，一种方法包括提供具有正面和背面的微电子衬底。衬底具有包括集成电路的微电子管芯和可操作地耦合到集成电路的端子。该方法还包括至少部分地形成通过基底并且在基底的前侧和/或后侧具有开口的通道。该方法还包括用封闭通道一端的导电盖密封开口，同时通道的另一端保持打开。该方法然后包括用导电材料填充通道。

72. 发明授权

US07498260B2 Pass through via technology for use during the manufacture of a semiconductor device 有权
标题翻译：通过半导体器件制造过程中使用的通孔技术
公开(公告)号：US07498260B2
公开(公告)日：2009-03-03
申请号：US11732356
申请日：2007-04-03
申请人： William M. Hiatt
发明人： William M. Hiatt
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L23/481 , H01L25/0657 , H01L25/50 , H01L2225/06513 , H01L2225/06541 , H01L2924/0002 , H01L2924/00
摘要： A method for forming vias which pass through a semiconductor wafer substrate assembly such as a semiconductor die or wafer allows two different types of connections to be formed during a single formation process. One connection passes through the wafer without being electrically coupled to the wafer, while the other connection electrically connects to a conductive pad. To connect to a pad, a larger opening is etched into an overlying dielectric layer, while to pass through a pad without connection, a narrower opening is etched into the overlying dielectric layer. An inventive structure resulting from the method is also described.
摘要翻译：用于形成通过诸如半导体管芯或晶片的半导体晶片衬底组件的通孔的方法允许在单个形成过程期间形成两种不同类型的连接。一个连接通过晶片而不电耦合到晶片，而另一个连接电连接到导电焊盘。为了连接到焊盘，较大的开口被蚀刻到覆盖的介电层中，而在不连接的情况下通过焊盘，较窄的开口被蚀刻到覆盖的介电层中。还描述了由该方法产生的创造性结构。

73. 发明授权

US07488899B2 Compliant contact pin assembly and card system 失效
标题翻译：符合接触针组件和卡片系统
公开(公告)号：US07488899B2
公开(公告)日：2009-02-10
申请号：US11151925
申请日：2005-06-14
申请人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
发明人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
IPC分类号： H01R12/04 , H05K1/11
CPC分类号： G01R1/0735 , G01R1/07314 , H01L23/13 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H01R12/714 , H01R13/24 , H01R2201/20 , H05K3/326 , H05K7/1069 , H05K2201/0314 , H05K2201/09036 , H05K2201/10378 , Y10T29/49165 , Y10T29/49174 , Y10T29/49204 , Y10T29/49222 , H01L2224/05599
摘要： A compliant contact pin assembly and a contactor card system are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within the substrate results in a compliant deflection orthogonal to the plane of the substrate. The contact pin assembly is formed by generally thinning the substrate around the contact pin location and then specifically thinning the substrate immediately around the contact pin location for forming a void. The contact pin is compliantly coupled, in one embodiment by compliant coupling material, and in another embodiment by compliantly flexible portions of the substrate.
摘要翻译：提供了柔性接触销组件和接触器卡系统。柔性接触销组件包括由基板的一部分形成的接触销，其中触头销顺从地保持通过柔性联接结构悬挂在基板内。衬底内的悬浮液导致与衬底的平面垂直的柔顺偏转。接触销组件通过使基板围绕接触销位置大体变薄而形成，然后特别地使基板在接触销位置周围特别地变薄以形成空隙。在一个实施例中，接触销被顺从地联接，在一个实施例中通过柔性耦合材料，并且在另一个实施例中，通过柔性柔性部分的衬底。

74. 发明申请

US20080290435A1 WAFER LEVEL LENS ARRAYS FOR IMAGE SENSOR PACKAGES AND THE LIKE, IMAGE SENSOR PACKAGES, AND RELATED METHODS 审中-公开
标题翻译：图像传感器包装的像素水平镜头阵列和类似的图像传感器包以及相关方法
公开(公告)号：US20080290435A1
公开(公告)日：2008-11-27
申请号：US11751206
申请日：2007-05-21
申请人： Steve Oliver , Kyle K. Kirby , Warren M. Farnworth , William M. Hiatt , Salman Akram
发明人： Steve Oliver , Kyle K. Kirby , Warren M. Farnworth , William M. Hiatt , Salman Akram
IPC分类号： H01L31/0232 , B29D11/00 , H01L21/00
CPC分类号： B29D11/00375 , H01L27/14618 , H01L27/14625 , H01L27/14632 , H01L27/14685 , H01L2924/0002 , H01L2924/00
摘要： Image sensor packages, lenses therefore, and methods for fabrication are disclosed. A substrate having through-hole vias may be provided, and an array of lenses may be formed in the vias. The lenses may be formed by molding or by tenting material over the vias. An array of lenses may provide a color filter array (CFA). Filters of the CFA may be formed in the vias, and lenses may be formed in or over the vias on either side of the filters. A substrate may include an array of microlenses, and each microlens of the array may correspond to a pixel of an associated image sensor. In other embodiments, each lens of the array may correspond to an imager array of an image sensor. A wafer having an array of lenses may be aligned with and attached to an imager wafer comprising a plurality of image sensor dice, then singulated to form a plurality of image sensor packages.
摘要翻译：公开了图像传感器封装，透镜以及制造方法。可以提供具有通孔过孔的衬底，并且可以在通孔中形成透镜阵列。透镜可以通过模制或通过在通孔上的材料的凸起来形成。透镜阵列可以提供滤色器阵列（CFA）。可以在过孔中形成CFA的过滤器，并且透镜可以形成在过滤器两侧的通孔中或上方。衬底可以包括微透镜阵列，并且阵列的每个微透镜可以对应于相关联的图像传感器的像素。在其他实施例中，阵列的每个透镜可以对应于图像传感器的成像器阵列。具有透镜阵列的晶片可以与包括多个图像传感器芯片的成像器晶片对准并且附接到成像器晶片，然后被单个化以形成多个图像传感器封装。

75. 发明授权

US07425499B2 Methods for forming interconnects in vias and microelectronic workpieces including such interconnects 有权
标题翻译：用于在通孔和包括这种互连的微电子工件中形成互连的方法
公开(公告)号：US07425499B2
公开(公告)日：2008-09-16
申请号：US10925501
申请日：2004-08-24
申请人： Steven D. Oliver , Kyle K. Kirby , William M. Hiatt
发明人： Steven D. Oliver , Kyle K. Kirby , William M. Hiatt
IPC分类号： H01L21/44
CPC分类号： H01L21/76898
摘要： Methods for forming interconnects in blind vias or other types of holes, and microelectronic workpieces having such interconnects. The blind vias can be formed by first removing the bulk of the material from portions of the back side of the workpiece without thinning the entire workpiece. The bulk removal process, for example, can form a first opening that extends to an intermediate depth within the workpiece, but does not extend to the contact surface of the electrically conductive element. After forming the first opening, a second opening is formed from the intermediate depth in the first opening to the contact surface of the conductive element. The second opening has a second width less than the first width of the first opening. This method further includes filling the blind vias with a conductive material and subsequently thinning the workpiece from the exterior side until the cavity is eliminated.
摘要翻译：用于在盲孔或其它类型的孔中形成互连的方法，以及具有这种互连的微电子工件。盲孔可以通过首先从工件的后侧的部分去除大部分材料而不使整个工件变薄来形成。散装移除过程例如可以形成延伸到工件内的中间深度但不延伸到导电元件的接触表面的第一开口。在形成第一开口之后，从第一开口的中间深度到导电元件的接触表面形成第二开口。第二开口具有小于第一开口的第一宽度的第二宽度。该方法还包括用导电材料填充盲孔，随后从外侧使工件变薄直到空腔被消除。

76. 发明授权

US07329943B2 Microelectronic devices and methods for forming interconnects in microelectronic devices 有权
标题翻译：用于在微电子器件中形成互连的微电子器件和方法
公开(公告)号：US07329943B2
公开(公告)日：2008-02-12
申请号：US11416824
申请日：2006-05-03
申请人： Kyle K. Kirby , Salman Akram , David R. Hembree , Sidney B. Rigg , Warren M. Farnworth , William M. Hiatt
发明人： Kyle K. Kirby , Salman Akram , David R. Hembree , Sidney B. Rigg , Warren M. Farnworth , William M. Hiatt
IPC分类号： H01L29/40
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/48 , H01L2224/48091 , H01L2224/48465 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H05K1/0306 , H05K3/4038 , H05K3/422 , H05K3/423 , H05K2201/0305 , H05K2201/09827 , H05K2203/072 , H05K2203/1147 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.
摘要翻译：本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微电子器件中形成互连的方法。在一个实施例中，一种方法包括提供具有正面和背面的微电子衬底。衬底具有包括集成电路的微电子管芯和可操作地耦合到集成电路的端子。该方法还包括至少部分地形成通过基底并且在基底的前侧和/或后侧具有开口的通道。该方法还包括用封闭通道一端的导电盖密封开口，同时通道的另一端保持打开。该方法然后包括用导电材料填充通道。

77. 发明授权

US07287326B2 Methods of forming a contact pin assembly 失效
标题翻译：形成接触销组件的方法
公开(公告)号：US07287326B2
公开(公告)日：2007-10-30
申请号：US11152496
申请日：2005-06-14
申请人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
发明人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
IPC分类号： H01R43/16 , H10R43/00
CPC分类号： G01R1/0735 , G01R1/07314 , H01L23/13 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H01R12/714 , H01R13/24 , H01R2201/20 , H05K3/326 , H05K7/1069 , H05K2201/0314 , H05K2201/09036 , H05K2201/10378 , Y10T29/49165 , Y10T29/49174 , Y10T29/49204 , Y10T29/49222 , H01L2224/05599
摘要： A compliant contact pin assembly method for making is provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within the substrate results in a compliant deflection orthogonal to the plane of the substrate. The contact pin assembly is formed by generally thinning the substrate around the contact pin location and then specifically thinning the substrate immediately around the contact pin location for forming a void. The contact pin is compliantly coupled, in one embodiment by compliant coupling material, and in another embodiment by compliantly flexible portions of the substrate.
摘要翻译：提供了一种用于制造的柔性接触销组装方法。柔性接触销组件包括由基板的一部分形成的接触销，其中触头销顺从地保持通过柔性联接结构悬挂在基板内。衬底内的悬浮液导致与衬底的平面垂直的柔顺偏转。接触销组件通过使基板围绕接触销位置大体变薄而形成，然后特别地使基板在接触销位置周围特别地变薄以形成空隙。在一个实施例中，接触销被顺从地联接，在一个实施例中通过柔性耦合材料，并且在另一个实施例中，通过柔性柔性部分的衬底。

78. 发明授权

US07282932B2 Compliant contact pin assembly, card system and methods thereof 失效
标题翻译：符合接触针组件，卡片系统及其方法
公开(公告)号：US07282932B2
公开(公告)日：2007-10-16
申请号：US10791195
申请日：2004-03-02
申请人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
发明人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
IPC分类号： G01R31/02
CPC分类号： G01R1/0735 , G01R1/07314 , H01L23/13 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H01R12/714 , H01R13/24 , H01R2201/20 , H05K3/326 , H05K7/1069 , H05K2201/0314 , H05K2201/09036 , H05K2201/10378 , Y10T29/49165 , Y10T29/49174 , Y10T29/49204 , Y10T29/49222 , H01L2224/05599
摘要： A compliant contact pin assembly, a contactor card, a testing system and methods for making and testing are provided. A compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within the substrate results in a compliant deflection orthogonal to the plane of the substrate. The contact pin assembly is formed by generally thinning the substrate around the contact pin location and then specifically thinning the substrate immediately around the contact pin location for forming a void. The contact pin is compliantly coupled, in one embodiment by compliant coupling material, and in another embodiment by compliantly flexible portions of the substrate.
摘要翻译：提供了兼容的接触针组件，接触器卡，测试系统以及制造和测试方法。柔性接触销组件包括由衬底的一部分形成的接触针，其中触发销通过柔性耦合结构顺应地保持悬挂在衬底内。衬底内的悬浮液导致与衬底的平面垂直的柔顺偏转。接触销组件通过使基板围绕接触销位置大体变薄而形成，然后特别地使基板在接触销位置周围特别地变薄以形成空隙。在一个实施例中，接触销被顺从地联接，在一个实施例中通过柔性耦合材料，并且在另一个实施例中，通过柔性柔性部分的衬底。

79. 发明授权

US07262134B2 Microfeature workpieces and methods for forming interconnects in microfeature workpieces 有权
公开(公告)号：US07262134B2
公开(公告)日：2007-08-28
申请号：US11218243
申请日：2005-09-01
申请人： Kyle K. Kirby , William M. Hiatt , Richard L. Stocks
发明人： Kyle K. Kirby , William M. Hiatt , Richard L. Stocks
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L21/76868 , H01L21/76873 , H01L23/481 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要： Methods for forming interconnects in microfeature workpieces, and microfeature workpieces having such interconnects are disclosed herein. In one embodiment, a method of forming an interconnect in a microfeature workpiece includes forming a hole extending through a terminal and a dielectric layer to at least an intermediate depth in a substrate of a workpiece. The hole has a first lateral dimension in the dielectric layer and a second lateral dimension in the substrate proximate to an interface between the dielectric layer and the substrate. The second lateral dimension is greater than the first lateral dimension. The method further includes constructing an electrically conductive interconnect in at least a portion of the hole and in electrical contact with the terminal.

80. 发明授权

US07232754B2 Microelectronic devices and methods for forming interconnects in microelectronic devices 有权
标题翻译：用于在微电子器件中形成互连的微电子器件和方法
公开(公告)号：US07232754B2
公开(公告)日：2007-06-19
申请号：US10879838
申请日：2004-06-29
申请人： Kyle K. Kirby , Salman Akram , David R. Hembree , Sidney B. Rigg , Warren M. Farnworth , William M. Hiatt
发明人： Kyle K. Kirby , Salman Akram , David R. Hembree , Sidney B. Rigg , Warren M. Farnworth , William M. Hiatt
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/48 , H01L2224/48091 , H01L2224/48465 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H05K1/0306 , H05K3/4038 , H05K3/422 , H05K3/423 , H05K2201/0305 , H05K2201/09827 , H05K2203/072 , H05K2203/1147 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.
摘要翻译：本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微电子器件中形成互连的方法。在一个实施例中，一种方法包括提供具有正面和背面的微电子衬底。衬底具有包括集成电路的微电子管芯和可操作地耦合到集成电路的端子。该方法还包括至少部分地形成通过基底并且在基底的前侧和/或后侧具有开口的通道。该方法还包括用封闭通道一端的导电盖密封开口，同时通道的另一端保持打开。该方法然后包括用导电材料填充通道。

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