会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 76. 发明授权
    • Active device array substrate
    • 有源器件阵列衬底
    • US08502948B2
    • 2013-08-06
    • US12858433
    • 2010-08-17
    • Kuo-Chang SuKuo-Hua HsuChun-Hsin LiuYung-Chih Chen
    • Kuo-Chang SuKuo-Hua HsuChun-Hsin LiuYung-Chih Chen
    • G02F1/1343
    • G02F1/136286G09G3/3614G09G3/3648G09G2300/0426G09G2300/0452G09G2320/0233G09G2330/021
    • An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.
    • 有源器件阵列衬底包括衬底,第一扫描线,第二扫描线,数据线和像素。 第一和第二扫描线沿着第一方向交替排列。 数据线沿第二方向平行布置。 像素被布置成形成沿第一方向交替布置的第一像素行和第二像素行。 第一像素行包括分别电连接到第一扫描线,第二扫描线和数据线的第一和第二像素。 第二像素行包括分别电连接到第一扫描线,第二扫描线和数据线的第三和第四像素。 两个相邻数据线之间的像素排列成两列。 在同一列中的像素中,奇数行和偶数行中的像素分别电连接到不同的数据线。
    • 78. 发明申请
    • LIQUID CRYSTAL DISPLAY DEVICE
    • 液晶显示装置
    • US20120169679A1
    • 2012-07-05
    • US13316572
    • 2011-12-12
    • Chih-Ying LinChun-Hsin LiuKuo-Chang SuYung-Chih Chen
    • Chih-Ying LinChun-Hsin LiuKuo-Chang SuYung-Chih Chen
    • G09G3/36G06F3/038
    • G09G3/3688G02F1/13624
    • A liquid crystal display device includes a plurality of pixel driving circuits and a pixel array. Each pixel driving circuit of the plurality of pixel driving circuits includes four thin film transistors and has four output terminals, where each thin film transistor is used for driving an output terminal of the four output terminals, and the four output terminals are coupled to two gate lines and two sharing lines respectively for outputting two main output signals and two sharing output signals. The phases and timings of the two main output signals and the two sharing output signals are all the same. A pixel of the pixel array is charged/discharged to a specific voltage level according to a main output signal of the two main output signals, a sharing output signal, and a signal of a data line.
    • 液晶显示装置包括多个像素驱动电路和像素阵列。 多个像素驱动电路的每个像素驱动电路包括四个薄膜晶体管,并且具有四个输出端子,其中每个薄膜晶体管用于驱动四个输出端子的输出端子,并且四个输出端子耦合到两个栅极 线路和两条共用线路分别输出两路主输出信号和两路共享输出信号。 两个主输出信号和两个共享输出信号的相位和时序都相同。 像素阵列的像素根据两个主输出信号的主输出信号,共享输出信号和数据线的信号而被充/放电到特定电压电平。
    • 80. 发明申请
    • SHIFT REGISTER CIRCUIT
    • 移位寄存器电路
    • US20120140871A1
    • 2012-06-07
    • US13049863
    • 2011-03-16
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • G11C19/28G11C19/00
    • G09G3/20G09G3/3674G09G2310/0267G09G2310/0286G09G2310/08G09G2330/021G11C19/28
    • A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.
    • 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括输入单元,上拉单元,下拉单元,控制单元和辅助下拉单元。 输入单元被用于根据至少一个第一输入信号输出驱动控制电压。 上拉单元根据驱动控制电压和系统时钟提取相应的门信号。 下拉单元根据控制信号将相应的门信号拉低至第一电源电压。 控制单元用于根据相应的门信号产生控制信号。 辅助下拉单元根据第二输入信号将驱动控制电压下拉到第二电源电压。