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71. 发明授权

US07517439B2 Error detection in analyte measurements based on measurement of system resistance 有权
标题翻译：基于测量系统电阻的分析物测量中的误差检测
公开(公告)号：US07517439B2
公开(公告)日：2009-04-14
申请号：US10907817
申请日：2005-04-15
申请人： Ian Harding , Richard Williams , Steven Diamond
发明人： Ian Harding , Richard Williams , Steven Diamond
IPC分类号： G01F1/64
CPC分类号： C12Q1/006 , G01N27/3273
摘要： Measurement of the series resistance of a working and counter electrode pair in an electrochemical test strip provide error detection for multiple variations in the quality of the test strip, as well as the operation of strip in the test meter. In particular, a single measurement of series resistance can be used to detect and generate an error message when an incorrect reading is likely to result due to (1) damaged electrode tracks, (2) fouled electrode surfaces, (3) dirty strip contacts, or (4) short circuit between the electrodes.
摘要翻译：在电化学测试条中对工作电极对和对电极对的串联电阻的测量提供了测试条质量的多种变化以及测试仪中条带的操作的错误检测。特别地，当由于（1）损坏的电极轨迹，（2）污染的电极表面，（3）脏的带状接触，或者（3））导致不正确的读数时，可以使用串联电阻的单次测量来检测并产生错误信息，或（4）电极之间的短路。

72. 发明授权

US07490629B2 Plug kit 失效
标题翻译：插头套件
公开(公告)号：US07490629B2
公开(公告)日：2009-02-17
申请号：US11531772
申请日：2006-09-14
申请人： Linda Williams , Richard Williams
发明人： Linda Williams , Richard Williams
IPC分类号： F16L55/10
CPC分类号： F16L55/1141 , Y10S220/19
摘要： A plug kit of sealing apertures. There is: a first plug, including: a first solid cylindrical flexible member, having: a first end with a first diameter; and a second end, opposite the first end, the second end having a second diameter smaller than the first diameter, wherein the diameter of the first solid cylindrical flexible member decreases step-wise along a length of the first solid cylindrical flexible member; and a second plug, including: a second solid cylindrical flexible member, having: a third end with a third diameter, wherein the third diameter is larger than the first diameter; and a fourth end, opposite the third end, the fourth end having a fourth diameter smaller than the third diameter, smaller than the first diameter, and larger than the second diameter, wherein the diameter of the second solid cylindrical flexible member decreases step-wise along a length of the second solid cylindrical flexible member.
摘要翻译：密封孔插头套件。存在：第一插塞，包括：第一实心圆柱形柔性构件，具有：具有第一直径的第一端; 以及第二端，与所述第一端相对，所述第二端具有小于所述第一直径的第二直径，其中所述第一实心圆柱形柔性构件的直径沿着所述第一实心圆柱形柔性构件的长度逐步减小; 以及第二塞子，包括：第二实心圆柱形柔性构件，具有：具有第三直径的第三端，其中所述第三直径大于所述第一直径; 以及第四端，与所述第三端相对，所述第四端的第四直径小于所述第三直径，小于所述第一直径，并且大于所述第二直径，其中所述第二实心圆柱形柔性构件的直径逐步减小沿着第二实心圆柱形柔性构件的长度。

73. 发明申请

US20080109445A1 SYSTEMS AND METHODS OF ENHANCING LEADS 有权
标题翻译：增强领导力的系统和方法
公开(公告)号：US20080109445A1
公开(公告)日：2008-05-08
申请号：US11671424
申请日：2007-02-05
申请人： Richard Williams , Jacob Kong , Lawrence J. Hughes , Damodar Panigrahi , Maria Luisa Kirgan , Rasoul Hajikhani
发明人： Richard Williams , Jacob Kong , Lawrence J. Hughes , Damodar Panigrahi , Maria Luisa Kirgan , Rasoul Hajikhani
IPC分类号： G06F7/00
CPC分类号： G06Q30/0201 , G06Q30/00 , G06Q30/0202
摘要： A client transmits one or more lead records to a lead enhancement module that is configured to enhance the received lead records and return enhanced lead records to the client. The lead enhancement module may return a contactability score for each lead record, indicating a likelihood that the individual identified in the lead may be contacted using the contact information provided in the lead record and/or additional contract information located by the lead enhancement module. The lead enhancement module may also receive additional data items associated with leads from one or more data sources. Additionally, statistical models that may be customized for each client may be applied to information associated with lead records in order to determine one or more propensity scores for each of the lead records, where a propensity score indicates a likelihood that an individual will take a particular action, such as purchasing particular goods or services.
摘要翻译：客户端将一个或多个引导记录传送到引导增强模块，引导增强模块被配置为增强接收到的引导记录并将增强的引导记录返回给客户端。潜在客户增强模块可以返回每个潜在客户记录的可接触性评分，指示可以使用在领先记录中提供的联系信息和/或由引导增强模块定位的附加合同信息来联系领先者中识别的个体。引线增强模块还可以接收与来自一个或多个数据源的引线相关联的附加数据项。另外，可以针对每个客户端定制的统计模型可以应用于与铅记录相关联的信息，以便确定每个潜在记录的一个或多个倾向得分，其中倾向得分指示个体将采取特定的可能性行动，如购买特定商品或服务。

74. 发明申请

US20080109444A1 SYSTEMS AND METHODS OF ENHANCING LEADS 有权
标题翻译：增强领导力的系统和方法
公开(公告)号：US20080109444A1
公开(公告)日：2008-05-08
申请号：US11671412
申请日：2007-02-05
申请人： Richard Williams , Jacob Kong , Lawrence J. Hughes , Damodar Panigrahi
发明人： Richard Williams , Jacob Kong , Lawrence J. Hughes , Damodar Panigrahi
IPC分类号： G06F7/00
CPC分类号： G06Q30/02 , Y10S707/99943
摘要： A lead enhancement module transmits to one or more data sources an enhancement list requesting additional data items associated with a lead record. The enhancement list may comprise one or more data bundles, each comprising indicators associated with one or more additional data items. A personalized data bundle may be created by each client listing those specific additional data items that the particular client would like to retrieve for lead records from the client. A default data bundle may be included in the enhancement list for clients that have not defined a personalized data bundle, or the default bundle may be included in the enhancement list in addition to the personalized data bundle. Various default bundles, such as vertical market specific data bundles, may be created and provided to the client for possible inclusion in the enhancement list.
摘要翻译：引导增强模块向一个或多个数据源发送请求与引导记录相关联的附加数据项的增强列表。增强列表可以包括一个或多个数据束，每个数据束包括与一个或多个附加数据项相关联的指示符。可以由每个客户端创建个性化数据包，列出特定客户端想要从客户端检索铅记录的特定附加数据项。默认数据包可能包含在尚未定义个性化数据包的客户端的增强列表中，或者除了个性化数据包之外，默认包可能包含在增强列表中。可以创建各种默认的捆绑包，例如垂直市场特定的数据包，并将其提供给客户端，以便可能包含在增强列表中。

75. 发明申请

US20080093230A1 Electrochemical determination of analytes 有权
标题翻译：分析物的电化学测定
公开(公告)号：US20080093230A1
公开(公告)日：2008-04-24
申请号：US11874772
申请日：2007-10-18
申请人： Steven Diamond , Ian Harding , Sridhar Iyengar , Richard Williams
发明人： Steven Diamond , Ian Harding , Sridhar Iyengar , Richard Williams
IPC分类号： G01N33/66 , G01N27/26
CPC分类号： G01N27/3274
摘要： Determination of an analyte with increased accuracy is achieved by electrochemically determining an initial analyte concentration, performing a plurality of amperometric/potentiometric switching cycles, observing a characteristic of the signal during each of the plurality of switching cycles, determining an averaged value for the characteristic of the signal, and correcting the initial measurement value to arrive at a final measurement value of analyte concentration or rejecting the initial measurement value depending on the averaged value of the characteristic of the signal. The characteristic of the signal that is observed is not per se indicative of the amount of analyte present in a sample. Rather, it is a characteristic of the signal that reflects the quality of the electrodes, the extent of fill of the electrochemical cell or characteristics of the sample other than analyte concentration such as oxygen levels or hematocrit.
摘要翻译：通过电化学测定初始分析物浓度，执行多个电流/电位开关周期，观察多个开关周期中的每一个期间的信号特性，确定分析物的特性的平均值，信号，并且校正初始测量值以获得分析物浓度的最终测量值或者根据信号的特性的平均值来拒绝初始测量值。观察到的信号的特征本身并不表示样品中存在的分析物的量。相反，它是反映电极质量，电化学电池的填充程度或样品的特征的信号的特征，而不是诸如氧水平或血细胞比容的分析物浓度。

76. 发明申请

US20080083951A1 FETS WITH SELF-ALIGNED BODIES AND BACKGATE HOLES 审中-公开
标题翻译：具有自对准体和背部孔的FET
公开(公告)号：US20080083951A1
公开(公告)日：2008-04-10
申请号：US11869766
申请日：2007-10-10
申请人： Brent Anderson , Andres Bryant , Edward Nowak , Richard Williams
发明人： Brent Anderson , Andres Bryant , Edward Nowak , Richard Williams
IPC分类号： H01L27/12
CPC分类号： H01L29/78612 , H01L29/66772 , H01L29/78621 , H01L29/78648
摘要： Embodiments of the invention disclose a design structure for a FET with a shallow source/drain region, a deep channel region, a gate stack and a back gate that is surrounded by dielectric. The FET structure also includes halo or pocket implants that extend through the entire depth of the channel region. Because a portion of the halo and well doping of the channel is deeper than the source/drain depth, better threshold voltage and process control is achieved. A back-gated FET structure is also provided having a first dielectric layer in this structure that runs under the shallow source/drain region between the channel region and the back gate. This first dielectric layer extends from under the source/drain regions on either side of the back gate and is in contact with a second dielectric such that the back gate is bounded on each side or isolated by dielectric.
摘要翻译：本发明的实施例公开了具有浅电源/漏极区域，深沟道区域，栅极叠层和被电介质包围的背栅的FET的设计结构。 FET结构还包括延伸通过通道区域的整个深度的晕或凹坑植入物。因为沟道的一部分光晕和阱掺杂比源极/漏极深度更深，所以实现了更好的阈值电压和过程控制。还提供了后栅化FET结构，其具有在该结构中的第一介电层，其在沟道区域和后栅极之间的浅源极/漏极区域下方延伸。该第一电介质层从背栅的两侧的源极/漏极区下方延伸并与第二电介质接触，使得后栅极在每一侧上界定或通过电介质隔离。

77. 发明申请

US20080067586A1 High-voltage bipolar-CMOS-DMOS integrated circuit devices and modular methods of forming the same 有权
公开(公告)号：US20080067586A1
公开(公告)日：2008-03-20
申请号：US11982781
申请日：2007-11-05
申请人： Richard Williams , Donald Disney , Jun-Wei Chen , Wai Chan , HyungSik Ryu
发明人： Richard Williams , Donald Disney , Jun-Wei Chen , Wai Chan , HyungSik Ryu
IPC分类号： H01L29/76
CPC分类号： H01L29/0847 , H01L21/761 , H01L21/823462 , H01L21/823481 , H01L21/823493 , H01L21/8249 , H01L27/0623 , H01L27/088 , H01L27/098 , H01L29/0696 , H01L29/0878 , H01L29/0886 , H01L29/1045 , H01L29/105 , H01L29/1083 , H01L29/1087 , H01L29/402 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66106 , H01L29/66659 , H01L29/66704 , H01L29/66901 , H01L29/7825 , H01L29/7835 , H01L29/808 , H01L29/866 , H01L2924/0002 , H01L2924/00
摘要： All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.

78. 发明申请

US20080067585A1 High-voltage bipolar-CMOS-DMOS integrated circuit devices and modular methods of forming the same 有权
公开(公告)号：US20080067585A1
公开(公告)日：2008-03-20
申请号：US11982764
申请日：2007-11-05
申请人： Richard Williams , Donald Disney , Jun-Wei Chen , Wai Chan , Hyung Ryu
发明人： Richard Williams , Donald Disney , Jun-Wei Chen , Wai Chan , Hyung Ryu
IPC分类号： H01L29/78
CPC分类号： H01L29/0847 , H01L21/761 , H01L21/823462 , H01L21/823481 , H01L21/823493 , H01L21/8249 , H01L27/0623 , H01L27/088 , H01L27/098 , H01L29/0696 , H01L29/0878 , H01L29/0886 , H01L29/1045 , H01L29/105 , H01L29/1083 , H01L29/1087 , H01L29/402 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66106 , H01L29/66659 , H01L29/66704 , H01L29/66901 , H01L29/7825 , H01L29/7835 , H01L29/808 , H01L29/866 , H01L2924/0002 , H01L2924/00
摘要： All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.

79. 发明申请

US20080061376A1 Modular bipolar-CMOS-DMOS analog integrated circuit & power transistor technology 有权
标题翻译：模块化双极CMOS-DMOS模拟集成电路和功率晶体管技术
公开(公告)号：US20080061376A1
公开(公告)日：2008-03-13
申请号：US11980051
申请日：2007-10-30
申请人： Richard Williams , Michael Cornell , Wai Chan
发明人： Richard Williams , Michael Cornell , Wai Chan
IPC分类号： H01L27/092
CPC分类号： H01L29/7816 , H01L21/26513 , H01L21/2652 , H01L21/74 , H01L21/743 , H01L21/76216 , H01L21/76218 , H01L21/82285 , H01L21/823481 , H01L21/823493 , H01L21/823878 , H01L21/823892 , H01L21/8249 , H01L27/0623 , H01L27/0922 , H01L29/4232 , H01L29/4238 , H01L29/66272 , H01L29/7322 , H01L29/7809 , H01L29/7813 , H01L29/7835
摘要： A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
摘要翻译：在不含外延层的基板中形成半导体器件系列。在一个实施例中，该系列包括5V CMOS对，12V CMOS对，5V NPN，5V PNP，多种形式的横向沟槽MOSFET和30V侧向N沟道DMOS。每个装置在横向和垂直方面非常紧凑，并且可以与基板中的所有其它装置完全隔离。

80. 发明申请

US20080059658A1 Controlling the feeding of data from a feed buffer 审中-公开
标题翻译：控制来自进料缓冲器的数据进给
公开(公告)号：US20080059658A1
公开(公告)日：2008-03-06
申请号：US11479170
申请日：2006-06-29
申请人： Richard Williams
发明人： Richard Williams
IPC分类号： G06F3/00
CPC分类号： G06F13/387
摘要： *A method includes feeding data from a feed buffer to an interface, receiving at least one signal dependent on a temperature external to the interface, determining from the at least one received signal that a temperature of the device has risen above a first threshold, and in response to a positive determination, reducing a feeding rate of data from the feed buffer to the interface to a first predetermined rate, the first predetermined rate being non-zero. Another method includes maintaining a transmit buffer, controlling a transmitter to transmit data from the transmit buffer at a transmit data rate, the transmit data rate being dependent on the amount of data stored in the transmit buffer, feeding data from a feed buffer to the transmit buffer; and in response to determining that a temperature has risen above a first threshold, reducing a feeding rate of data from the feed buffer to the transmit buffer to a first predetermined rate, the first predetermined rate being non-zero.
摘要翻译： *一种方法包括将数据从馈送缓冲器馈送到接口，接收取决于接口外部的温度的至少一个信号，从至少一个接收到的信号确定设备的温度已经升至高于第一阈值，以及响应于肯定的确定，将数据从进给缓冲器的进给速率降低到接口到第一预定速率，第一预定速率是非零。另一种方法包括维护发射缓冲器，控制发射机以发射数据速率从发射缓冲器传输数据，发射数据速率取决于存储在发射缓冲器中的数据量，将数据从馈送缓冲器馈送到发射缓冲; 并且响应于确定温度已经升至高于第一阈值，将数据从进给缓冲器的进给速率降低到第一预定速率，第一预定速率是非零。

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