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71. 发明授权

US09264182B2 Iterative receiver loop 有权
标题翻译：迭代接收机回路
公开(公告)号：US09264182B2
公开(公告)日：2016-02-16
申请号：US13612911
申请日：2012-09-13
申请人： Mor Miller , Amit Steinberg , Daniel Wajcer , Dan Peleg , Guy Cohen
发明人： Mor Miller , Amit Steinberg , Daniel Wajcer , Dan Peleg , Guy Cohen
IPC分类号： H03M13/00 , H04L1/00 , H04L27/26 , H04L27/00
CPC分类号： H04L1/005 , H04L1/0047 , H04L1/0057 , H04L27/2655 , H04L27/266 , H04L27/2665 , H04L27/2679 , H04L27/2689 , H04L2001/0093 , H04L2027/0055 , H04L2027/0067
摘要： A method includes receiving a signal, which carries data that is encoded with an Error Correction Code (ECC), and correcting the received signal with an adaptive receiver loop. Soft input metrics for the data are computed over the corrected signal. The ECC is decoded using a decoder, which estimates soft output metrics based on the soft input metrics, by operating the decoder in an alternating pattern of external iterations that update one or more of the soft input metrics based on one or more of the soft output metrics, and internal iterations that update the soft output metrics but not the soft input metrics. The adaptive receiver loop is adjusted in a schedule that is defined relative to the pattern of the external and the internal iterations of the decoder.
摘要翻译：一种方法包括接收携带用纠错码（ECC）编码的数据的信号，并用自适应接收机环路校正接收到的信号。通过校正信号计算数据的软输入度量。使用解码器对ECC进行解码，解码器通过以基于软输出中的一个或多个更新一个或多个软输入度量的外部迭代的交替模式操作解码器来基于软输入度量来估计软输出量度指标和内部迭代更新软输出指标，而不是软输入指标。在相对于解码器的外部和内部迭代的模式定义的调度中调整自适应接收器环路。

72. 发明授权

US08828785B2 Single-crystal phase change material on insulator for reduced cell variability 有权
标题翻译：绝缘体上的单晶相变材料可减少细胞变异性
公开(公告)号：US08828785B2
公开(公告)日：2014-09-09
申请号：US13611020
申请日：2012-09-12
申请人： Guy Cohen , Simone Raoux
发明人： Guy Cohen , Simone Raoux
IPC分类号： H01L21/00
CPC分类号： B32B37/14 , B32B38/10 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1625 , H01L45/1675
摘要： Techniques for producing a single-crystal phase change material and the incorporation of those techniques in an electronic device fabrication process flow are provided. In one aspect, a method of fabricating an electronic device is provided which includes the following steps. A single-crystal phase change material is formed on a first substrate. At least one first electrode in contact with a first side of the single-crystal phase change material is formed. The single-crystal phase change material and the at least one first electrode in contact with the first side of the single-crystal phase change material form a transfer structure on the first substrate. The transfer structure is transferred to a second substrate. At least one second electrode in contact with a second side of the single-crystal phase change material is formed. A single-crystal phase change material-containing structure and electronic device are also provided.
摘要翻译：提供了用于生产单晶相变材料的技术以及将这些技术结合到电子器件制造工艺流程中。一方面，提供一种制造电子设备的方法，其包括以下步骤。在第一基板上形成单晶相变材料。形成与单晶相变材料的第一面接触的至少一个第一电极。与单晶相变材料的第一面接触的单晶相变材料和至少一个第一电极在第一基板上形成转印结构。转移结构被转移到第二衬底。形成与单晶相变材料的第二面接触的至少一个第二电极。还提供了单晶相变材料结构和电子器件。

73. 发明授权

US08716091B2 Structure for self-aligned silicide contacts to an upside-down FET by epitaxial source and drain 有权
标题翻译：通过外延源极和漏极将自对准硅化物接触到倒立型FET的结构
公开(公告)号：US08716091B2
公开(公告)日：2014-05-06
申请号：US12750342
申请日：2010-03-30
申请人： Guy Cohen , David James Frank , Isaac Lauer
发明人： Guy Cohen , David James Frank , Isaac Lauer
IPC分类号： H01L21/336
CPC分类号： H01L27/1203 , H01L21/823412 , H01L21/823425 , H01L21/84 , H01L29/41733 , H01L29/45 , H01L29/665 , H01L29/66742 , H01L29/7848 , H01L29/78618
摘要： A method for fabricating an upside-down p-FET includes: fully etching source and drain regions in a donor substrate by etching a silicon-on-insulator layer through buried oxide and partially etching the silicon substrate; refilling a bottom and sidewall surfaces of the etched source and drain regions with epitaxial silicide/germanide to form e-SiGe source and drain regions; capping the source and drain regions with self-aligning silicide/germanide; providing a silicide layer formed over the gate conductor line; providing a first stress liner over the gate and the e-SiGe source and drain regions; depositing a planarized dielectric over the self-aligning silicide/germanide; inverting the donor substrate; bonding the donor substrate to a host wafer; and selectively exposing the buried oxide and the e-SiGe source and drain regions by removing the donor wafer.
摘要翻译：一种用于制造倒置p-FET的方法包括：通过掩埋氧化物蚀刻绝缘体上硅层并部分蚀刻硅衬底，在施主衬底中完全蚀刻源区和漏区; 用外延硅化物/锗化物填充蚀刻的源极和漏极区的底部和侧壁表面以形成e-SiGe源极和漏极区; 用自对准硅化物/锗化物封装源区和漏区; 提供形成在所述栅极导体线上的硅化物层; 在栅极和e-SiGe源极和漏极区上提供第一应力衬垫; 在自对准硅化物/锗化物上沉积平坦化的电介质; 反转施主衬底; 将施主衬底接合到主晶片; 并且通过去除施主晶片来选择性地暴露所述掩埋氧化物和e-SiGe源极和漏极区域。

74. 发明授权

US08659093B2 Continuous metal semiconductor alloy via for interconnects 有权
标题翻译：用于互连的连续金属半导体合金通孔
公开(公告)号：US08659093B2
公开(公告)日：2014-02-25
申请号：US13405739
申请日：2012-02-27
申请人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
发明人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
IPC分类号： H01L21/70
CPC分类号： H01L29/7848 , B82Y10/00 , H01L21/28518 , H01L21/76885 , H01L23/481 , H01L29/665 , H01L29/78 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： A contact structure is disclosed in which a continuous metal semiconductor alloy is located within a via contained within a dielectric material. The continuous semiconductor metal alloy is in direct contact with an upper metal line of a first metal level located atop the continuous semiconductor metal alloy and at least a surface of each source and drain diffusion region located beneath the continuous metal semiconductor alloy. The continuous metal semiconductor alloy includes a lower portion that is contained within an upper surface of each source and drain region, and a vertical pillar portion extending upward from the lower portion.
摘要翻译：公开了一种接触结构，其中连续的金属半导体合金位于包含在电介质材料内的通孔内。连续半导体金属合金与位于连续半导体金属合金顶部的第一金属水平的上金属线和至少位于连续金属半导体合金下方的源极和漏极扩散区的表面直接接触。连续金属半导体合金包括包含在每个源极和漏极区域的上表面内的下部以及从下部向上延伸的垂直柱部分。

75. 发明授权

US08642996B2 Graphene nanoribbons and carbon nanotubes fabricated from SiC fins or nanowire templates 有权
标题翻译：石墨烯纳米带和碳纳米管由SiC散热片或纳米线模板制成
公开(公告)号：US08642996B2
公开(公告)日：2014-02-04
申请号：US13088766
申请日：2011-04-18
申请人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
发明人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
IPC分类号： H01L29/66 , H01L21/20
CPC分类号： H01L29/66795 , B82Y10/00 , B82Y40/00 , B82Y99/00 , H01L21/02057 , H01L21/02381 , H01L21/02527 , H01L21/02529 , H01L21/02636 , H01L21/28008 , H01L21/30604 , H01L21/31051 , H01L21/324 , H01L29/0673 , H01L29/1025 , H01L29/1606 , H01L29/66439 , H01L29/66742 , H01L29/66787 , H01L29/775 , H01L29/785 , H01L51/0045 , H01L51/0048 , H01L51/0558
摘要： Semiconductor structures including parallel graphene nanoribbons or carbon nanotubes oriented along crystallographic directions are provided from a template of silicon carbide (SiC) fins or nanowires. The SiC fins or nanowires are first provided and then graphene nanoribbons or carbon nanotubes are formed on the exposed surfaces of the fin or the nanowires by annealing. In embodiments in which closed carbon nanotubes are formed, the nanowires are suspended prior to annealing. The location, orientation and chirality of the graphene nanoribbons and the carbon nanotubes that are provided are determined by the corresponding silicon carbide fins and nanowires from which they are formed.
摘要翻译：从碳化硅（SiC）翅片或纳米线的模板提供包括平行石墨烯纳米带或沿着晶体取向的碳纳米管的半导体结构。首先提供SiC翅片或纳米线，然后通过退火在石墨片或纳米线的暴露表面上形成石墨烯纳米带或碳纳米管。在形成封闭碳纳米管的实施方案中，纳米线在退火之前被悬浮。提供的石墨烯纳米带和碳纳米管的位置，取向和手性由相应的碳化硅翅片和形成它们的纳米线确定。

76. 发明申请

US20130299772A1 HEAVILY DOPED SEMICONDUCTOR NANOPARTICLES 有权
公开(公告)号：US20130299772A1
公开(公告)日：2013-11-14
申请号：US13980348
申请日：2012-02-14
申请人： Guy Cohen , Oded Millo , David Mocatta , Eran Rabani , Uri Banin
发明人： Guy Cohen , Oded Millo , David Mocatta , Eran Rabani , Uri Banin
IPC分类号： H01L29/06 , H01L21/22
CPC分类号： H01L29/0665 , B01J13/0039 , B82Y10/00 , C09K11/54 , C09K11/61 , C09K11/62 , C09K11/64 , C09K11/88 , C09K11/881 , C09K11/883 , H01L21/02601 , H01L21/22 , H01L29/167 , H01L29/207 , H01L29/227 , H01L29/365 , H01L33/18
摘要： Herein, provided are heavily doped colloidal semiconductor nanocrystals and a process for introducing an impurity to semiconductor nanoparticles, providing control of band gap, Fermi energy and presence of charge carriers. The method is demonstrated using InAs colloidal nanocrystals, which are initially undoped, and are metal-doped (Cu, Ag, Au) by adding a metal salt solution.
摘要翻译：这里，提供了重掺杂的胶体半导体纳米晶体和用于将杂质引入半导体纳米颗粒的方法，提供了带隙的控制，费米能量和载流子的存在。使用最初未掺杂的InAs胶体纳米晶体，并通过加入金属盐溶液进行金属掺杂（Cu，Ag，Au）来证明该方法。

77. 发明授权

US08321961B2 Production scale fabrication method for high resolution AFM tips 失效
标题翻译：高分辨率AFM提示的生产规模制作方法
公开(公告)号：US08321961B2
公开(公告)日：2012-11-27
申请号：US12900123
申请日：2010-10-07
申请人： Guy Cohen , Mark C. Reuter , Brent A. Wacaser , Maha M. Khayyat
发明人： Guy Cohen , Mark C. Reuter , Brent A. Wacaser , Maha M. Khayyat
IPC分类号： G01Q60/38 , B82Y99/00 , B82Y40/00
CPC分类号： G01Q70/12 , G01Q60/38
摘要： A method of fabricating high resolution atomic force microscopy (AFM) tips including a single semiconductor nanowire grown at an apex of a semiconductor pyramid of each AFM tip is provided. The semiconductor nanowire that is grown has a controllable diameter and a high aspect ratio, without significant tapering from the tip of the semiconductor nanowire to its base. The method includes providing an AFM probe including a semiconductor cantilever having a semiconductor pyramid extending upward from a surface of said semiconductor cantilever. The semiconductor pyramid has an apex. A patterned oxide layer is formed on the AFM probe. The patterned oxide layer has an opening that exposes the apex of the semiconductor pyramid. A single semiconductor nanowire is grown on the exposed apex of the semiconductor pyramid utilizing a non-oxidized Al seed material as a catalyst for nanowire growth.
摘要翻译：提供了一种制造高分辨率原子力显微镜（AFM）尖端的方法，其包括在每个AFM尖端的半导体金字塔的顶点处生长的单个半导体纳米线。生长的半导体纳米线具有可控直径和高纵横比，而没有从半导体纳米线的尖端到其基底的显着锥形化。该方法包括提供包括半导体悬臂的AFM探针，该半导体悬臂具有从所述半导体悬臂的表面向上延伸的半导体金字塔。半导体金字塔有顶点。在AFM探针上形成图案化的氧化物层。图案化氧化物层具有暴露半导体金字塔的顶点的开口。使用未氧化的Al种子材料作为纳米线生长的催化剂，在半导体金字塔的暴露的顶点上生长单个半导体纳米线。

78. 发明申请

US20120161212A1 CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS 有权
标题翻译：连续金属半导体合金通过互连
公开(公告)号：US20120161212A1
公开(公告)日：2012-06-28
申请号：US13405739
申请日：2012-02-27
申请人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
发明人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
IPC分类号： H01L29/78 , B82Y99/00
CPC分类号： H01L29/7848 , B82Y10/00 , H01L21/28518 , H01L21/76885 , H01L23/481 , H01L29/665 , H01L29/78 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： A contact structure is disclosed in which a continuous metal semiconductor alloy is located within a via contained within a dielectric material. The continuous semiconductor metal alloy is in direct contact with an upper metal line of a first metal level located atop the continuous semiconductor metal alloy and at least a surface of each source and drain diffusion region located beneath the continuous metal semiconductor alloy. The continuous metal semiconductor alloy includes a lower portion that is contained within an upper surface of each source and drain region, and a vertical pillar portion extending upward from the lower portion.
摘要翻译：公开了一种接触结构，其中连续的金属半导体合金位于包含在电介质材料内的通孔内。连续半导体金属合金与位于连续半导体金属合金顶部的第一金属水平的上金属线和至少位于连续金属半导体合金下方的源极和漏极扩散区的表面直接接触。连续金属半导体合金包括包含在每个源极和漏极区域的上表面内的下部以及从下部向上延伸的垂直柱部分。

79. 发明申请

US20120033226A1 OPTICS SYMMETRIZATION FOR METROLOGY 有权
标题翻译： OPTICS SYMPETRIZATION FOR METROLOGY
公开(公告)号：US20120033226A1
公开(公告)日：2012-02-09
申请号：US13188623
申请日：2011-07-22
申请人： Amnon Manassen , Daniel Kandel , Moshe Baruch , Joel L. Seligson , Alexander Svizher , Guy Cohen , Efraim Rotem , Ohad Bachar , Daria Negri , Noam Sapiens
发明人： Amnon Manassen , Daniel Kandel , Moshe Baruch , Joel L. Seligson , Alexander Svizher , Guy Cohen , Efraim Rotem , Ohad Bachar , Daria Negri , Noam Sapiens
IPC分类号： G01B9/02 , G01N21/55
CPC分类号： G03F7/70633 , G01N21/55 , G03F7/70616
摘要： The present invention includes an illumination source, at least one illumination symmetrization module (ISM) configured to symmetrize at least a portion of light emanating from the illumination source, a first beam splitter configured to direct a first portion of light processed by the ISM along an object path to a surface of one or more specimens and a second portion of light processed by the ISM along a reference path, and a detector disposed along a primary optical axis, wherein the detector is configured to collect a portion of light reflected from the surface of the one or more specimens.
摘要翻译：本发明包括照明源，至少一个照明对称化模块（ISM），被配置为对来自照明源发出的光的至少一部分进行对称;第一分束器，被配置为将由ISM处理的光的第一部分沿着一个或多个样本的表面的物体路径和沿着基准路径由ISM处理的光的第二部分以及沿着主光轴布置的检测器，其中检测器被配置为收集从表面反射的光的一部分的一个或多个标本。

80. 发明申请

US20090302305A1 SELF-CONSTRAINED ANISOTROPIC GERMANIUM NANOSTRUCTURE FROM ELECTROPLATING 有权
标题翻译：电镀的自约束非均质锗原子纳米结构
公开(公告)号：US20090302305A1
公开(公告)日：2009-12-10
申请号：US12541559
申请日：2009-08-14
申请人： Guy Cohen , Hariklia Deligianni , Qiang Huang , Lubomyr T. Romankiw
发明人： Guy Cohen , Hariklia Deligianni , Qiang Huang , Lubomyr T. Romankiw
IPC分类号： H01L29/12
CPC分类号： C25D3/54 , B82Y10/00 , C25D5/022 , C25D7/123 , H01L21/0237 , H01L21/02532 , H01L21/02603 , H01L21/02628 , H01L21/02639 , Y10S977/762
摘要： A nanostructure comprising germanium, including wires of less than 1 micron in diameter and walls of less than 1 micron in width, in contact with the substrate and extending outward from the substrate is provided along with a method of preparation.
摘要翻译：提供包括锗的纳米结构，其包括直径小于1微米的导线和宽度小于1微米的与基底接触并从基底向外延伸的纳米结构以及制备方法。

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