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    • 72. 发明授权
    • Packetized audio data operations in a wireless local area network device
    • 无线局域网设备中的分组化音频数据操作
    • US07684377B2
    • 2010-03-23
    • US12174629
    • 2008-07-16
    • Sherman LeeVivian ChouCharles AragonesJohn Lin
    • Sherman LeeVivian ChouCharles AragonesJohn Lin
    • H04Q7/24
    • H04W88/06H04W28/14H04W84/12
    • A wireless local area network (WLAN) transceiving integrated circuit includes a WLAN interface, an input buffer, an input buffer controller, and a processor. The WLAN transceiving integrated circuit may also include an output buffer, an output buffer controller, a transcoder, and/or an audio Coder-Decoder (CODEC). The WLAN transceiving integrated circuit is installed in a WLAN device that services voice communications. The input buffer receives packetized audio data from the WLAN interface. When the input buffer satisfies a buffer vacancy threshold, the processor and the input buffer controller cooperatively operate to fill at least a portion of the input buffer with packetized audio data. The processor copies packetized audio data from the input buffer and fills the input buffer with the copied packetized audio data to maintain an audio pattern in the input buffer. The input buffer controller fills the input buffer when the processor is available and after copying/filling is no longer effective. The processor operates to maintain the audio pattern when additional packetized audio data is received by the WLAN interface. These operations are also performed for the output buffer, which receives packetized audio data from the transcoder and writes the packetized audio data to the WLAN interface.
    • 无线局域网(WLAN)收发集成电路包括WLAN接口,输入缓冲器,输入缓冲器控制器和处理器。 WLAN收发集成电路还可以包括输出缓冲器,输出缓冲器控制器,代码转换器和/或音频编解码器(CODEC)。 WLAN收发集成电路安装在服务语音通信的WLAN设备中。 输入缓冲区从WLAN接口接收分组化音频数据。 当输入缓冲器满足缓冲空缺阈值时,处理器和输入缓冲器控制器协同工作,以便用分组化音频数据填充输入缓冲器的至少一部分。 处理器从输入缓冲器复制分组化的音频数据,并用复制的分组化音频数据填充输入缓冲器,以保持输入缓冲器中的音频模式。 当处理器可用并且复制/填充不再有效之后,输入缓冲器控制器填充输入缓冲器。 当附加的分组化音频数据被WLAN接口接收时,处理器操作以维持音频模式。 这些操作也对输出缓冲器执行,输出缓冲器从代码转换器接收打包的音频数据,并将打包的音频数据写入WLAN接口。
    • 73. 发明申请
    • BVDII Enhancement with a Cascode DMOS
    • BVDII增强与Cascode DMOS
    • US20090159968A1
    • 2009-06-25
    • US11960432
    • 2007-12-19
    • Steve L. MerchantJohn LinSameer PendharkarPhilip L. Hower
    • Steve L. MerchantJohn LinSameer PendharkarPhilip L. Hower
    • H01L27/088H01L21/8234
    • H01L21/823481H01L21/823425H01L21/823456H01L21/823462H01L29/0653H01L29/42368H01L29/66659H01L29/7833H01L29/7835
    • Double diffused MOS (DMOS) transistors feature extended drain regions to provide depletion regions which drop high drain voltages to lower voltages at the gate edges. DMOS transistors exhibit lower drain breakdown potential in the on-state than in the off-state than in the off-state due to snapback by a parasitic bipolar transistor that exists in parallel with the DMOS transistor. The instant invention is a cascoded DMOS transistor in an integrated circuit incorporating an NMOS transistor on the DMOS source node to reverse bias the parasitic emitter-base junction during on-state operation, eliminating snapback. The NMOS transistor may be integrated with the DMOS transistor by connections in the interconnect system of the integrated circuit, or the NMOS transistor and DMOS transistor may be fabricated in a common p-type well and integrated in the IC substrate. Methods of fabricating an integrated circuit with the incentive cascoded DMOS transistor are also disclosed.
    • 双扩散MOS(DMOS)晶体管具有扩展的漏极区域,以提供耗尽区域,其将高漏极电压降低到栅极边缘处的较低电压。 由于与DMOS晶体管并联存在的寄生双极晶体管的回跳,DMOS晶体管在导通状态下的漏极击穿电位低于截止状态下的漏极击穿电位。 本发明是在DMOS源节点上结合有NMOS晶体管的集成电路中的级联DMOS晶体管,以在接通状态操作期间反向偏置寄生发射极 - 基极结,从而消除了快速恢复。 NMOS晶体管可以通过集成电路的互连系统中的连接与DMOS晶体管集成,或者NMOS晶体管和DMOS晶体管可以制造在共同的p型阱中并集成在IC衬底中。 还公开了使用激励级联DMOS晶体管制造集成电路的方法。
    • 74. 发明申请
    • PACKETIZED AUDIO DATA OPERATIONS IN A WIRELESS LOCAL AREA NETWORK DEVICE
    • 无线本地区域网络设备中的封装音频数据操作
    • US20080273508A1
    • 2008-11-06
    • US12174629
    • 2008-07-16
    • Sherman LeeVivian ChouCharles AragonesJohn Lin
    • Sherman LeeVivian ChouCharles AragonesJohn Lin
    • H04Q7/24H04L12/56
    • H04W88/06H04W28/14H04W84/12
    • A wireless local area network (WLAN) transceiving integrated circuit includes a WLAN interface, an input buffer, an input buffer controller, and a processor. The WLAN transceiving integrated circuit may also include an output buffer, an output buffer controller, a transcoder, and/or an audio Coder-Decoder (CODEC). The WLAN transceiving integrated circuit is installed in a WLAN device that services voice communications. The input buffer receives packetized audio data from the WLAN interface. When the input buffer satisfies a buffer vacancy threshold, the processor and the input buffer controller cooperatively operate to fill at least a portion of the input buffer with packetized audio data. The processor copies packetized audio data from the input buffer and fills the input buffer with the copied packetized audio data to maintain an audio pattern in the input buffer. The input buffer controller fills the input buffer when the processor is available and after copying/filling is no longer effective. The processor operates to maintain the audio pattern when additional packetized audio data is received by the WLAN interface. These operations are also performed for the output buffer, which receives packetized audio data from the transcoder and writes the packetized audio data to the WLAN interface.
    • 无线局域网(WLAN)收发集成电路包括WLAN接口,输入缓冲器,输入缓冲器控制器和处理器。 WLAN收发集成电路还可以包括输出缓冲器,输出缓冲器控制器,代码转换器和/或音频编解码器(CODEC)。 WLAN收发集成电路安装在服务语音通信的WLAN设备中。 输入缓冲区从WLAN接口接收分组化音频数据。 当输入缓冲器满足缓冲空缺阈值时,处理器和输入缓冲器控制器协同工作,以便用分组化音频数据填充输入缓冲器的至少一部分。 处理器从输入缓冲器复制分组化的音频数据,并用复制的分组化音频数据填充输入缓冲器,以保持输入缓冲器中的音频模式。 当处理器可用并且复制/填充不再有效之后,输入缓冲器控制器填充输入缓冲器。 当附加的分组化音频数据被WLAN接口接收时,处理器操作以维持音频模式。 这些操作也对输出缓冲器执行,输出缓冲器从代码转换器接收打包的音频数据,并将打包的音频数据写入WLAN接口。
    • 77. 发明申请
    • Baseband Controller in a Wireless Local Area Network
    • 无线局域网中的基带控制器
    • US20070087692A1
    • 2007-04-19
    • US11539783
    • 2006-10-09
    • John Lin
    • John Lin
    • H04B7/00
    • H04J3/0685H04W28/06H04W28/14H04W84/12H04W84/18
    • A baseband controller includes a microsequencer with special hardware resources circuitry and a configuration that supports real-time Bluetooth functionality for an upper limit of Bluetooth slave devices. The microsequencer includes a 72-bit correlator that may also be used as an accumulator, wherein the topology provides that the correlator can communicate with a 72-bit arithmetic logic unit that correspondingly enables the correlator to act as an accumulator. The microsequencer also includes a plurality of clocks and timers for facilitating Bluetooth timing functionality, and at least four registers for temporarily storing computational data, where each of the storage registers have different sizes for accommodating different-sized packets of computational data.
    • 基带控制器包括具有特殊硬件资源电路的微定序器和支持蓝牙从设备上限的实时蓝牙功能的配置。 微定序器包括也可以用作累加器的72位相关器,其中拓扑结构提供相关器可以与72位算术逻辑单元进行通信,这相应地使得相关器能够充当累加器。 微定序器还包括用于促进蓝牙定时功能的多个时钟和定时器,以及用于临时存储计算数据的至少四个寄存器,其中每个存储寄存器具有不同的大小以适应计算数据的不同大小的分组。
    • 78. 发明申请
    • Method for manufacturing photoelectric package having control chip
    • 具有控制芯片的光电封装制造方法
    • US20060252173A1
    • 2006-11-09
    • US11416161
    • 2006-05-03
    • Bily WangJohn LinShih-Yu Wu
    • Bily WangJohn LinShih-Yu Wu
    • H01L21/00
    • H01L25/167H01L2224/48091H01L2224/48227H01L2224/49175H01L2924/01322H01L2924/00014H01L2924/00
    • A manufacturing method for a photoelectric package structure having a control chip is proposed. The photoelectric package structure concentrates light emitted therefrom, prevents external light interference and can be applied for advertising signs and backlight modules. Using the present invention increases the defect-free ratio and production quality. Applying the present invention for packaging light-emitting diode (LED) or optical sensor chips allows the necessary light-emitting requirements of electronic chips to be easily met. The package structure of the present invention is superior to conventional ones and the installation of the control chip doesn't reduce the light-emitting intensity. The major innovation of the present invention is disposing a photoelectric chip (or multiple photoelectric chips) on a control chip and then installing the control chip upon a substrate. Thus, installation-of the components is more convenient. Furthermore, an external frame or optical gratings can also be included to prevent external light interference.
    • 提出了一种具有控制芯片的光电封装结构的制造方法。 光电封装结构集中从其发出的光,防止外部光线干扰,并可应用于广告标牌和背光模块。 使用本发明增加了无缺陷比和生产质量。 应用本发明用于封装发光二极管(LED)或光学传感器芯片允许容易地满足电子芯片的必要的发光要求。 本发明的封装结构优于常规封装结构,并且控制芯片的安装不会降低发光强度。 本发明的主要创新是在控制芯片上设置光电芯片(或多个光电芯片),然后将控制芯片安装在基板上。 因此,组件的安装更方便。 此外,还可以包括外部框架或光栅以防止外部光线干扰。
    • 80. 发明申请
    • Circuit for driving LED display
    • LED显示屏驱动电路
    • US20050200577A1
    • 2005-09-15
    • US10795310
    • 2004-03-09
    • Bily WangJohn Lin
    • Bily WangJohn Lin
    • G09G3/32
    • G09G3/32G09G2300/06G09G2310/0205G09G2310/0272
    • A circuit for driving a light-emitting diode (LED) display has multiple driving modes. The circuit has a control unit for outputting a mode-switching signal, a scan driving chip connecting with the control unit for providing a scan signal, a data driving chip connecting with the control unit and the scan driving chip for providing a data signal, a row control interface connecting with the row line, the control unit, the scan driving chip and the data driving chip to receive the mode-switching signal for switching an input end of the row control interface, and a column control interface connecting with the column line, the control unit, the scan driving chip and the data driving chip to receive the mode-switching signal for switching an input end of the column control interface.
    • 用于驱动发光二极管(LED)显示器的电路具有多种驱动模式。 电路具有用于输出模式切换信号的控制单元,与用于提供扫描信号的控制单元连接的扫描驱动芯片,与控制单元连接的数据驱动芯片和用于提供数据信号的扫描驱动芯片, 与行线连接的行控制接口,控制单元,扫描驱动芯片和数据驱动芯片,以接收用于切换行控制接口的输入端的模式切换信号,以及与列线连接的列控制接口 ,控制单元,扫描驱动芯片和数据驱动芯片,以接收用于切换列控制接口的输入端的模式切换信号。