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71. 发明授权

US07582565B2 Method and apparatus for semiconductor wafer planarization 有权
标题翻译：用于半导体晶片平面化的方法和装置
公开(公告)号：US07582565B2
公开(公告)日：2009-09-01
申请号：US12054311
申请日：2008-03-24
申请人： Fred C. Redeker , John Boyd , Yezdi Dordi , William Thie , Bob Maraschin
发明人： Fred C. Redeker , John Boyd , Yezdi Dordi , William Thie , Bob Maraschin
IPC分类号： H01L21/461 , H01L21/302 , H01L21/769 , B05C3/02
CPC分类号： H01L21/7684 , C23C18/06 , C23C18/1216 , C23C18/1225 , C23C18/1291 , C23C18/14 , H01L21/288
摘要： Broadly speaking, the present invention provides a method and an apparatus for planarizing a semiconductor wafer (“wafer”). More specifically, the present invention provides for depositing a planarizing layer over the wafer, wherein the planarizing layer serves to fill recessed areas present on a surface of the wafer. A planar member is positioned over and proximate to a top surface of the wafer. Positioning of the planar member serves to entrap electroless plating solution between the planar member and the wafer surface. Radiant energy is applied to the wafer surface to cause a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase in turn causes plating reactions to occur at the wafer surface. Material deposited through the plating reactions forms a planarizing layer that conforms to a planarity of the planar member.
摘要翻译：广义而言，本发明提供了一种用于平面化半导体晶片（“晶片”）的方法和装置。更具体地，本发明提供了在晶片上沉积平坦化层，其中平坦化层用于填充存在于晶片表面上的凹陷区域。平面构件定位在晶片的顶表面上方并靠近晶片的顶表面。平面构件的定位用于在平面构件和晶片表面之间夹带化学镀溶液。辐射能量被施加到晶片表面以在晶片表面和化学镀溶液之间的界面处引起温度升高。温度升高又会导致电镀反应发生在晶片表面。通过电镀反应沉积的材料形成符合平面构件平坦度的平坦化层。

72. 发明申请

US20080251148A1 Fluid Handling System for Wafer Electroless Plating and Associated Methods 有权
标题翻译：用于晶片无电镀的流体处理系统及相关方法
公开(公告)号：US20080251148A1
公开(公告)日：2008-10-16
申请号：US11735989
申请日：2007-04-16
申请人： William Thie , John M. Boyd , Fritz C. Redeker , Yezdi Dordi , John Parks , Tiruchirapalli Arunagiri , Aleksander Owczarz , Todd Balisky , Clint Thomas , Jacob Wylie
发明人： William Thie , John M. Boyd , Fritz C. Redeker , Yezdi Dordi , John Parks , Tiruchirapalli Arunagiri , Aleksander Owczarz , Todd Balisky , Clint Thomas , Jacob Wylie
IPC分类号： B01F5/00
CPC分类号： C23C18/1628 , Y10T137/87652
摘要： A chemical fluid handling system is defined to supply a number of chemicals to a number of fluid inputs of a mixing manifold. The chemical fluid handling system includes a number of fluid recirculation loops for separately pre-conditioning and controlling the supply of each of the number of chemicals. Each of the fluid recirculation loops is defined to degas, heat, and filter a particular one of the number of chemical components. The mixing manifold is defined to mix the number of chemicals to form the electroless plating solution. The mixing manifold includes a fluid output connected to a supply line. The supply line is connected to supply the electroless plating solution to a fluid bowl within an electroless plating chamber.
摘要翻译：化学流体处理系统被定义为向混合歧管的多个流体输入提供多个化学品。化学流体处理系统包括多个流体再循环回路，用于分别预处理和控制每个化学物质的供应。每个流体循环回路被定义为对特定的一个化学成分进行脱气，加热和过滤。混合歧管被定义为混合化学品的数量以形成化学镀溶液。混合歧管包括连接到供应管线的流体输出。供电线连接以将化学镀溶液供应到化学镀室内的流体碗。

73. 发明申请

US20080166885A1 Method and Apparatus for Semiconductor Wafer Planarization 有权
标题翻译：半导体晶圆平面化方法与装置
公开(公告)号：US20080166885A1
公开(公告)日：2008-07-10
申请号：US12054311
申请日：2008-03-24
申请人： Fred C. Redeker , John Boyd , Yezdi Dordi , William Thie , Bob Maraschin
发明人： Fred C. Redeker , John Boyd , Yezdi Dordi , William Thie , Bob Maraschin
IPC分类号： H01L21/31
CPC分类号： H01L21/7684 , C23C18/06 , C23C18/1216 , C23C18/1225 , C23C18/1291 , C23C18/14 , H01L21/288
摘要： Broadly speaking, the present invention provides a method and an apparatus for planarizing a semiconductor wafer (“wafer”). More specifically, the present invention provides for depositing a planarizing layer over the wafer, wherein the planarizing layer serves to fill recessed areas present on a surface of the wafer. A planar member is positioned over and proximate to a top surface of the wafer. Positioning of the planar member serves to entrap electroless plating solution between the planar member and the wafer surface. Radiant energy is applied to the wafer surface to cause a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase in turn causes plating reactions to occur at the wafer surface. Material deposited through the plating reactions forms a planarizing layer that conforms to a planarity of the planar member.
摘要翻译：广义而言，本发明提供了一种用于平面化半导体晶片（“晶片”）的方法和装置。更具体地，本发明提供了在晶片上沉积平坦化层，其中平坦化层用于填充存在于晶片表面上的凹陷区域。平面构件定位在晶片的顶表面上方并靠近晶片的顶表面。平面构件的定位用于在平面构件和晶片表面之间夹带化学镀溶液。辐射能量被施加到晶片表面以在晶片表面和化学镀溶液之间的界面处引起温度升高。温度升高又会导致电镀反应发生在晶片表面。通过电镀反应沉积的材料形成符合平面构件平坦度的平坦化层。

74. 发明申请

US20080057221A1 Controlled ambient system for interface engineering 有权
标题翻译：接口工程控制环境系统
公开(公告)号：US20080057221A1
公开(公告)日：2008-03-06
申请号：US11639752
申请日：2006-12-15
申请人： John Boyd , Yezdi Dordi , Tiruchirapalli Arunagiri , Benjamin Mooring , John Parks , William Thie , Fritz Redeker , Arthur Howald , Alan Schoepp , David Hemker
发明人： John Boyd , Yezdi Dordi , Tiruchirapalli Arunagiri , Benjamin Mooring , John Parks , William Thie , Fritz Redeker , Arthur Howald , Alan Schoepp , David Hemker
IPC分类号： H05H1/24 , C23C16/00
CPC分类号： H01L21/67225 , H01L21/288 , H01L21/6704 , H01L21/67167 , H01L21/67184 , H01L21/6723 , H01L21/76849
摘要： A cluster architecture and methods for processing a substrate are disclosed. The cluster architecture includes a lab-ambient controlled transfer module that is coupled to one or more wet substrate processing modules. The lab-ambient controlled transfer module and the one or more wet substrate processing modules are configured to manage a first ambient environment. A vacuum transfer module that is coupled to the lab-ambient controlled transfer module and one or more plasma processing modules is also provided. The vacuum transfer module and the one or more plasma processing modules are configured to manage a second ambient environment. And, a controlled ambient transfer module that is coupled to the vacuum transfer module and one or more ambient processing modules is also included. The controlled ambient transfer module and the one or more ambient processing modules are configured to manage a third ambient environment. The cluster architecture therefore enables controlled processing of the substrate in either the first, second or third ambient environments, as well as during associated transitions.
摘要翻译：公开了用于处理衬底的簇结构和方法。集群架构包括耦合到一个或多个湿式衬底处理模块的实验室环境受控传输模块。实验室环境控制传递模块和一个或多个湿式衬底处理模块被配置为管理第一环境环境。还提供耦合到实验室环境受控传输模块和一个或多个等离子体处理模块的真空传输模块。真空转移模块和一个或多个等离子体处理模块被配置成管理第二周边环境。并且，还包括耦合到真空传输模块和一个或多个环境处理模块的受控环境转移模块。受控环境传输模块和一个或多个环境处理模块被配置为管理第三环境环境。因此，集群架构使得能够在第一，第二或第三环境环境中以及在相关联的转换期间对衬底进行受控处理。

75. 发明申请

US20060260932A1 Apparatus and method for depositing and planarizing thin films of semiconductor wafers 失效
标题翻译：用于沉积和平坦化半导体晶片的薄膜的装置和方法
公开(公告)号：US20060260932A1
公开(公告)日：2006-11-23
申请号：US11494997
申请日：2006-07-28
申请人： Mike Ravkin , John Boyd , Yezdi Dordi , Fred Redeker , John deLarios
发明人： Mike Ravkin , John Boyd , Yezdi Dordi , Fred Redeker , John deLarios
IPC分类号： C25D17/00
CPC分类号： C25D17/10 , C25D5/026 , C25D5/22 , C25D7/123 , C25D17/001 , H01L21/2885 , H01L21/67028 , H01L21/67034 , H01L21/67051
摘要： An electroplating apparatus for depositing a metallic layer on a surface of a wafer is provided. In one example, a proximity head capable of being electrically charged as an anode is placed in close proximity to the surface of the wafer. A plating fluid is provided between the wafer and the proximity head to create localized metallic plating.
摘要翻译：提供了一种用于在晶片的表面上沉积金属层的电镀设备。在一个示例中，能够被充电作为阳极的接近头放置在紧邻晶片表面的位置。在晶片和邻近头之间提供电镀液以产生局部金属电镀。

76. 发明申请

US20050284748A1 Electroplating head and method for operating the same 有权
标题翻译：电镀头及其操作方法
公开(公告)号：US20050284748A1
公开(公告)日：2005-12-29
申请号：US10879396
申请日：2004-06-28
申请人： Yezdi Dordi , Bob Maraschin , John Boyd , Fred Redeker
发明人： Yezdi Dordi , Bob Maraschin , John Boyd , Fred Redeker
IPC分类号： C25D17/00 , C25D17/14
CPC分类号： C25D5/026 , C25D5/02 , C25D5/06 , C25D17/14
摘要： An electroplating head including a chamber having a fluid entrance and a fluid exit is provided. The chamber is configured to contain a flow of electroplating solution from the fluid entrance to the fluid exit. The electroplating head also includes an anode disposed within the chamber. The anode is configured to be electrically connected to a power supply. The electroplating head further includes a porous resistive material disposed at the fluid exit such that the flow of electroplating solution is required to traverse through the porous resistive material.
摘要翻译：提供一种包括具有流体入口和流体出口的室的电镀头。腔室被配置成包含从流体入口到流体出口的电镀溶液流。电镀头还包括设置在室内的阳极。阳极被配置为电连接到电源。电镀头还包括设置在流体出口处的多孔电阻材料，使得电镀溶液的流动需要穿过多孔电阻材料。

77. 发明授权

US06599402B2 Electro-chemical deposition cell for face-up processing of single semiconductor substrates 失效
公开(公告)号：US06599402B2
公开(公告)日：2003-07-29
申请号：US10178469
申请日：2002-06-24
申请人： Yezdi Dordi , Joe Stevens , Roy Edwards , Bob Lowrance , Michael Sugarman , Mark Denome
发明人： Yezdi Dordi , Joe Stevens , Roy Edwards , Bob Lowrance , Michael Sugarman , Mark Denome
IPC分类号： C25D1706
CPC分类号： H01L21/68721 , C25D5/20 , C25D7/123 , C25D17/001 , C25D17/004 , C25D17/005 , C25D17/08 , C25D21/00 , C25D21/18 , H01L21/67051 , H01L21/6715 , H01L21/6838 , H01L21/68742 , H01L21/68792
摘要： An apparatus and method for electro-chemically depositing a uniform metal layer onto a substrate is provided. In one aspect, the apparatus includes a cathode connected to the substrate plating surface, an anode disposed above the substrate support member and an electroplating solution inlet supplying an electroplating solution fluidly connecting the anode and the substrate plating surface. In another aspect, the apparatus further includes a dual catch-cup system having an electroplating solution catch-cup and a rinse catch-cup. The dual catch-cup system provides separation of the electroplating solution and the rinse solutions during processing and provides re-circulating systems for the different solutions of the electroplating system.

78. 发明授权

US08844461B2 Fluid handling system for wafer electroless plating and associated methods 有权
标题翻译：晶圆无电镀液体处理系统及相关方法
公开(公告)号：US08844461B2
公开(公告)日：2014-09-30
申请号：US11735989
申请日：2007-04-16
申请人： William Thie , John M. Boyd , Fritz C. Redeker , Yezdi Dordi , John Parks , Tiruchirapalli Arunagiri , Aleksander Owczarz , Todd Balisky , Clint Thomas , Jacob Wylie , Alan M. Schoepp
发明人： William Thie , John M. Boyd , Fritz C. Redeker , Yezdi Dordi , John Parks , Tiruchirapalli Arunagiri , Aleksander Owczarz , Todd Balisky , Clint Thomas , Jacob Wylie , Alan M. Schoepp
IPC分类号： B05C11/00 , B05D1/28 , C23C18/16
CPC分类号： C23C18/1628 , Y10T137/87652
摘要： A chemical fluid handling system is defined to supply a number of chemicals to a number of fluid inputs of a mixing manifold. The chemical fluid handling system includes a number of fluid recirculation loops for separately pre-conditioning and controlling the supply of each of the number of chemicals. Each of the fluid recirculation loops is defined to degas, heat, and filter a particular one of the number of chemical components. The mixing manifold is defined to mix the number of chemicals to form the electroless plating solution. The mixing manifold includes a fluid output connected to a supply line. The supply line is connected to supply the electroless plating solution to a fluid bowl within an electroless plating chamber.
摘要翻译：化学流体处理系统被定义为向混合歧管的多个流体输入提供多个化学品。化学流体处理系统包括多个流体再循环回路，用于分别预处理和控制每个化学物质的供应。每个流体循环回路被定义为对特定的一个化学成分进行脱气，加热和过滤。混合歧管被定义为混合化学品的数量以形成化学镀溶液。混合歧管包括连接到供应管线的流体输出。供电线连接以将化学镀溶液供应到化学镀室内的流体碗。

79. 发明授权

US08673769B2 Methods and apparatuses for three dimensional integrated circuits 有权
标题翻译：三维集成电路的方法和装置
公开(公告)号：US08673769B2
公开(公告)日：2014-03-18
申请号：US11821051
申请日：2007-06-20
申请人： John Boyd , Fritz Redeker , Yezdi Dordi , Hyungsuk Alexander Yoon , Shijian Li
发明人： John Boyd , Fritz Redeker , Yezdi Dordi , Hyungsuk Alexander Yoon , Shijian Li
IPC分类号： H01L21/4763
CPC分类号： H01L21/44 , H01L21/76898 , H01L23/48 , H01L23/481 , H01L25/50 , H01L2924/0002 , H01L2924/00
摘要： Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit.
摘要翻译：提供了具有通孔的三维集成电路的制造方法和装置。本发明的一个方面是用于三维集成电路的通孔通孔的间隙填充方法。该方法包括提供具有用于通孔通孔的多个孔的半导体晶片，并且沉积保形金属层以部分填充孔以留下开孔。该方法还包括清除空隙并清洁空隙的表面，并使用干式沉积工艺填充或封闭空隙。本发明的另一方面是一种用于三维集成电路的电子设备结构。

80. 发明授权

US08622020B2 Simultaneous electroless plating of two substrates 有权
标题翻译：两片基板同时化学镀
公开(公告)号：US08622020B2
公开(公告)日：2014-01-07
申请号：US12891639
申请日：2010-09-27
申请人： William Thie , John M. Boyd , Yezdi Dordi , Fritz C. Redeker
发明人： William Thie , John M. Boyd , Yezdi Dordi , Fritz C. Redeker
IPC分类号： B05C3/00 , B05C19/02 , B05C3/02 , B05D3/02 , B05D1/18 , H01L21/44
CPC分类号： C23C18/1617 , C23C18/163 , C23C18/1678 , H01L21/67092
摘要： An electroless plating system is provided. The system includes a first vacuum chuck supporting a first wafer and a second vacuum chuck supporting a second wafer such that a top surface of the second wafer is opposing a top surface of the first wafer. The system also includes a fluid delivery system configured to deliver a plating solution to the top surface of the first wafer, wherein in response to delivery of the plating solution, the top surface of the second wafer is brought proximate to the top surface of the first wafer so that the plating solution contacts both top surfaces. A method for applying an electroless plating solution to a substrate is also provided.
摘要翻译：提供无电镀系统。该系统包括支撑第一晶片的第一真空卡盘和支撑第二晶片的第二真空卡盘，使得第二晶片的顶表面与第一晶片的顶表面相对。该系统还包括配置成将电镀溶液输送到第一晶片的顶表面的流体输送系统，其中响应于电镀溶液的输送，第二晶片的顶表面靠近第一晶片的顶表面使得电镀溶液接触两个顶表面。还提供了一种将无电镀液施加到基底上的方法。

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