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71. 发明申请

US20110309507A1 METHODOLOGY FOR EVALUATION OF ELECTRICAL CHARACTERISTICS OF CARBON NANOTUBES 有权
标题翻译：碳纳米管电气特性评价方法
公开(公告)号：US20110309507A1
公开(公告)日：2011-12-22
申请号：US12820880
申请日：2010-06-22
申请人： Maxime Darnon , Gerald W. Gibson , Pratik P. Joshi , Qinghuang Lin
发明人： Maxime Darnon , Gerald W. Gibson , Pratik P. Joshi , Qinghuang Lin
IPC分类号： H01L23/532 , H01L21/768 , H01L21/66 , B82Y40/00 , B82Y99/00
CPC分类号： H01L23/53276 , B82Y35/00 , B82Y40/00 , H01L21/76808 , H01L21/76835 , H01L21/76885 , H01L22/14 , H01L2221/1031 , H01L2221/1094 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： The present disclosure relates to a structure comprising 1. an electrically conductive substrate having carbon nanotubes grown thereon; 2. a cured polymeric fill matrix comprising at least one latent photoacid generator embedded around the carbon nanotubes but allowing tips of the carbon nanotubes to be exposed; 3. a layer of patterned and cured photosensitive dielectric material on the cured polymeric fill matrix, wherein tips of the carbon nanotubes are exposed within the patterns; and 4. an electrically conductive material filled into the interconnect pattern and in contact with the exposed tips of the carbon nanotubes; and to methods of making the structure and using the structure to measure the electrical characteristics of carbon nanotubes.
摘要翻译：本公开涉及一种结构，其包括：其上生长有碳纳米管的导电基材; 2.一种固化的聚合物填充基质，其包含嵌入碳纳米管周围的至少一个潜在光致酸发生剂，但允许碳纳米管的尖端暴露; 在固化的聚合物填充基质上的图案化和固化的光敏介电材料层，其中碳纳米管的尖端在图案内暴露; 4.一种填充到互连图案中并与碳纳米管的暴露尖端接触的导电材料; 以及制造该结构并使用该结构来测量碳纳米管的电特性的方法。

72. 发明申请

US20110115094A1 STRUCTURES AND METHODS FOR PHOTO-PATTERNABLE LOW-k (PPLK) INTEGRATION 有权
标题翻译：用于可照片低k（PPLK）集成的结构和方法
公开(公告)号：US20110115094A1
公开(公告)日：2011-05-19
申请号：US12619298
申请日：2009-11-16
申请人： Maxime Darnon , Qinghuang Lin
发明人： Maxime Darnon , Qinghuang Lin
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76804 , C08G77/04 , H01L21/02126 , H01L21/02318 , H01L21/31 , H01L21/76807 , H01L21/76814 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76832 , H01L21/76835 , H01L23/5329 , H01L23/53295 , H01L2221/1031 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A single damascene or dual damascene interconnect structure fabricated with a photo-patternable low-k dielectric (PPLK) which is cured after etching. This interconnect method prevents the PPLK damage and the tapering of the edges of the interconnect structure. In one embodiment, the method of the present invention includes depositing a photo-patternable low-k (PPLK) material atop an initial structure. The initial structure can include a dielectric cap, an antireflective coating (ARC), or a material stack including the same. The at least one PPLK material is patterned, creating a single damascene structure. For dual damascene structures, a second PPLK layer is coated and patterned. An etch process is performed to transfer the pattern for the PPLK material into at least a portion of the substrate, typically into the dielectric cap and/or ARC using processes known by those skilled in the art (typically fluorocarbon-based plasmas). A diffusion liner deposition can follow the etch process. An electrically conductive material can also be deposited. The diffusion liner and the electrically conductive material can be polished using chemical mechanical polishing. The resulting structure is cured anytime after etching order to transform the resist like PPLK into a permanent low-k material that remains within the structure.
摘要翻译：用蚀刻后固化的光可图案化低k电介质（PPLK）制造的单镶嵌或双镶嵌互连结构。这种互连方法防止了PPLK损坏和互连结构边缘的逐渐变细。在一个实施例中，本发明的方法包括在初始结构的顶部沉积光可图案化的低k（PPLK）材料。初始结构可以包括电介质盖，抗反射涂层（ARC）或包括其的材料堆叠。至少一个PPLK材料被图案化，形成单个镶嵌结构。对于双镶嵌结构，涂覆和图案化第二PPLK层。执行蚀刻工艺以将PPLK材料的图案转移到基底的至少一部分中，通常使用本领域技术人员已知的方法（通常为氟碳基等离子体）进入电介质盖和/或ARC。扩散衬垫沉积可以跟随蚀刻工艺。还可以沉积导电材料。扩散衬垫和导电材料可以使用化学机械抛光进行抛光。所得到的结构在蚀刻之后随时固化，以将抗蚀剂如PPLK转变成保持在结构内的永久低k材料。

73. 发明申请

US20100319971A1 AIRGAP-CONTAINING INTERCONNECT STRUCTURE WITH IMPROVED PATTERNABLE LOW-K MATERIAL AND METHOD OF FABRICATING 有权
标题翻译：具有改进的可变形低K材料和制造方法的含气体的互连结构
公开(公告)号：US20100319971A1
公开(公告)日：2010-12-23
申请号：US12486342
申请日：2009-06-17
申请人： Qinghuang Lin
发明人： Qinghuang Lin
IPC分类号： H05K1/00 , B05D5/12
CPC分类号： H01L21/7682 , C08G77/04 , C09D183/04 , G03F7/0035 , G03F7/0045 , G03F7/0757 , H01L21/02112 , H01L21/02126 , H01L21/02167 , H01L21/02216 , H01L21/02274 , H01L21/02282 , H01L21/02299 , H01L21/02312 , H01L21/02315 , H01L21/3122 , H01L21/3148 , H01L21/31604 , H01L21/31633 , H01L21/76807 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76832 , H01L23/5329 , H01L23/53295 , H01L2221/1031 , H01L2221/1036 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A method of fabricating an airgap-containing interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material is provided. Specifically, a simplified method of fabricating single-damascene and dual-damascene airgap-containing low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating is provided.
摘要翻译：提供了一种制造含气隙互连结构的方法，其中可图案化的低k材料替代了使用单独的光致抗蚀剂和电介质材料的需要。具体地说，提供了一种制造具有至少一个可图案化的低k电介质和至少一种无机抗反射涂层的单镶嵌和双镶嵌气隙低k互连结构的简化方法。

74. 发明授权

US07736833B2 Multilayered resist systems using tuned polymer films as underlayers and methods of fabrication thereof 失效
标题翻译：使用调谐聚合物膜作为底层的多层抗蚀剂系统及其制造方法
公开(公告)号：US07736833B2
公开(公告)日：2010-06-15
申请号：US11906391
申请日：2007-10-02
申请人： Marie Angelopoulos , Katherina E. Babich , Douglas Charles LaTulipe , Qinghuang Lin , David R. Medeiros , Wayne Martin Moreau , Karen E. Petrillo , John P. Simons
发明人： Marie Angelopoulos , Katherina E. Babich , Douglas Charles LaTulipe , Qinghuang Lin , David R. Medeiros , Wayne Martin Moreau , Karen E. Petrillo , John P. Simons
IPC分类号： G03F7/004 , G03F7/30
CPC分类号： G03F7/091 , G03F7/0757 , G03F7/094 , G03F7/405 , Y10S430/145
摘要： Multilayered resist structures including bilayer and top surface imaging which utilize tuned underlayers functioning as ARCs, planarizing layers, and etch resistant hard masks whose properties such as optical, chemical and physical properties are tailored to give a multilayer resist structure exhibiting high resolution, residue free lithography and methods of preparing these materials.
摘要翻译：包括双层和顶面成像的多层抗蚀剂结构，其利用调节的作为ARC，平坦化层和耐蚀刻硬质掩模的底层，其特性如光学，化学和物理性质被定制以提供表现出高分辨率，无残留光刻的多层抗蚀剂结构以及制备这些材料的方法。

75. 发明申请

US20090079076A1 PATTERNABLE DIELECTRIC FILM STRUCTURE WITH IMPROVED LITHOGRAPHY AND METHOD OF FABRICATING SAME 有权
标题翻译：具有改进的光刻的方形电介质膜结构及其制造方法
公开(公告)号：US20090079076A1
公开(公告)日：2009-03-26
申请号：US11858636
申请日：2007-09-20
申请人： Qinghuang Lin , Deborah A. Neumayer
发明人： Qinghuang Lin , Deborah A. Neumayer
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L21/76808 , H01L21/02118 , H01L21/02167 , H01L21/02274 , H01L21/02282 , H01L21/0276 , H01L21/31 , H01L21/3121 , H01L21/3122 , H01L21/3148 , H01L21/76832 , H01L21/76835 , H01L21/76843 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2221/1031 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： The present invention provides a method of fabricating an interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material. Specifically, this invention relates to a simplified method of fabricating single-damascene and dual-damascene low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating. In general terms, a method is provided that includes providing at least one patternable low-k material on a surface of an inorganic antireflective coating that is located atop a substrate, said inorganic antireflective coating is vapor deposited and comprises atoms of M, C and H wherein M is at least one of Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La; forming at least one interconnect pattern within the at least one patternable low-k material; and curing the at least one patternable low-k material. The inventive method can be used to form dual-damascene interconnect structures as well as single-damascene interconnect structures.
摘要翻译：本发明提供一种制造互连结构的方法，其中可图案化的低k材料替代了使用单独的光致抗蚀剂和电介质材料的需要。具体地说，本发明涉及一种制备具有至少一个可图案化的低k电介质和至少一种无机抗反射涂层的单镶嵌和双镶嵌低k互连结构的简化方法。一般来说，提供了一种方法，其包括在位于基底顶部的无机抗反射涂层的表面上提供至少一种可图案化的低k材料，所述无机抗反射涂层被气相沉积并包含M，C和H原子其中M是Si，Ge，B，Sn，Fe，Ta，Ti，Ni，Hf和La中的至少一种; 在所述至少一个可编码的低k材料内形成至少一个互连图案; 以及固化所述至少一种可图案化的低k材料。本发明的方法可用于形成双镶嵌互连结构以及单镶嵌互连结构。

76. 发明申请

US20090023284A1 Integrated Wafer Processing System for Integration of Patternable Dielectric Materials 有权
标题翻译：集成晶圆处理系统，用于整合可雕刻电介质材料
公开(公告)号：US20090023284A1
公开(公告)日：2009-01-22
申请号：US11778876
申请日：2007-07-17
申请人： Qinghuang Lin , Sampath Purushothaman , Robert Wisnieff
发明人： Qinghuang Lin , Sampath Purushothaman , Robert Wisnieff
IPC分类号： H01L21/4763 , C21D1/00
CPC分类号： H01L21/76802 , F27B17/0025 , H01L21/67115 , H01L21/67173 , H01L21/67225 , H01L21/76814 , H01L21/76825
摘要： The present disclosure relates to an integrated wafer processing apparatus for fabricating semiconductor chips. This integrated wafer processing system combines the lithography patterning steps and irradiation curing steps of the patternable dielectric into one system. The patternable low-k material of the present disclosure also functions as a photoresist, i.e. is a photo-patternable low-k dielectric material.
摘要翻译：本公开涉及一种用于制造半导体芯片的集成晶片处理装置。该集成晶片处理系统将可图案化电介质的光刻图案化步骤和照射固化步骤组合成一个系统。本公开的可图案化的低k材料还起到光致抗蚀剂的作用，即光可图案化的低k电介质材料。

77. 发明授权

US07446058B2 Adhesion enhancement for metal/dielectric interface 失效
标题翻译：金属/电介质界面的附着力增强
公开(公告)号：US07446058B2
公开(公告)日：2008-11-04
申请号：US11440984
申请日：2006-05-25
申请人： Chih-Chao Yang , Griselda Bonilla , Qinghuang Lin , Terry A. Spooner
发明人： Chih-Chao Yang , Griselda Bonilla , Qinghuang Lin , Terry A. Spooner
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L23/53295 , H01L21/76825 , H01L21/76826 , H01L21/76831 , H01L21/76843 , H01L21/76844 , H01L23/53238 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： An interconnect structure and method of fabricating the same in which the adhesion between a chemically etched dielectric material and a noble metal liner is improved are provided. In accordance with the present invention, a chemically etching dielectric material is subjected to a treatment step which modified the chemical nature of the dielectric material such that the treated surfaces become hydrophobic. The treatment step is performed prior to deposition of the noble metal liner and aides in improving the adhesion between the chemically etched dielectric material and the noble metal liner.
摘要翻译：提供了一种互连结构及其制造方法，其中改善了化学蚀刻的电介质材料和贵金属衬垫之间的粘合性。根据本发明，对化学蚀刻电介质材料进行改性电介质材料的化学性质使处理后的表面变得疏水的处理步骤。在沉积贵金属衬垫和助剂以改善化学蚀刻的电介质材料和贵金属衬垫之间的粘附性之前进行处理步骤。

78. 发明申请

US20080124650A1 Multilayered resist systems using tuned polymer films as underlayers and methods of fabrication thereof 失效
标题翻译：使用调谐聚合物膜作为底层的多层抗蚀剂系统及其制造方法
公开(公告)号：US20080124650A1
公开(公告)日：2008-05-29
申请号：US11906391
申请日：2007-10-02
申请人： Marie Angelopoulos , Katherina E. Babich , Douglas Charles Latulipe , Qinghuang Lin , David R. Medeiros , Wayne Martin Moreau , Karen E. Petrillo , John P. Simons
发明人： Marie Angelopoulos , Katherina E. Babich , Douglas Charles Latulipe , Qinghuang Lin , David R. Medeiros , Wayne Martin Moreau , Karen E. Petrillo , John P. Simons
IPC分类号： G03F7/004
CPC分类号： G03F7/091 , G03F7/0757 , G03F7/094 , G03F7/405 , Y10S430/145
摘要： Multilayered resist structures including bilayer and top surface imaging which utilize tuned underlayers functioning as ARCs, planarizing layers, and etch resistant hard masks whose properties such as optical, chemical and physical properties are tailored to give a multilayer resist structure exhibiting high resolution, residue free lithography and methods of preparing these materials.
摘要翻译：包括双层和顶面成像的多层抗蚀剂结构，其利用调节的作为ARC，平坦化层和耐蚀刻硬质掩模的底层，其特性如光学，化学和物理性质被定制以提供表现出高分辨率，无残留光刻的多层抗蚀剂结构以及制备这些材料的方法。

79. 发明申请

US20060183314A1 Method for Fabricating Interconnect Structures with Reduced Plasma Damage 有权
标题翻译：制造具有降低等离子体损伤的互连结构的方法
公开(公告)号：US20060183314A1
公开(公告)日：2006-08-17
申请号：US10908931
申请日：2005-06-01
申请人： Ronald Dellaguardia , Elbert Huang , Qinghuang Lin , Robert Miller
发明人： Ronald Dellaguardia , Elbert Huang , Qinghuang Lin , Robert Miller
IPC分类号： H01L21/4763
CPC分类号： H01L21/76835 , H01L21/76808 , H01L21/76829
摘要： Methods to form interconnect structures utilizing sacrificial filling material layers are described herein. Utilizing the sacrificial filling material makes it possible to reduce damage to interlayer dielectric layers that result in enhanced device performance and/or increased reliability.
摘要翻译：本文描述了利用牺牲填充材料层形成互连结构的方法。利用牺牲填充材料使得可以减少导致增强的器件性能和/或增加的可靠性的层间电介质层的损伤。

80. 发明授权

US06258732B1 Method of forming a patterned organic dielectric layer on a substrate 失效
标题翻译：在基板上形成图案化的有机介电层的方法
公开(公告)号：US06258732B1
公开(公告)日：2001-07-10
申请号：US09244936
申请日：1999-02-04
申请人： Qinghuang Lin , Rebecca D. Mih , Kevin S. Petrarca
发明人： Qinghuang Lin , Rebecca D. Mih , Kevin S. Petrarca
IPC分类号： H01L21469
CPC分类号： H01L21/0335 , H01L21/31138 , H01L21/31144
摘要： An organic dielectric material is patterned on a substrate in a process utilizing a patterned resist which contains a metalloid or metallic element at the time of pattern transfer to the organic dielectric layer. The organic dielectric layer is preferably patterned using an oxygen etching process, most preferably oxygen reactive ion etching. The process advantageously avoids the need for a hard mask.
摘要翻译：有机电介质材料在图案转移到有机电介质层时利用包含准金属或金属元素的图案化抗蚀剂的工艺在衬底上图案化。有机介电层优选使用氧蚀刻工艺，最优选氧反应离子蚀刻来图案化。该方法有利地避免了对硬掩模的需要。

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