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    • 73. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07755138B2
    • 2010-07-13
    • US12537219
    • 2009-08-06
    • Wataru SaitoSyotaro OnoNana HatanoHiroshi OhtaMiho Watanabe
    • Wataru SaitoSyotaro OnoNana HatanoHiroshi OhtaMiho Watanabe
    • H01L29/78
    • H01L29/7813H01L29/0619H01L29/0634H01L29/0696H01L29/1095H01L29/407H01L29/41766H01L29/7806
    • A semiconductor device of the invention includes: a super junction structure of an n-type pillar layer and a p-type pillar layer; a base layer provided on the p-type pillar layer; a source layer selectively provided on a surface of the base layer; a gate insulating film provided on a portion being in contact with the base layer, a portion being in contact with the source layer and a portion being in contact with the n-type pillar layer on a portion of a junction between the n-type pillar layer and the p-type pillar layer; a control electrode provided opposed to the base layer, the source layer and the n-type pillar layer through the gate insulating film; and a source electrode electrically connected to the base layer, the source layer and the n-type layer. The source electrode is contact with the surface of the n-type pillar layer located between the control electrodes to form a Schottky junction.
    • 本发明的半导体器件包括:n型柱层和p型柱层的超结结构; 设置在p型支柱层上的基底层; 源层选择性地设置在基层的表面上; 设置在与所述基底层接触的部分上的栅极绝缘膜,与所述源极层接触的部分和在所述n型支柱的接合部的一部分上与所述n型支柱层接触的部分 层和p型支柱层; 控制电极,其通过所述栅极绝缘膜与所述基极层,所述源极层和所述n型支柱层相对设置; 以及与基极层,源极层和n型层电连接的源电极。 源电极与位于控制电极之间的n型支柱层的表面接触以形成肖特基结。