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    • 4. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20120012929A1
    • 2012-01-19
    • US13051987
    • 2011-03-18
    • Wataru SAITOSyotaro OnoShunji TaniuchiMiho WatanabeHiroaki Yamashita
    • Wataru SAITOSyotaro OnoShunji TaniuchiMiho WatanabeHiroaki Yamashita
    • H01L29/78
    • H01L29/7813H01L29/0865H01L29/0878H01L29/1095H01L29/407H01L29/42372H01L29/66734
    • According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a fourth semiconductor layer of the second conductivity type, a fifth semiconductor layer of the first conductivity type, a control electrode, a first main electrode, a second main electrode, and a sixth semiconductor layer of the first conductivity type. The second semiconductor layer and the third semiconductor layer are alternately provided on the first semiconductor layer in a direction substantially parallel to a major surface of the first semiconductor layer. The fourth semiconductor layer is provided on the second semiconductor layer and the third semiconductor layer. The fifth semiconductor layer is selectively provided on a surface of the fourth semiconductor layer. The control electrode is provided in a trench via an insulating film. The trench penetrates through the fourth semiconductor layer from a surface of the fifth semiconductor layer and is in contact with the second semiconductor layer. The first main electrode is connected to the first semiconductor layer. The second main electrode is connected to the fourth semiconductor layer and the fifth semiconductor layer. The sixth semiconductor layer is provided between the fourth semiconductor layer and the second semiconductor layer. An impurity concentration of the sixth semiconductor layer is higher than an impurity concentration of the second semiconductor layer.
    • 根据一个实施例,半导体器件包括第一导电类型的第一半导体层,第一导电类型的第二半导体层,第二导电类型的第三半导体层,第二导电类型的第四半导体层, 第一导电类型的第五半导体层,第一导电类型的控制电极,第一主电极,第二主电极和第六半导体层。 第二半导体层和第三半导体层在与第一半导体层的主表面大致平行的方向上交替地设置在第一半导体层上。 第四半导体层设置在第二半导体层和第三半导体层上。 第五半导体层选择性地设置在第四半导体层的表面上。 控制电极通过绝缘膜设置在沟槽中。 沟槽从第五半导体层的表面穿过第四半导体层并且与第二半导体层接触。 第一主电极连接到第一半导体层。 第二主电极连接到第四半导体层和第五半导体层。 第六半导体层设置在第四半导体层和第二半导体层之间。 第六半导体层的杂质浓度高于第二半导体层的杂质浓度。
    • 5. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08829608B2
    • 2014-09-09
    • US13051987
    • 2011-03-18
    • Wataru SaitoSyotaro OnoShunji TaniuchiMiho WatanabeHiroaki Yamashita
    • Wataru SaitoSyotaro OnoShunji TaniuchiMiho WatanabeHiroaki Yamashita
    • H01L29/78
    • H01L29/7813H01L29/0865H01L29/0878H01L29/1095H01L29/407H01L29/42372H01L29/66734
    • According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a fourth semiconductor layer of the second conductivity type, a fifth semiconductor layer of the first conductivity type, a control electrode, a first main electrode, a second main electrode, and a sixth semiconductor layer of the first conductivity type. The second semiconductor layer and the third semiconductor layer are alternately provided on the first semiconductor layer in a direction substantially parallel to a major surface of the first semiconductor layer. The fourth semiconductor layer is provided on the second semiconductor layer and the third semiconductor layer. The fifth semiconductor layer is selectively provided on a surface of the fourth semiconductor layer. The control electrode is provided in a trench via an insulating film. The trench penetrates through the fourth semiconductor layer from a surface of the fifth semiconductor layer and is in contact with the second semiconductor layer. The first main electrode is connected to the first semiconductor layer. The second main electrode is connected to the fourth semiconductor layer and the fifth semiconductor layer. The sixth semiconductor layer is provided between the fourth semiconductor layer and the second semiconductor layer. An impurity concentration of the sixth semiconductor layer is higher than an impurity concentration of the second semiconductor layer.
    • 根据一个实施例,半导体器件包括第一导电类型的第一半导体层,第一导电类型的第二半导体层,第二导电类型的第三半导体层,第二导电类型的第四半导体层, 第一导电类型的第五半导体层,第一导电类型的控制电极,第一主电极,第二主电极和第六半导体层。 第二半导体层和第三半导体层在与第一半导体层的主表面大致平行的方向上交替地设置在第一半导体层上。 第四半导体层设置在第二半导体层和第三半导体层上。 第五半导体层选择性地设置在第四半导体层的表面上。 控制电极通过绝缘膜设置在沟槽中。 沟槽从第五半导体层的表面穿过第四半导体层并且与第二半导体层接触。 第一主电极连接到第一半导体层。 第二主电极连接到第四半导体层和第五半导体层。 第六半导体层设置在第四半导体层和第二半导体层之间。 第六半导体层的杂质浓度高于第二半导体层的杂质浓度。
    • 8. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20120056262A1
    • 2012-03-08
    • US13052028
    • 2011-03-18
    • Wataru SAITOSyotaro OnoShunji TaniuchiMiho WatanabeHiroaki Yamashita
    • Wataru SAITOSyotaro OnoShunji TaniuchiMiho WatanabeHiroaki Yamashita
    • H01L29/78
    • H01L29/7839H01L29/0619H01L29/0623H01L29/0878H01L29/402H01L29/407H01L29/41741H01L29/41766H01L29/4236H01L29/42368H01L29/66727H01L29/66734H01L29/7806H01L29/7811H01L29/7813
    • According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the first conductivity type, an embedded electrode, a control electrode, a fourth semiconductor layer of the second conductivity type, a first main electrode, and a second main electrode. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer. The embedded electrode is provided in a first trench via a first insulating film. The first trench penetrates through the second semiconductor layer from a surface of the third semiconductor layer to reach the first semiconductor layer. The control electrode is provided above the embedded electrode via a second insulating film in the first trench. The fourth semiconductor layer is selectively provided in the first semiconductor layer and is connected to a lower end of a second trench. The second trench penetrates through the second semiconductor layer from the surface of the third semiconductor layer to reach the first semiconductor layer. The first main electrode is electrically connected to the first semiconductor layer. The second main electrode is provided in the second trench and connected to the second semiconductor layer, the third semiconductor layer and the fourth semiconductor layer. The embedded electrode is electrically connected to one of the second main electrode and the control electrode. A Schottky junction formed of the second main electrode and the first semiconductor layer is formed at a sidewall of the second trench.
    • 根据一个实施例,半导体器件包括第一导电类型的第一半导体层,第二导电类型的第二半导体层,第一导电类型的第三半导体层,嵌入电极,控制电极,第四半导体 第二导电类型的层,第一主电极和第二主电极。 第二半导体层设置在第一半导体层上。 第三半导体层设置在第二半导体层上。 嵌入式电极经由第一绝缘膜设置在第一沟槽中。 第一沟槽从第三半导体层的表面穿过第二半导体层到达第一半导体层。 控制电极通过第一沟槽中的第二绝缘膜设置在嵌入电极的上方。 第四半导体层选择性地设置在第一半导体层中并连接到第二沟槽的下端。 第二沟槽从第三半导体层的表面穿过第二半导体层到达第一半导体层。 第一主电极电连接到第一半导体层。 第二主电极设置在第二沟槽中并连接到第二半导体层,第三半导体层和第四半导体层。 嵌入电极与第二主电极和控制电极中的一个电连接。 在第二沟槽的侧壁处形成由第二主电极和第一半导体层形成的肖特基结。