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    • 73. 发明授权
    • Semiconductor non-volatile memory device and computer system using the
same
    • 半导体非易失性存储器件和使用其的计算机系统
    • US5978270A
    • 1999-11-02
    • US29748
    • 1998-03-02
    • Toshihiro TanakaMasataka KatoOsamu TsuchiyaToshiaki Nishimoto
    • Toshihiro TanakaMasataka KatoOsamu TsuchiyaToshiaki Nishimoto
    • G11C16/04G11C16/28G11C16/34G11C16/06
    • G11C16/3413G11C16/0416G11C16/28G11C16/3404G11C16/3409G11C16/3459
    • After decreasing the threshold voltages of a plurality of memory cells collectively or selectively, the presence or absence of any memory cell of which the threshold voltage has dropped below a predetermined voltage verified collectively for each of memory cell groups connected to word line (low-threshold value verification), and any memory cell of which the threshold voltage has excessively dropped is selectively written. Also, the well of each of memory cell is formed in the region of an element isolation layer for isolating it from the substrate of a memory apparatus, and a negative voltage is supplied to the memory well distributively with a positive voltage applied as a word line voltage, thus supplying them as erase operation voltages. The absolute value of the memory well voltage is set substantially equal to or lower than the word line voltage for the read operation. Sectors constituting each memory mat includes a sector (selected sector) selected for the erase operation with each word line thereof supplied with a positive voltage, a sector (non-selected sector) not selected for the erase operation with a word line voltage different from a memory well voltage, and further a sector (completely non-selected sector) not selected for the erase operation with a word line voltage equal to the voltage between a source and a drain of the memory cell.
    • PCT No.PCT / JP96 / 02419 Sec。 371日期1998年3月2日 102(e)1998年3月2日PCT PCT 1996年8月29日PCT公布。 公开号WO97 / 08707 日期1997年3月6日在集体或选择性地降低多个存储器单元的阈值电压之后,存在或不存在阈值电压已经下降到预定电压以下的任何存储单元,该存储单元对于连接到字的每个存储单元组 线路(低阈值验证),并且选择性地写入阈值电压过度下降的任何存储单元。 此外,存储单元的阱形成在用于将其与存储装置的基板隔离的元件隔离层的区域中,并且以施加作为字线的正电压将负电压分配地提供给存储器 电压,从而将其提供为擦除操作电压。 存储器阱电压的绝对值被设定为基本上等于或低于读取操作的字线电压。 构成每个存储器垫的扇区包括为其擦除操作选择的扇区(选择的扇区),其每个字线被提供有正电压,未被选择用于擦除操作的扇区(未选择的扇区),字线电压不同于 存储器阱电压,以及未被选择用于具有等于存储器单元的源极和漏极之间的电压的字线电压的擦除操作的扇区(完全未选择的扇区)。
    • 74. 发明授权
    • Overload protection device
    • 过载保护装置
    • US5796348A
    • 1998-08-18
    • US759621
    • 1996-12-05
    • Toshihiro Tanaka
    • Toshihiro Tanaka
    • E21F17/18G01D1/18G01L1/02G08B21/00
    • G01D1/18E21F17/185G01L1/02
    • This invention provides an overload protection device wherein a dangerous situation warning is given to workers in architectural construction when a load value imposed on a temporary column reaches a preset value. The device comprises a load pedestal above and a base pedestal below, a load detecting equipment which detects the load value on the load pedestal after converting the load value into a hydraulic pressure value, a pressure detecting equipment which operates when the pressure reaches the preset value, and a notice equipment which informs workers that the load value imposed on the temporary column has reached the preset value.
    • 本发明提供了一种过载保护装置,其中当施加在临时列上的负载值达到预设值时,对建筑施工中的工人进行危险情况警告。 该装置包括下方的负载基座和下方的基座;负载检测装置,其将负载值转换为液压值后检测负载基座上的负载值;压力检测装置,其在压力达到预设值时动作 以及通知工作人员施加在临时列上的载荷值已达到预设值的通知设备。