专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明授权

US07811868B2 Method for manufacturing a signal line, thin film transistor panel, and method for manufacturing the thin film transistor panel 有权
标题翻译：信号线的制造方法，薄膜晶体管面板，以及薄膜晶体管面板的制造方法
公开(公告)号：US07811868B2
公开(公告)日：2010-10-12
申请号：US11932233
申请日：2007-10-31
申请人： Do-Hyun Kim , Won-Suk Shin , Chang-Oh Jeong , Hong-Sick Park , Eun-Guk Lee , Je-Hun Lee
发明人： Do-Hyun Kim , Won-Suk Shin , Chang-Oh Jeong , Hong-Sick Park , Eun-Guk Lee , Je-Hun Lee
IPC分类号： H01L21/768
CPC分类号： H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A method for manufacturing a thin film transistor array panel includes forming a gate line on a substrate; sequentially forming a gate insulating layer, a silicon layer, and a conductor layer including a lower layer and an upper layer on the gate line, forming a photoresist film, on the conductor layer, patterning the photoresist film to form a photoresist pattern including a first portion and a second portion having a greater thickness than the first portion, etching the upper layer and the lower layer by using the photoresist pattern as art etch mask, etching the silicon layer by using the photoresist pattern as an etch mask to form a semiconductor, removing the second portion of the photoresist pattern by using an etch back process, selectively wet-etching the upper layer of the conductor layer by using the photoresist pattern as an etch mask, dry-etching the lower layer of the conductor layer by using the photoresist pattern as an etch mask to form a data line and a drain electrode including remaining upper and lower layers, and forming a pixel electrode connected to the drain electrode.
摘要翻译：一种制造薄膜晶体管阵列面板的方法，包括在基板上形成栅极线; 在栅极线上顺序地形成栅极绝缘层，硅层和包括下层和上层的导体层，在导体层上形成光致抗蚀剂膜，图案化光致抗蚀剂膜以形成包括第一部分和第二部分具有比第一部分更大的厚度，通过使用光致抗蚀剂图案作为蚀刻掩模蚀刻上层和下层，通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻硅层以形成半导体，通过使用回蚀工艺去除光致抗蚀剂图案的第二部分，通过使用光致抗蚀剂图案作为蚀刻掩模来选择性地湿法蚀刻导体层的上层，通过使用光致抗蚀剂干蚀刻导体层的下层图案作为蚀刻掩模以形成包括剩余的上层和下层的数据线和漏极，并且形成连接到漏电极的像素电极。

72. 发明授权

US07719010B2 Thin film transistor, thin film transistor substrate including the same and method of manufacturing the same 有权
标题翻译：薄膜晶体管，包括其的薄膜晶体管基板及其制造方法
公开(公告)号：US07719010B2
公开(公告)日：2010-05-18
申请号：US11932314
申请日：2007-10-31
申请人： Yong-Ho Bae , Chang-Oh Jeong , Byeong-Beom Kim
发明人： Yong-Ho Bae , Chang-Oh Jeong , Byeong-Beom Kim
IPC分类号： H01L29/786
CPC分类号： H01L29/458 , H01L27/124
摘要： A thin film transistor showing desirable contact characteristics during contact with indium tin oxide (ITO) or indium zinc oxide (IZO), in which a first conductive pattern including a gate electrode and a second conductive pattern including a source electrode and a drain electrode are formed without an etching process, a TFT substrate including the TFTs, and a method of manufacturing the same. The thin film transistor includes a gate electrode formed of a first conductive layer, a gate insulating layer covering the gate electrode, a semiconductor layer forming a channel on the gate insulating layer; an ohmic contact layer formed on the semiconductor layer, and a source electrode and a drain electrode formed of a second conductive layer and of a third conductive layer. The second conductive layer includes an aluminum-nickel alloy and nitrogen and is formed on the semiconductor layer. The third conductive layer includes an aluminum-nickel alloy and is formed on the second conductive layer.
摘要翻译：在与铟锡氧化物（ITO）或铟锌氧化物（IZO）接触期间显示出期望的接触特性的薄膜晶体管，其中形成包括栅电极的第一导电图案和包括源电极和漏电极的第二导电图案没有蚀刻处理，包括TFT的TFT基板及其制造方法。薄膜晶体管包括由第一导电层形成的栅电极，覆盖栅电极的栅极绝缘层，在栅极绝缘层上形成沟道的半导体层; 形成在半导体层上的欧姆接触层，以及由第二导电层和第三导电层形成的源电极和漏电极。第二导电层包括铝 - 镍合金和氮，并形成在半导体层上。第三导电层包括铝镍合金，并形成在第二导电层上。

73. 发明申请

US20090224254A1 THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20090224254A1
公开(公告)日：2009-09-10
申请号：US12417280
申请日：2009-04-02
申请人： Je-Hun LEE , Sung-Jin Kim , Hee-Joon Kim , Chang-Oh Jeong
发明人： Je-Hun LEE , Sung-Jin Kim , Hee-Joon Kim , Chang-Oh Jeong
IPC分类号： H01L27/06 , H01L33/00 , H01L29/786
CPC分类号： G02F1/13439 , G02F1/13458 , H01L27/12 , H01L27/124 , H01L29/458 , H01L29/4908
摘要： A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn in which the rmetal component is reduced in the IZO, ITO, or a-ITO is not produced on the surfaces of the common electrode.
摘要翻译：提供了薄膜晶体管阵列面板，其包括基板，形成在基板上的多个栅极线，在基板上具有透明导电层的多个公共电极，覆盖栅极线和公共电极的栅极绝缘层形成在所述栅极绝缘层上的多个半导体层，形成在所述半导体层和所述栅极绝缘层上的多个源极电极的多条数据线，形成在所述半导体层上的多个漏电极和所述栅极绝缘体并且与公共电极重叠并连接到漏电极的多个像素电极。由于公共电极由ITON，IZON或者-IONON制成，或者是将双重层的ITO / ITON，IZO / IZON或者a-ITO / a-ITON，当注入H 2或SiH 4以形成氮化硅时 SiNX）层，在公共电极的表面上不产生在IZO，ITO或ITO中还原金属成分的不透明金属Sn或Zn。

74. 发明申请

US20090174835A1 LIQUID CRYSTAL DISPLAY AND METHOD OF FABRICATING THE SAME TO HAVE TFT'S WITH PIXEL ELECTRODES INTEGRALLY EXTENDING FROM ONE OF THE SOURCE/DRAIN ELECTRODES 有权
标题翻译：液晶显示器及其制造方法，使其具有从像素电极组成的TFT，从电源/漏极电极中积分扩展
公开(公告)号：US20090174835A1
公开(公告)日：2009-07-09
申请号：US12344075
申请日：2008-12-24
申请人： Je-Hun Lee , Do-Hyun Kim , Tae-Sang Kim , Kyung-Seok Son , Chang-Oh Jeong
发明人： Je-Hun Lee , Do-Hyun Kim , Tae-Sang Kim , Kyung-Seok Son , Chang-Oh Jeong
IPC分类号： G02F1/1368 , H01L21/70 , H01L27/12
CPC分类号： H01L33/0095 , G02F1/133512 , G02F1/133516 , G02F1/136209 , G02F1/1368 , G02F2001/133397 , G02F2001/136222 , G02F2001/136231 , G02F2001/13685 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A liquid crystal display (LCD) includes thin film transistors (TFTs) each having spaced apart source/drain electrodes and an oxide-type semiconductive film disposed over and between the source/drain electrodes to define an active layer. Each of the source/drain electrodes includes a portion of a subdivided transparent conductive layer where one subdivision of the transparent conductive layer continues from within its one of the source/drain electrodes to define an optically exposed pixel-electrode that is reliably connected integrally to the one source/drain electrode. Mass production costs can be reduced and production reliability increased because a fewer number of photolithographic masks can be used to form the TFTs.
摘要翻译：液晶显示器（LCD）包括薄膜晶体管（TFT），每个薄膜晶体管具有间隔开的源/漏电极和设置在源/漏电极之间和之间的氧化物型半导体膜，以限定有源层。源/漏电极中的每一个包括细分透明导电层的一部分，其中透明导电层的一个细分从其源极/漏极之一内延伸，以限定光学曝光的像素电极，其可靠地与一个源/漏电极。由于可以使用较少数量的光刻掩模来形成TFT，所以可以降低批量生产成本并提高生产可靠性。

75. 再颁专利

USRE40162E1 Thin film transistor array substrate for a liquid crystal display 有权
标题翻译：用于液晶显示器的薄膜晶体管阵列基板
公开(公告)号：USRE40162E1
公开(公告)日：2008-03-25
申请号：US10749153
申请日：2003-12-31
申请人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
发明人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
IPC分类号： H01L29/04 , G02F1/136
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136222 , G02F2001/136231 , G02F2001/13629 , G02F2201/40 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/4908
摘要： A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area. The passivation layer and the underlying layers are etched through the photoresist pattern to form a semiconductor pattern and contact windows. A pixel electrode, a supplemental gate pad and a supplemental data pad are then formed of indium tin oxide or indium zinc oxide. The gate and data line assemblies may be formed with a single layered structure. A black matrix and a color filter may be formed at the structured substrate before forming the pixel electrode, and an opening portion may be formed between the pixel electrode and the data line to prevent possible short circuits.
摘要翻译：用于液晶显示器的薄膜晶体管衬底包括绝缘衬底和形成在衬底上的栅极线组件。栅极线组件具有双层结构，其具有相对于氧化铟锡具有良好接触特性的较低层，以及表现出低电阻特性的上层。栅极绝缘层，半导体层，接触层以及第一和第二数据线层被栅极线组件依次沉积到衬底上。图案化第一和第二数据线层以形成数据线组件，并且通过数据线组件的图案蚀刻接触层，使得接触层具有与数据线组件相同的图案。钝化层沉积到数据线组件上，并且主要在显示区域和周边区域上通过使用不同光透射掩模在钝化层上形成光致抗蚀剂图案。通过光致抗蚀剂图案蚀刻钝化层和下面的层以形成半导体图案和接触窗口。然后由氧化铟锡或氧化铟锌形成像素电极，辅助栅极焊盘和补充数据焊盘。栅极和数据线组件可以形成为单层结构。在形成像素电极之前，可以在结构化衬底上形成黑色矩阵和滤色器，并且可以在像素电极和数据线之间形成开口部分，以防止可能的短路。

76. 发明授权

US07345314B2 Organic light emitting diode display and manufacturing method thereof 失效
标题翻译：有机发光二极管显示及其制造方法
公开(公告)号：US07345314B2
公开(公告)日：2008-03-18
申请号：US11202340
申请日：2005-08-11
申请人： Jae-Hoon Chung , Nam-Deog Kim , Jung-Soo Rhee , Beohm-Rock Choi , Jong-Sun Lim , Chang-Oh Jeong
发明人： Jae-Hoon Chung , Nam-Deog Kim , Jung-Soo Rhee , Beohm-Rock Choi , Jong-Sun Lim , Chang-Oh Jeong
IPC分类号： H01L27/15 , H01L29/161 , H01L31/12 , H01L31/153 , H01L33/00
CPC分类号： H01L27/12 , H01L27/3246 , H01L51/5218 , H01L51/5221 , H01L2227/323
摘要： An organic light emitting diode display includes an insulating layer, a stress buffer disposed on the insulating layer, a first electrode disposed on the stress buffer, an organic light emitting member disposed on the first electrode, and a second electrode disposed on the organic light emitting member.
摘要翻译：有机发光二极管显示器包括绝缘层，设置在绝缘层上的应力缓冲器，设置在应力缓冲器上的第一电极，设置在第一电极上的有机发光部件和设置在有机发光器件上的第二电极会员。

77. 发明授权

US07304383B2 TFT substrate for liquid crystal display apparatus and method of manufacturing the same 失效
标题翻译：液晶显示装置用TFT基板及其制造方法
公开(公告)号：US07304383B2
公开(公告)日：2007-12-04
申请号：US10535304
申请日：2003-10-27
申请人： Beom-Seok Cho , Chang-Oh Jeong
发明人： Beom-Seok Cho , Chang-Oh Jeong
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L29/4908 , C22C9/00 , G02F1/133345 , G02F1/136286 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/66765
摘要： There are provided a TFT substrate for an LCD apparatus and a method of manufacturing the same. A substrate (10), a diffusion barrier layer (11) and a copper alloy layer (12) are formed on the TFT substrate, consecutively. The copper alloy includes a material from about 0.5 at % to about 15 at % to form a gate wiring layer. The material is used to form the diffusion barrier layer (11). A compound that comprises a material such as Zr, Ti, Hf, V, Ta, Ni, Cr, Nb, Co, Mn, Mo, W, Rh, Pd, Pt, etc. is deposited on the diffusion barrier layer (11) to a thickness from about 50 Å to about 5,000 Å. The deposited compound is then heat treated to convert the deposited compound into a silicide compound (11b). The transistor substrate has low resistance and high conductance. Also, etching process is simplified, and a mutual diffusion is prevented by means of the thin diffusion barrier layer.
摘要翻译：提供了一种用于LCD装置的TFT基板及其制造方法。连续地在TFT基板上形成基板（10），扩散阻挡层（11）和铜合金层（12）。铜合金包括约0.5at％至约15at％的材料以形成栅极布线层。该材料用于形成扩散阻挡层（11）。包含诸如Zr，Ti，Hf，V，Ta，Ni，Cr，Nb，Co，Mn，Mo，W，Rh，Pd，Pt等材料的化合物沉积在扩散阻挡层（11）上，至约50至约5000的厚度。然后将沉积的化合物进行热处理以将沉积的化合物转化为硅化物（11b）。晶体管衬底具有低电阻和高电导率。此外，简化了蚀刻工艺，并且通过薄的扩散阻挡层来防止相互扩散。

78. 发明申请

US20070122649A1 Thin film transistor substrate for display 审中-公开
标题翻译：用于显示的薄膜晶体管基板
公开(公告)号：US20070122649A1
公开(公告)日：2007-05-31
申请号：US11595395
申请日：2006-11-08
申请人： Je-Hun Lee , Shi-Yul Kim , Do-Hyun Kim , Byeong-Beom Kim , Chang-Oh Jeong , Jun-Young Lee , Yang-Ho Bae , Sung-Wook Kang
发明人： Je-Hun Lee , Shi-Yul Kim , Do-Hyun Kim , Byeong-Beom Kim , Chang-Oh Jeong , Jun-Young Lee , Yang-Ho Bae , Sung-Wook Kang
IPC分类号： B32B15/20 , B32B19/00 , C23C14/00 , B05D1/36
CPC分类号： H01L29/458 , G02F2001/13629 , G02F2001/136295 , H01L27/124 , H01L29/4908 , Y10T428/12903
摘要： A conductive structure containing copper is capable of being etched to have a reliable profile where the copper layer is free of corrosion or oxidation includes a barrier layer formed on an insulating or semiconductor substrate followed by a copper layer, a blocking layer and a capping layer. The copper layer includes copper or copper alloy. The barrier layer includes molybdenum (Mo), molybdenum nitride (MoN) or molybdenum alloy which includes at least one of MoW, MoTi, MoNb or MoZr. The blocking layer includes copper nitride, copper oxide or copper oxinitride. The capping layer includes molybdenum, molybdenum nitride (MoN) or molybdenum alloy which includes at least one of MoW, MoTi, MoNb and MoZr.
摘要翻译：包含铜的导电结构能够被蚀刻以具有可靠的轮廓，其中铜层没有腐蚀或氧化，包括形成在绝缘或半导体衬底上的阻挡层，之后是铜层，阻挡层和覆盖层。铜层包括铜或铜合金。阻挡层包括钼（Mo），氮化钼（MoN）或钼合金，其包括MoW，MoTi，MoNb或MoZr中的至少一种。阻挡层包括氮化铜，氧化铜或氧化氮铜。覆盖层包括钼，氮化钼（MoN）或钼合金，其包括MoW，MoTi，MoNb和MoZr中的至少一种。

79. 发明申请

US20070082434A1 Manufacturing of thin film transistor array panel 审中-公开
标题翻译：制造薄膜晶体管阵列面板
公开(公告)号：US20070082434A1
公开(公告)日：2007-04-12
申请号：US11540131
申请日：2006-09-29
申请人： Yang-Ho Bae , Chang-Oh Jeong , Je-Hun Lee , Beom-Seok Cho
发明人： Yang-Ho Bae , Chang-Oh Jeong , Je-Hun Lee , Beom-Seok Cho
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L27/1288 , H01L27/1214
摘要： The present invention relates to a manufacturing method of a thin film transistor array panel. the method includes forming a gate line including a gate electrode on a substrate, forming a first insulating layer on the gate line, forming a semiconductor layer on the first insulating layer, forming an ohmic contact on the semiconductor layer, forming a data line including a source electrode and a drain electrode on the ohmic contact, depositing a second insulating layer, forming a first photoresist on the second insulating layer, etching the second insulating layer and the first insulating layer using the first photoresist as an etching mask to expose a portion of the drain electrode and a portion of the substrate, forming a pixel electrode connected to an exposed portion of the drain electrode using selective deposition, and removing the first photoresist.
摘要翻译：本发明涉及薄膜晶体管阵列面板的制造方法。该方法包括在基板上形成包括栅电极的栅极线，在栅极线上形成第一绝缘层，在第一绝缘层上形成半导体层，在半导体层上形成欧姆接触，形成数据线，源电极和漏电极，沉积第二绝缘层，在第二绝缘层上形成第一光致抗蚀剂，使用第一光致抗蚀剂蚀刻第二绝缘层和第一绝缘层作为蚀刻掩模，以暴露部分所述漏电极和所述衬底的一部分，使用选择性沉积形成连接到所述漏极的暴露部分的像素电极，以及去除所述第一光致抗蚀剂。

80. 发明申请

US20060163582A1 Thin film transistor substrate and method for forming metal wire thereof 有权
标题翻译：薄膜晶体管基板及其金属线形成方法
公开(公告)号：US20060163582A1
公开(公告)日：2006-07-27
申请号：US10539223
申请日：2003-03-26
申请人： Jae-Gab Lee , Chang-Oh Jeong , Myung-Mo Sung , Hee-Jung Yang , Beom-Seok Cho
发明人： Jae-Gab Lee , Chang-Oh Jeong , Myung-Mo Sung , Hee-Jung Yang , Beom-Seok Cho
IPC分类号： H01L29/76
CPC分类号： H01L29/78603 , G02F2001/136295 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/4908 , H01L2224/32245
摘要： The present invention relates to a thin film transistor substrate and a metal wiring method thereof, more particularly to a thin film transistor substrate comprising self-assembled monolayers between the substrate and the metal wiring, and a metal wiring method thereof. Since a thin film transistor substrate of the present invention comprises three-dimensionally cross-linked self-assembled monolayers between the Si surface and the metal wiring, it has good adhesion ability and anti-diffusion ability.
摘要翻译：薄膜晶体管基板及其金属布线方法技术领域本发明涉及薄膜晶体管基板及其金属布线方法，更具体地涉及在基板和金属布线之间包括自组装单层的薄膜晶体管基板及其金属布线方法。由于本发明的薄膜晶体管基板在Si表面和金属布线之间包含三维交联的自组装单层，因此具有良好的粘附能力和抗扩散能力。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式