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71. 发明申请

US20060220129A1 Hybrid fully SOI-type multilayer structure 审中-公开
标题翻译：混合完全SOI型多层结构
公开(公告)号：US20060220129A1
公开(公告)日：2006-10-05
申请号：US11342380
申请日：2006-01-27
申请人： Fabrice Letertre , Carlos Mazure
发明人： Fabrice Letertre , Carlos Mazure
IPC分类号： H01L27/12
CPC分类号： H01L21/2007 , H01L21/76254
摘要： The invention relates to a silicon-on-insulator-type multilayer structure that includes a support layer, at least two working layers having different crystalline orientations, and an insulating layer extending over at least a portion of the support layer. This insulating layer extends over the whole surface of the support layer so as to extend completely between the support layer and the working layers. A process for manufacturing such a structure is also provided.
摘要翻译：本发明涉及一种绝缘体上硅型多层结构，其包括支撑层，至少两个具有不同结晶取向的工作层，以及在支撑层的至少一部分上延伸的绝缘层。该绝缘层在支撑层的整个表面上延伸，以便在支撑层和工作层之间完全延伸。还提供了一种用于制造这种结构的方法。

72. 发明授权

US08535996B2 Substrate having a charged zone in an insulating buried layer 有权
标题翻译：衬底在绝缘掩埋层中具有带电区域
公开(公告)号：US08535996B2
公开(公告)日：2013-09-17
申请号：US12865838
申请日：2008-03-13
申请人： Mohamad Shaheen , Frederic Allibert , Gweltaz Gaudin , Fabrice Lallement , Didier Landru , Karin Landry , Carlos Mazure
发明人： Mohamad Shaheen , Frederic Allibert , Gweltaz Gaudin , Fabrice Lallement , Didier Landru , Karin Landry , Carlos Mazure
IPC分类号： H01L21/84
CPC分类号： H01L29/78603 , H01L29/32 , H01L29/7841 , H01L31/0248
摘要： Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
摘要翻译：本发明的实施例涉及包括基底晶片，绝缘层和顶部半导体层的基板，其中绝缘层至少包括电荷密度高于1010电荷/ cm 2的绝对值的区域。本发明还涉及制造这种基材的方法。

73. 发明申请

US20130029474A1 METHOD FOR TRANSFERRING A MONOCRYSTALLINE SEMICONDUCTOR LAYER ONTO A SUPPORT SUBSTRATE 有权
标题翻译：将单晶半导体层传输到支撑基板上的方法
公开(公告)号：US20130029474A1
公开(公告)日：2013-01-31
申请号：US13559396
申请日：2012-07-26
申请人： Gweltaz Gaudin , Carlos Mazure
发明人： Gweltaz Gaudin , Carlos Mazure
IPC分类号： H01L21/30
CPC分类号： H01L21/76254
摘要： A method for transferring a monocrystalline semiconductor layer onto a support substrate by implanting species in a donor substrate; bonding the donor substrate to the support substrate; and fracturing the donor substrate to transfer the layer onto the support substrate; wherein a portion of the monocrystalline layer to be transferred is rendered amorphous, without disorganizing the crystal lattice of a second portion of the layer, with the portions being, respectively, a surface portion and a buried portion of the monocrystalline layer; and wherein the amorphous portion is recrystallized at a temperature below 500° C., with the crystal lattice of the second portion serving as a seed for recrystallization.
摘要翻译：一种通过将物质注入施主衬底中将单晶半导体层转移到支撑衬底上的方法; 将施主衬底粘合到支撑衬底上; 并且将所述施主衬底压裂以将所述层转移到所述支撑衬底上; 其中待转移的单晶层的一部分变成非晶体，而不会使层的第二部分的晶格混杂，部分分别是单晶层的表面部分和掩埋部分; 并且其中非晶部分在低于500℃的温度下重结晶，其中第二部分的晶格用作用于重结晶的晶种。

74. 发明申请

US20120214291A1 RELAXATION OF STRAINED LAYERS 有权
标题翻译：应变层的松弛
公开(公告)号：US20120214291A1
公开(公告)日：2012-08-23
申请号：US13458587
申请日：2012-04-27
申请人： Fabrice Letertre , Carlos Mazure , Michael R. Krames , Melvin B. McLaurin , Nathan F. Gardner
发明人： Fabrice Letertre , Carlos Mazure , Michael R. Krames , Melvin B. McLaurin , Nathan F. Gardner
IPC分类号： H01L21/762
CPC分类号： H01L21/2007 , H01L21/02422 , H01L21/02458 , H01L21/0254 , H01L21/02658 , H01L21/3245 , H01L33/0095
摘要： A method for relaxing a layer of a strained material. The method includes depositing a first low-viscosity layer on a first face of a strained material layer; bonding a first substrate to the first low-viscosity layer to form a first composite structure; subjecting the composite structure to heat treatment sufficient to cause reflow of the first low-viscosity layer so as to at least partly relax the strained material layer; and applying a mechanical pressure to a second face of the strained material layer wherein the second face is opposite to the first face and with the mechanical pressure applied perpendicularly to the strained material layer during at least part of the heat treatment to relax the strained material.
摘要翻译：一种放松应变材料层的方法。该方法包括在应变材料层的第一面上沉积第一低粘度层; 将第一衬底粘合到第一低粘度层以形成第一复合结构; 对所述复合结构进行热处理以使所述第一低粘度层的回流至少部分地松弛所述应变材料层; 以及向所述应变材料层的第二面施加机械压力，其中所述第二面与所述第一面相对，并且在至少部分热处理期间垂直于所述应变材料层施加机械压力以松弛所述应变材料。

75. 发明申请

US20120181609A1 FULLY DEPLETED SOI DEVICE WITH BURIED DOPED LAYER 有权
标题翻译：完全覆盖的SOI器件与BEDIED DOPED层
公开(公告)号：US20120181609A1
公开(公告)日：2012-07-19
申请号：US13305206
申请日：2011-11-28
申请人： Gerhard Enders , Wolfgang Hoenlein , Franz Hofman , Carlos Mazure
发明人： Gerhard Enders , Wolfgang Hoenlein , Franz Hofman , Carlos Mazure
IPC分类号： H01L27/088 , H01L29/36 , H01L21/8238
CPC分类号： H01L27/10894 , H01L21/84 , H01L27/10876 , H01L27/1207 , H01L29/4236 , H01L29/66621
摘要： The present invention relates to a method for the manufacture of a semiconductor device by providing a first substrate; providing a doped layer in a surface region of the first substrate; providing a buried oxide layer on the doped layer; providing a semiconductor layer on the buried oxide layer to obtain a semiconductor-on-insulator (SeOI) wafer; removing the buried oxide layer and the semiconductor layer from a first region of the SeOI wafer while maintaining the buried oxide layer and the semiconductor layer in a second region of the SeOI water; providing an upper transistor in the second region by forming a back gate in or by the doped layer; and providing a lower transistor in the first region by forming source and drain regions in or by the doped layer.
摘要翻译：本发明涉及通过提供第一基板来制造半导体器件的方法; 在所述第一衬底的表面区域中提供掺杂层; 在所述掺杂层上提供掩埋氧化物层; 在掩埋氧化物层上提供半导体层以获得绝缘体上半导体（SeOI）晶片; 从所述SeOI晶片的第一区域去除所述掩埋氧化物层和所述半导体层，同时将所述掩埋氧化物层和所述半导体层保持在所述SeOI晶片的第二区域中; 通过在掺杂层中或由掺杂层形成背栅，在第二区域中提供上晶体管; 以及通过在掺杂层中或由掺杂层形成源极和漏极区域来在第一区域中提供下部晶体管。

76. 发明申请

US20060286770A1 Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate 失效
标题翻译：用于同时产生至少一对半导体结构的方法，每个半导体结构在衬底上包括至少一个有用层
公开(公告)号：US20060286770A1
公开(公告)日：2006-12-21
申请号：US11509047
申请日：2006-08-24
申请人： Bruno Ghyselen , Cecile Aulnette , Benoit Bataillou , Carlos Mazure , Hubert Moriceau
发明人： Bruno Ghyselen , Cecile Aulnette , Benoit Bataillou , Carlos Mazure , Hubert Moriceau
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/76254 , Y10S438/977
摘要： A method for producing a semiconductor structure that includes at least one useful layer on a substrate. This method includes providing a source substrate with a zone of weakness therein that defines a relatively thick useful layer between the zone of weakness and a front face of the source substrate; bonding the front face of the source substrate to a support substrate and detaching the useful layer from the source substrate at the zone of weakness to transfer the useful layer to the support substrate; implanting atomic species into a free face of the useful layer to a controlled mean implantation depth therein to form a zone of weakness within the useful layer that defines front and rear useful layers, with the rear useful layer contacting the source substrate and the front useful layer containing a greater concentration of defects; bonding a stiffening substrate to the free face of the front useful layer after implantation of the atomic species; and detaching the front useful layer from the rear useful layer along the zone of weakness to form a semiconductor structure comprising the support substrate and the rear useful layer thereon. The structures obtained can be used in the fields of electronics, optoelectronics or optics.
摘要翻译：一种用于制造半导体结构的方法，所述半导体结构在衬底上包括至少一个有用层。该方法包括提供源极基底中的弱化区域，其在弱化区域和源极基底的前面之间限定相对较厚的有用层; 将源极基板的正面粘合到支撑基板上，并在弱化区域将有用层与源极基板分离，以将有用层转移到支撑基板; 将原子物质植入有用层的自由面中，以在其中形成受控的平均注入深度，以在限定前后有用层的有用层内形成弱化区，其中后部有用层与源极基底和前部有用层接触含有较大浓度的缺陷; 在加入原子物质之后将加强基底粘合到前有用层的自由面上; 并且沿着弱化区从后部有用层分离前部有用层，以形成包括支撑基板和其上的后部有用层的半导体结构。所获得的结构可用于电子学，光电子学或光学领域。

77. 发明授权

US08048693B2 Methods and structures for relaxation of strained layers 有权
标题翻译：应变层松弛的方法和结构
公开(公告)号：US08048693B2
公开(公告)日：2011-11-01
申请号：US12341722
申请日：2008-12-22
申请人： Fabrice Letertre , Carlos Mazure
发明人： Fabrice Letertre , Carlos Mazure
IPC分类号： H01L21/00
CPC分类号： H01L21/2007 , H01L21/324 , H01L33/007 , H01L33/0075 , H01L33/0079 , H01L33/0095 , H01L33/44 , Y10S438/974
摘要： The present invention provides methods for relaxing a strained-material layer and structures produced by the methods. Briefly, the methods include depositing a first low-viscosity layer that includes a first compliant material on the strained-material layer, depositing a second low-viscosity layer that includes a second compliant material on the strained-material layer to form a first sandwiched structure and subjecting the first sandwiched structure to a heat treatment such that the reflow of the first and the second low-viscosity layers permits the strained-material layer to at least partly relax.
摘要翻译：本发明提供了用于松弛应变材料层的方法和通过该方法制备的结构。简而言之，所述方法包括在应变材料层上沉积包括第一顺应材料的第一低粘度层，在应变材料层上沉积包含第二柔性材料的第二低粘度层以形成第一夹层结构以及对所述第一夹层结构进行热处理，使得所述第一和第二低粘度层的回流允许所述应变材料层至少部分地松弛。

78. 发明申请

US20110012200A1 SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER 有权
标题翻译：具有绝缘层的充电区的基底
公开(公告)号：US20110012200A1
公开(公告)日：2011-01-20
申请号：US12865838
申请日：2008-03-13
申请人： Frederic Allibert , Gweltaz Gaudin , Fabrice Lallement , Didier Landru , Karine Landry , Mohamad Shaheen , Carlos Mazure
发明人： Frederic Allibert , Gweltaz Gaudin , Fabrice Lallement , Didier Landru , Karine Landry , Mohamad Shaheen , Carlos Mazure
IPC分类号： H01L27/12 , H01L21/30 , H01L21/02
CPC分类号： H01L29/78603 , H01L29/32 , H01L29/7841 , H01L31/0248
摘要： Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
摘要翻译：本发明的实施例涉及包括基底晶片，绝缘层和顶部半导体层的基板，其中绝缘层至少包括电荷密度高于1010电荷/ cm 2的绝对值的区域。本发明还涉及制造这种基材的方法。

79. 发明授权

US07407867B2 Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate 失效
标题翻译：用于同时产生至少一对半导体结构的方法，每个半导体结构在衬底上包括至少一个有用层
公开(公告)号：US07407867B2
公开(公告)日：2008-08-05
申请号：US11509047
申请日：2006-08-24
申请人： Bruno Ghyselen , Cécile Aulnette , Benoĩt Bataillou , Carlos Mazure , Hubert Moriceau
发明人： Bruno Ghyselen , Cécile Aulnette , Benoĩt Bataillou , Carlos Mazure , Hubert Moriceau
IPC分类号： H01L21/20
CPC分类号： H01L21/76254 , Y10S438/977
摘要： A method for producing a semiconductor structure that includes at least one useful layer on a substrate. This method includes providing a source substrate with a zone of weakness therein that defines a relatively thick useful layer between the zone of weakness and a front face of the source substrate; bonding the front face of the source substrate to a support substrate and detaching the useful layer from the source substrate at the zone of weakness to transfer the useful layer to the support substrate; implanting atomic species into a free face of the useful layer to a controlled mean implantation depth therein to form a zone of weakness within the useful layer that defines front and rear useful layers, with the rear useful layer contacting the source substrate and the front useful layer containing a greater concentration of defects; bonding a stiffening substrate to the free face of the front useful layer after implantation of the atomic species; and detaching the front useful layer from the rear useful layer along the zone of weakness to form a semiconductor structure comprising the support substrate and the rear useful layer thereon. The structures obtained can be used in the fields of electronics, optoelectronics or optics.
摘要翻译：一种用于制造半导体结构的方法，所述半导体结构在衬底上包括至少一个有用层。该方法包括提供源极基底中的弱化区域，其在弱化区域和源极基底的前面之间限定相对较厚的有用层; 将源极基板的正面粘合到支撑基板上，并在弱化区域将有用层与源极基板分离，以将有用层转移到支撑基板; 将原子物质植入有用层的自由面中，以在其中形成受控的平均注入深度，以在限定前后有用层的有用层内形成弱化区，其中后部有用层与源极基底和前部有用层接触含有较大浓度的缺陷; 在加入原子物质之后将加强基底粘合到前有用层的自由面上; 并且沿着弱化区从后部有用层分离前部有用层，以形成包括支撑基板和其上的后部有用层的半导体结构。所获得的结构可用于电子学，光电子学或光学领域。

80. 发明申请

US20070023867A1 Film taking-off method 有权
标题翻译：电影起飞方式
公开(公告)号：US20070023867A1
公开(公告)日：2007-02-01
申请号：US11221045
申请日：2005-09-06
申请人： Cecile Aulnette , Ian Cayrefourcq , Carlos Mazure
发明人： Cecile Aulnette , Ian Cayrefourcq , Carlos Mazure
IPC分类号： H01L29/06 , H01L21/46
CPC分类号： H01L21/76254
摘要： The invention relates to a method of producing a film intended for applications in electronics, optics or optronics starting from an initial wafer, which includes a step of implanting atomic species through one of the faces of the wafer. This method includes forming a step of defined height around the periphery of the wafer, with the step having a mean thickness that is less than that of the wafer; and selectively implanting atomic species through a face of the wafer but not through the step to form an implanted zone at a defined implant depth with the film being defined between the face of the wafer and the implanted zone. The implantation of atomic species into the step can be prevented by forming a protective layer at least over the step or by masking the step. The invention also relates to a wafer obtainable by the method.
摘要翻译：本发明涉及一种从初始晶片开始制造用于电子学，光学或光电子学中的薄膜的方法，其包括通过晶片的一个表面注入原子物质的步骤。该方法包括：形成围绕晶片周边的限定高度的台阶，其平均厚度小于晶片的平均厚度; 并且通过晶片的表面选择性地注入原子物质，但不通过该步骤，以在限定的注入深度处形成植入区域，其中膜被限定在晶片的表面和植入区域之间。可以通过至少在该步骤上形成保护层或通过掩蔽该步骤来防止将原子物质注入到该步骤中。本发明还涉及可通过该方法获得的晶片。

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