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71. 发明申请

US20090115311A1 Fabrication of a Semiconductor Nanoparticle Embedded Insulating Film Electroluminescence Device 有权
标题翻译：半导体纳米颗粒嵌入式绝缘膜电致发光器件的制造
公开(公告)号：US20090115311A1
公开(公告)日：2009-05-07
申请号：US12187605
申请日：2008-08-07
申请人： Pooran Chandra Joshi , Jiandong Huang , Apostolos T. Voutsas
发明人： Pooran Chandra Joshi , Jiandong Huang , Apostolos T. Voutsas
IPC分类号： H05B33/00 , H01L21/38
CPC分类号： C23C16/30 , C23C16/24 , C23C16/401 , C23C16/402 , C23C16/505 , C23C16/56 , H01L21/0214 , H01L21/02274 , H01L21/02321 , H01L21/0234 , H01L21/02532 , H01L21/02601 , H01L21/0262 , H01L21/31608 , H01L33/18
摘要： A method is provided for fabricating a semiconductor nanoparticle embedded Si insulating film for electroluminescence (EL) applications. The method provides a bottom electrode, and deposits a semiconductor nanoparticle embedded Si insulating film, including an element selected from a group consisting of N and C, overlying the bottom electrode. After annealing, a semiconductor nanoparticle embedded Si insulating film is formed having an extinction coefficient (k) in a range of 0.01-1.0, as measured at about 632 nanometers (nm), and a current density (J) of greater than 1 Ampere per square centimeter (A/cm2) at an applied electric field lower than 3 MV/cm. In another aspect, the annealed semiconductor nanoparticle embedded Si insulating film has an index of refraction (n) in a range of 1.8-3.0, as measured at 632 nm, with a current density of greater than 1 A/cm2 at an applied electric field lower than 3 MV/cm.
摘要翻译：提供了一种用于制造用于电致发光（EL）应用的半导体纳米颗粒嵌入的Si绝缘膜的方法。该方法提供底部电极，并且沉积半导体纳米颗粒嵌入的Si绝缘膜，其包括选自N和C组成的组的元素，覆盖在底部电极上。在退火之后，形成半导体纳米颗粒嵌入的Si绝缘膜，其消光系数（k）在0.01〜1.0的范围内，在大约632纳米（nm）测量，电流密度（J）大于1安培在施加的电场低于3MV / cm下的平方厘米（A / cm 2）。在另一方面，被退火的半导体纳米颗粒嵌入的Si绝缘膜的折射率（n）在632nm处测量的范围为1.8-3.0，在施加的电场下的电流密度大于1A / cm 2 低于3 MV / cm。

72. 发明申请

US20080246088A1 Self-Aligned Lightly Doped Drain Recessed-Gate Thin-Film Transistor 有权
标题翻译：自对准轻掺杂漏极栅极薄膜晶体管
公开(公告)号：US20080246088A1
公开(公告)日：2008-10-09
申请号：US12140017
申请日：2008-06-16
申请人： Paul j. Schuele , Mark A. Crowder , Apostolos T. Voutsas , Hidayat Kisdarjono
发明人： Paul j. Schuele , Mark A. Crowder , Apostolos T. Voutsas , Hidayat Kisdarjono
IPC分类号： H01L29/786
CPC分类号： H01L29/78621 , H01L29/66621 , H01L29/66757 , H01L29/78627
摘要： A recessed-gate thin-film transistor (RG-TFT) with a self-aligned lightly doped drain (LDD) is provided, along with a corresponding fabrication method. The method deposits an insulator overlying a substrate and etches a trench in the insulator. The trench has a bottom and sidewalls. An active silicon (Si) layer is formed overlying the insulator and trench, with a gate oxide layer over the active Si layer. A recessed gate electrode is then formed in the trench. The TFT is doped and LDD regions are formed in the active Si layer overlying the trench sidewalls. The LDD regions have a length that extends from a top of the trench sidewall, to the trench bottom, with a doping density that decreases in response to the LDD length. Alternately stated, the LDD length is directly related to the depth of the trench.
摘要翻译：提供了具有自对准轻掺杂漏极（LDD）的凹入栅极薄膜晶体管（RG-TFT）以及相应的制造方法。该方法沉积覆盖衬底的绝缘体并蚀刻绝缘体中的沟槽。沟槽有一个底部和侧壁。在绝缘体和沟槽上形成有源硅（Si）层，在有源Si层上方形成栅极氧化层。然后在沟槽中形成凹陷栅电极。 TFT是掺杂的，并且LDD区域形成在覆盖沟槽侧壁的有源Si层中。 LDD区域具有从沟槽侧壁的顶部延伸到沟槽底部的长度，其掺杂密度响应于LDD长度而减小。替代地，LDD长度与沟槽的深度直接相关。

73. 发明授权

US07419858B2 Recessed-gate thin-film transistor with self-aligned lightly doped drain 有权
标题翻译：具有自对准轻掺杂漏极的嵌入式栅极薄膜晶体管
公开(公告)号：US07419858B2
公开(公告)日：2008-09-02
申请号：US11513977
申请日：2006-08-31
申请人： Paul J. Schuele , Mark A. Crowder , Apostolos T. Voutsas , Hidayat Kisdarjono
发明人： Paul J. Schuele , Mark A. Crowder , Apostolos T. Voutsas , Hidayat Kisdarjono
IPC分类号： H01L21/84
CPC分类号： H01L29/78621 , H01L29/66621 , H01L29/66757 , H01L29/78627
摘要： A recessed-gate thin-film transistor (RG-TFT) with a self-aligned lightly doped drain (LDD) is provided, along with a corresponding fabrication method. The method deposits an insulator overlying a substrate and etches a trench in the insulator. The trench has a bottom and sidewalls. An active silicon (Si) layer is formed overlying the insulator and trench, with a gate oxide layer over the active Si layer. A recessed gate electrode is then formed in the trench. The TFT is doped and LDD regions are formed in the active Si layer overlying the trench sidewalls. The LDD regions have a length that extends from a top of the trench sidewall, to the trench bottom, with a doping density that decreases in response to the LDD length. Alternately stated, the LDD length is directly related to the depth of the trench.
摘要翻译：提供了具有自对准轻掺杂漏极（LDD）的凹入栅极薄膜晶体管（RG-TFT）以及相应的制造方法。该方法沉积覆盖衬底的绝缘体并蚀刻绝缘体中的沟槽。沟槽有一个底部和侧壁。在绝缘体和沟槽上形成有源硅（Si）层，在有源Si层上方形成栅极氧化层。然后在沟槽中形成凹陷栅电极。 TFT是掺杂的，并且LDD区域形成在覆盖沟槽侧壁的有源Si层中。 LDD区域具有从沟槽侧壁的顶部延伸到沟槽底部的长度，其掺杂密度响应于LDD长度而减小。替代地，LDD长度与沟槽的深度直接相关。

74. 发明授权

US07192479B2 Laser annealing mask and method for smoothing an annealed surface 有权
标题翻译：激光退火掩模和平滑退火表面的方法
公开(公告)号：US07192479B2
公开(公告)日：2007-03-20
申请号：US10124826
申请日：2002-04-17
申请人： Yasuhiro Mitani , Apostolos T. Voutsas , Mark A. Crowder
发明人： Yasuhiro Mitani , Apostolos T. Voutsas , Mark A. Crowder
IPC分类号： H01L21/322
CPC分类号： C30B29/06 , C30B13/00
摘要： A mask with sub-resolution aperture features and a method for smoothing an annealed surface using a sub-resolution mask pattern are provided. The method comprises: supplying a laser beam having a first wavelength; supplying a mask with a first mask section having apertures with a first dimension and a second mask section with apertures having a second dimension, less than the first dimension; applying a laser beam having a first energy density to a substrate region; melting a substrate region in response to the first energy density; crystallizing the substrate region; applying a diffracted laser beam to the substrate region; and, in response to the diffracted laser beam, smoothing the substrate region surface. In some aspects of the method, applying a diffracted laser beam to the substrate area includes applying a diffracted laser beam having a second energy density, less than the first energy density, to the substrate region. The second energy density is in the range of 40% to 70% of the first energy density, and preferably in the range of 50% to 60% of the first energy density.
摘要翻译：提供了具有子分辨率孔径特征的掩模和使用子分辨率掩模图案来平滑退火表面的方法。该方法包括：提供具有第一波长的激光束; 向具有具有第一尺寸的孔的第一掩模部分和具有小于所述第一尺寸的具有第二尺寸的孔的第二掩模部分提供掩模; 将具有第一能量密度的激光束施加到衬底区域; 响应于第一能量密度熔化基底区域; 使衬底区域结晶; 将衍射激光束施加到所述衬底区域; 并且响应于衍射激光束，平滑基板区域表面。在该方法的一些方面中，将衍射激光束施加到衬底区域包括将具有小于第一能量密度的第二能量密度的衍射激光束施加到衬底区域。第二能量密度在第一能量密度的40％至70％的范围内，优选在第一能量密度的50％至60％的范围内。

75. 发明授权

US07018468B2 Process for long crystal lateral growth in silicon films by UV and IR pulse sequencing 有权
标题翻译：通过UV和IR脉冲测序在硅膜中长晶体横向生长的工艺
公开(公告)号：US07018468B2
公开(公告)日：2006-03-28
申请号：US10713383
申请日：2003-11-13
申请人： Apostolos T. Voutsas , Robert S. Sposili , Mark A. Crowder
发明人： Apostolos T. Voutsas , Robert S. Sposili , Mark A. Crowder
IPC分类号： C30B1/06
CPC分类号： H01L21/02686 , C30B13/00 , C30B13/24 , C30B29/06 , H01L21/02532 , H01L21/2022 , H01L21/2026 , H01L27/1285
摘要： A process of lateral crystallization is provided for increasing the lateral growth length (LGL). A localized region of the substrate is heated for a short period of time. While the localized region of the substrate is still heated, a silicon film overlying the substrate is irradiated to anneal the silicon film to crystallize a portion of the silicon film in thermal contact with the heated substrate region. A CO2 laser may be used as a heat source to heat the substrate, while a UV laser or a visible spectrum laser is used to irradiate and crystallize the film.
摘要翻译：提供横向结晶的方法用于增加横向生长长度（LGL）。将衬底的局部区域加热一段短时间。当衬底的局部区域仍被加热时，照射覆盖在衬底上的硅膜来退火硅膜，以使与加热的衬底区域热接触的一部分硅膜结晶。可以使用CO 2激光器作为加热衬底的热源，而使用UV激光或可见光谱激光来照射和结晶膜。

76. 发明授权

US06995053B2 Vertical thin film transistor 失效
标题翻译：垂直薄膜晶体管
公开(公告)号：US06995053B2
公开(公告)日：2006-02-07
申请号：US10831424
申请日：2004-04-23
申请人： Paul J. Schuele , Apostolos T. Voutsas
发明人： Paul J. Schuele , Apostolos T. Voutsas
IPC分类号： H01L27/01
CPC分类号： H01L27/12 , H01L29/78624 , H01L29/78642 , H01L29/78648 , H01L29/78675
摘要： A vertical thin-film transistor (V-TFT) is provided along with a method for forming the V-TFT. The method comprises: providing a substrate made from a material such as Si, quartz, glass, or plastic; conformally depositing an insulating layer overlying the substrate; forming a gate, having sidewalls and a thickness, overlying a substrate insulation layer; forming a gate oxide layer overlying the gate sidewalls, and a gate insulation layer overlying the gate top surface; etching the exposed substrate insulation layer; forming a first source/drain region overlying the gate insulation layer; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall with a channel length about equal to the thickness of the gate, interposed between the first and second source/drain regions.
摘要翻译：提供垂直薄膜晶体管（V-TFT）以及用于形成V-TFT的方法。该方法包括：提供由诸如Si，石英，玻璃或塑料的材料制成的衬底; 保形地沉积覆盖衬底的绝缘层; 形成具有覆盖衬底绝缘层的侧壁和厚度的栅极; 形成覆盖所述栅极侧壁的栅极氧化层，以及覆盖所述栅极顶表面的栅极绝缘层; 蚀刻暴露的基板绝缘层; 形成覆盖所述栅极绝缘层的第一源极/漏极区域; 在第一栅极侧壁附近形成覆盖衬底绝缘层的第二源极/漏极区域; 并且在第一和第二源极/漏极区域之间形成沟槽区域，该沟道区域覆盖具有大约等于栅极厚度的沟道长度的第一栅极侧壁。

77. 发明授权

US06881686B1 Low-fluence irradiation for lateral crystallization enabled by a heating source 失效
公开(公告)号：US06881686B1
公开(公告)日：2005-04-19
申请号：US10805120
申请日：2004-03-19
申请人： Robert S. Sposili , Mark A. Crowder , Apostolos T. Voutsas
发明人： Robert S. Sposili , Mark A. Crowder , Apostolos T. Voutsas
IPC分类号： C30B1/00 , C30B13/00 , C30B13/24 , C30B29/06 , H01L21/20 , H01L21/77 , H01L21/84 , H01L21/26 , H01L21/324 , H01L21/42
CPC分类号： H01L21/02686 , C30B13/00 , C30B13/24 , C30B29/06 , H01L21/02532 , H01L21/2022 , H01L21/2026 , H01L27/1285
摘要： A process of lateral crystallization comprises providing a silicon film on a substrate surface, exposing a localized substrate region at the substrate surface to a laser heating source, and annealing a portion of the silicon film in thermal contact with the localized substrate region by exposing the silicon film to a low-fluence optical annealing source.

78. 发明授权

US08947333B2 Switchable viewing angle display with local dimming function 有权
标题翻译：可切换的视角显示，具有局部调光功能
公开(公告)号：US08947333B2
公开(公告)日：2015-02-03
申请号：US13173343
申请日：2011-06-30
申请人： Jiandong Huang , Apostolos T. Voutsas
发明人： Jiandong Huang , Apostolos T. Voutsas
IPC分类号： G09G3/36
CPC分类号： G02F1/133615 , G02F1/1323 , G02F1/133526
摘要： A switchable viewing angle display method is provided. The method provides a front panel array of display pixels. Also provided is an array of microlenses underlying the array of display pixels. Each microlens has a focal point and each microlens is associated with a corresponding block of display pixels. A backlight panel has an edge-coupled waveguide pipe with an optical input connected to a column of light emitting diodes (LEDs). The backlight panel includes a top array of selectively enabled extraction pixels, a planar mirror underlying the waveguide pipe, and a bottom array of selectively enabled extraction pixels interposed between the waveguide pipe and the planar mirror. In response to accepting a display viewing angle change command, an extraction pixel is enabled from either the top array or the bottom array, and a waveguide pipe light extraction position is formed, changing the viewing angle.
摘要翻译：提供了可切换的视角显示方法。该方法提供了显示像素的前面板阵列。还提供了显示像素阵列下方的微透镜阵列。每个微透镜具有焦点，并且每个微透镜与相应的显示像素块相关联。背光面板具有边缘耦合波导管，其具有连接到发光二极管（LED）列的光学输入。背光面板包括有选择地启用的提取像素的顶部阵列，位于波导管下面的平面镜，以及置于波导管和平面镜之间的有选择地启用的提取像素的底部阵列。响应于接受显示视角改变命令，可以从顶部阵列或底部阵列启用提取像素，并且形成波导管光提取位置，改变视角。

79. 发明授权

US08928567B2 Switchable viewing angle display 有权
标题翻译：可切换视角显示
公开(公告)号：US08928567B2
公开(公告)日：2015-01-06
申请号：US13104896
申请日：2011-05-10
申请人： Jiandong Huang , Apostolos T. Voutsas
发明人： Jiandong Huang , Apostolos T. Voutsas
IPC分类号： G09G3/36 , G09G3/34 , G02F1/13
CPC分类号： G09G3/342 , G02F1/1323 , G09G3/36 , G09G2320/0626 , G09G2320/068
摘要： A switchable viewing angle display method is provided, using arrayed microlenses and a waveguide pipe with selectable light extraction positions. The method provides a front panel array of display pixels. Also provided is an array of microlenses underlying the array of display pixels. Each microlens has a focal point and each microlens is associated with a corresponding block of display pixels. A backlight panel has an edge-coupled waveguide pipe with an optical input connected to a column of light emitting diodes (LEDs). The backlight panel includes an array extraction pixels, each extraction pixel underlying a corresponding microlens, and the backlight panel also includes a planar mirror underlying the waveguide pipe. In response to a display viewing angle change command, a waveguide pipe's light extraction position is selected, which is the distance between the extraction pixels and their corresponding microlenses, and the display viewing angle is changed.
摘要翻译：提供可切换的视角显示方法，使用阵列微透镜和具有可选光提取位置的波导管。该方法提供了显示像素的前面板阵列。还提供了显示像素阵列下方的微透镜阵列。每个微透镜具有焦点，并且每个微透镜与相应的显示像素块相关联。背光面板具有边缘耦合波导管，其具有连接到发光二极管（LED）列的光学输入。背光面板包括阵列提取像素，每个提取像素位于对应的微透镜下方，并且背光面板还包括位于波导管下方的平面镜。响应于显示视角改变命令，选择波导管的光提取位置，其是提取像素与其相应的微透镜之间的距离，并且改变显示视角。

80. 发明授权

US08896907B2 Plasmonic reflective display fabricated using anodized aluminum oxide 有权
标题翻译：使用阳极氧化铝制造的等离子体反射显示器
公开(公告)号：US08896907B2
公开(公告)日：2014-11-25
申请号：US13449370
申请日：2012-04-18
申请人： Douglas J. Tweet , Akinori Hashimura , Paul J. Schuele , Apostolos T. Voutsas
发明人： Douglas J. Tweet , Akinori Hashimura , Paul J. Schuele , Apostolos T. Voutsas
IPC分类号： G02B26/00 , G02F1/1335
CPC分类号： G02F1/133553 , G02F1/19 , G02F2201/124 , G02F2203/10
摘要： A method is provided for forming a reflective plasmonic display. The method provides a substrate and deposits a bottom dielectric layer. A conductive film is deposited overlying the bottom dielectric layer. A hard mask is formed with nano-size openings overlying the conductive film. The conductive film is plasma etched via nano-size openings in the hard mask, stopping at the dielectric layer. After removing the hard mask, a conductive film is left with nano-size openings to the dielectric layer. Metal is deposited in the nano-size openings, creating a pattern of metallic nanoparticles overlying the dielectric layer. Then, the conductive film is removed. The hard mask may be formed by conformally depositing an Al film overlying the conductive film and anodizing the Al film, creating a hard mask of porous anodized Al oxide (AAO) film. The porous AAO film may form a short-range hexagonal, and long-range random order hole patterns.
摘要翻译：提供了形成反射等离子体显示器的方法。该方法提供衬底并沉积底部电介质层。沉积覆盖在底部介电层上的导电膜。形成具有覆盖导电膜的纳米尺寸开口的硬掩模。导电膜通过硬掩模中的纳米尺寸开口进行等离子体蚀刻，停留在电介质层。在去除硬掩模之后，导电膜留下具有到介电层的纳米尺寸的开口。金属沉积在纳米尺寸的开口中，形成覆盖在介电层上的金属纳米颗粒图案。然后，去除导电膜。硬掩模可以通过共形沉积覆盖在导电膜上的Al膜并阳极氧化Al膜，形成多孔阳极氧化Al氧化物（AAO）膜的硬掩模来形成。多孔AAO膜可以形成短程六边形和长程随机顺序孔图案。

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