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71. 发明申请

US20090026623A1 BURIED METAL-SEMICONDUCTOR ALLOY LAYERS AND STRUCTURES AND METHODS FOR FABRICATION THEREOF 有权
标题翻译：金属半导体合金层及其制造方法及其制造方法
公开(公告)号：US20090026623A1
公开(公告)日：2009-01-29
申请号：US11828455
申请日：2007-07-26
申请人： Christian Lavoie , Francois Pagette , Anna W. Topol
发明人： Christian Lavoie , Francois Pagette , Anna W. Topol
IPC分类号： H01L23/48 , H01L21/4763
CPC分类号： H01L23/53271 , H01L21/743 , H01L21/76243 , H01L21/76889 , H01L21/84 , H01L23/535 , H01L27/1203 , H01L29/78603 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a metal-semiconductor alloy layer uses particular thermal annealing conditions to provide a stress free metal-semiconductor alloy layer through interdiffusion of a buried semiconductor material layer and a metal-semiconductor alloy forming metal layer that contacts the buried semiconductor material layer within an aperture through a capping layer beneath which is buried the semiconductor material layer. A resulting semiconductor structure includes the metal-semiconductor alloy layer that further includes an interconnect portion beneath the capping layer and a contiguous via portion that penetrates at least partially through the capping layer. Such a metal-semiconductor alloy layer may be located interposed between a substrate and a semiconductor device having an active doped region.
摘要翻译：一种形成金属 - 半导体合金层的方法使用特定的热退火条件，通过掩埋半导体材料层和接触掩埋半导体材料层的金属 - 半导体合金形成金属层的相互扩散来提供无应力的金属 - 半导体合金层，穿过覆盖层的孔，其下埋有半导体材料层。所得到的半导体结构包括还包括覆盖层下面的互连部分的金属 - 半导体合金层和至少部分地穿过覆盖层的连续通孔部分。这种金属 - 半导体合金层可以位于衬底和具有有源掺杂区域的半导体器件之间。

72. 发明申请

US20080217781A1 ELIMINATING METAL-RICH SILICIDES USING AN AMORPHOUS Ni ALLOY SILICIDE STRUCTURE 失效
公开(公告)号：US20080217781A1
公开(公告)日：2008-09-11
申请号：US12105037
申请日：2008-04-17
申请人： Christophe Detavernier , Simon Gaudet , Christian Lavoie , Conal E. Murray
发明人： Christophe Detavernier , Simon Gaudet , Christian Lavoie , Conal E. Murray
IPC分类号： H01L23/498
CPC分类号： H01L21/28518 , H01L21/2855
摘要： The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.

73. 发明申请

US20080164494A1 BIPOLAR TRANSISTOR WITH SILICIDED SUB-COLLECTOR 有权
标题翻译：双极晶体管，带有硅分集电极
公开(公告)号：US20080164494A1
公开(公告)日：2008-07-10
申请号：US11620242
申请日：2007-01-05
申请人： Francois Pagette , Christian Lavoie , Anna Topol
发明人： Francois Pagette , Christian Lavoie , Anna Topol
IPC分类号： H01L29/737 , H01L29/73 , H01L21/04
CPC分类号： H01L29/737 , H01L29/0821 , H01L29/66242
摘要： Embodiments of the invention provide a semiconductor device including a collector in an active region; a first and a second sub-collector, the first sub-collector being a heavily doped semiconductor material adjacent to the collector and the second sub-collector being a silicided sub-collector next to the first sub-collector; and a silicided reach-through in contact with the second sub-collector, wherein the first and second sub-collectors and the silicided reach-through provide a continuous conductive pathway for electrical charges collected by the collector from the active region. Embodiments of the invention also provide methods of fabricating the same.
摘要翻译：本发明的实施例提供了一种在有源区域中包括集电极的半导体器件; 第一和第二子集电极，所述第一子集电极是与所述集电极相邻的重掺杂半导体材料，所述第二子集电极是靠近所述第一子集电极的硅化副集电极; 以及与所述第二子集电器接触的硅化物到达通道，其中所述第一和第二子集电极和所述硅化物到达通道为所述集电器从所述有源区域收集的电荷提供连续的导电路径。本发明的实施例还提供了制造该方法的方法。

74. 发明申请

US20070275548A1 Method and structure for reducing contact resistance between silicide contact and overlying metallization 有权
标题翻译：用于降低硅化物接触和上覆金属化之间的接触电阻的方法和结构
公开(公告)号：US20070275548A1
公开(公告)日：2007-11-29
申请号：US11440202
申请日：2006-05-24
申请人： Christian Lavoie , Conal E. Murray , Kenneth P. Rodbell
发明人： Christian Lavoie , Conal E. Murray , Kenneth P. Rodbell
IPC分类号： H01L21/44
CPC分类号： H01L23/485 , H01L21/28518 , H01L21/76877 , H01L21/76883 , H01L23/53209 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A semiconductor structure in which the contact resistance in the contact opening is reduced as well as a method of forming the same are provided. This is achieved in the present invention by replacing conventional contact metallurgy, such as tungsten, or a metal silicide, such as Ni silicide or Cu silicide, with a metal germanide-containing contact material. The term “metal germanide-containing” is used in the present application to denote a pure metal germanide (i.e., MGe alloy) or a metal germanide that includes Si (i.e., MSiGe alloy).
摘要翻译：提供了其中接触开口中的接触电阻降低的半导体结构及其形成方法。这在本发明中通过用含金属锗化物的接触材料代替常规的接触冶金例如钨或金属硅化物，例如硅化镍或硅化铜，来实现。在本申请中使用的术语“含金属锗”表示纯金属锗（即MGe合金）或包含Si（即，MSiGe合金）的金属锗化物。

75. 发明申请

US20070218641A1 FULLY SILICIDED EXTRINSIC BASE TRANSISTOR 失效
标题翻译：完全硅酸超级基极晶体管
公开(公告)号：US20070218641A1
公开(公告)日：2007-09-20
申请号：US11308259
申请日：2006-03-14
申请人： David Ahlgren , Guy Cohen , Christian Lavoie , Francois Pagette , Anna Topol
发明人： David Ahlgren , Guy Cohen , Christian Lavoie , Francois Pagette , Anna Topol
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L29/1004 , H01L29/1608 , H01L29/66242 , H01L29/66287 , H01L29/732 , H01L29/7378
摘要： A system and method comprises forming an intrinsic base on a collector. The system and method further includes forming a fully silicided extrinsic base on the intrinsic base by a self-limiting silicidation process at a predetermined temperature and for a predetermined amount of time, the silicidation substantially stopping at the intrinsic base. The system and method further includes forming an emitter which is physically insulated from the extrinsic base and the collector, and which is in physical contact with the intrinsic base.
摘要翻译：一种系统和方法包括在收集器上形成固有碱基。该系统和方法还包括通过在预定温度下的自限硅化工艺在本征基底上形成完全硅化的外在碱，并且预定量的时间，硅化物在本征碱基本上停止。该系统和方法还包括形成与外部基极和集电器物理绝缘的发射极，并与内部基极物理接触。

76. 发明授权

US07271486B2 Retarding agglomeration of Ni monosilicide using Ni alloys 有权
标题翻译：使用Ni合金抑制Ni一硅化物的团聚
公开(公告)号：US07271486B2
公开(公告)日：2007-09-18
申请号：US11075289
申请日：2005-03-08
申请人： Cyril Cabral, Jr. , Roy A. Carruthers , Christophe Detavernier , James M. E. Harper , Christian Lavoie
发明人： Cyril Cabral, Jr. , Roy A. Carruthers , Christophe Detavernier , James M. E. Harper , Christian Lavoie
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： C04B35/58 , C04B35/58085 , C04B2235/40 , C04B2235/404 , C04B2235/405 , C04B2235/408 , C23C26/00 , C23C30/00 , H01L21/28518 , H01L21/76889
摘要： A method for providing a low resistance non-agglomerated Ni monosilicide contact that is useful in semiconductor devices. Where the inventive method of fabricating a substantially non-agglomerated Ni alloy monosilicide comprises the steps of: forming a metal alloy layer over a portion of a Si-containing substrate, wherein said metal alloy layer comprises of Ni and one or multiple alloying additive(s), where said alloying additive is Ti, V, Ge, Cr, Zr, Nb, Mo, Hf, Ta, W, Re, Rh, Pd or Pt or mixtures thereof; annealing the metal alloy layer at a temperature to convert a portion of said metal alloy layer into a Ni alloy monosilicide layer; and removing remaining metal alloy layer not converted into Ni alloy monosilicide. The alloying additives are selected for phase stability and to retard agglomeration. The alloying additives most efficient in retarding agglomeration are most efficient in producing silicides with low sheet resistance.
摘要翻译：一种用于提供半导体器件中有用的低电阻非聚集Ni单硅化物接触的方法。在制造基本上非团聚的Ni合金一硅化硅的本发明方法中，包括以下步骤：在含Si衬底的一部分上形成金属合金层，其中所述金属合金层包括Ni和一种或多种合金添加剂），其中所述合金添加剂为Ti，V，Ge，Cr，Zr，Nb，Mo，Hf，Ta，W，Re，Rh，Pd或Pt或其混合物; 在将所述金属合金层的一部分转化为Ni合金一硅化物层的温度下退火金属合金层; 并且除去未转化为Ni合金一硅化物的剩余金属合金层。选择合金添加剂用于相稳定性并阻止团聚。延迟聚集中最有效的合金添加剂在生产低薄层电阻的硅化物中是最有效的。

77. 发明申请

US20070128867A1 METHOD FOR ENHANCED UNI-DIRECTIONAL DIFFUSION OF METAL AND SUBSEQUENT SILICIDE FORMATION 审中-公开
标题翻译：金属和后续硅化物形成的增强的单向扩散方法
公开(公告)号：US20070128867A1
公开(公告)日：2007-06-07
申请号：US11672363
申请日：2007-02-07
申请人： Anthony Domenicucci , Bradley Jones , Christian Lavoie , Robert Purtell , Yun Wang , Kwong Wong
发明人： Anthony Domenicucci , Bradley Jones , Christian Lavoie , Robert Purtell , Yun Wang , Kwong Wong
IPC分类号： H01L21/44 , H01L23/48
CPC分类号： H01L21/28518 , H01L29/665
摘要： The present invention provides a method for enhancing uni-directional diffusion of a metal during silicidation by using a metal-containing silicon alloy in conjunction with a first anneal in which two distinct thermal cycles are performed. The first thermal cycle of the first anneal is performed at a temperature that is capable of enhancing the uni-directional diffusion of metal, e.g., Co and/or Ni, into a Si-containing layer. The first thermal cycle causes an amorphous metal-containing silicide to form. The second thermal cycle is performed at a temperature that converts the amorphous metal-containing silicide into a crystallized metal rich silicide that is substantially non-etchable as compared to the metal-containing silicon alloy layer or a pure metal-containing layer. Following the first anneal, a selective etch is performed to remove any unreacted metal-containing alloy layer from the structure. A second anneal is performed to convert the metal rich silicide phase formed by the two thermal cycles of the first anneal into a metal silicide phase that is in its lowest resistance phase. A metal silicide is provided whose thickness is self-limiting.
摘要翻译：本发明提供了一种通过使用含金属的硅合金与进行两个不同的热循环的第一次退火相结合的方法来增强金属在硅化过程中的单向扩散。第一退火的第一热循环在能够增强金属例如Co和/或Ni的单向扩散到含Si层中的温度下进行。第一热循环导致形成含非晶态金属的硅化物。第二热循环在将含非晶态金属的硅化物转化为与含金属的硅合金层或纯金属含有层相比基本上不可蚀刻的结晶的富含金属的硅化物的温度下进行。在第一退火之后，执行选择性蚀刻以从结构中除去任何未反应的含金属合金层。执行第二退火以将由第一退火的两个热循环形成的富金属硅化物相转换成处于其最低电阻相的金属硅化物相。提供了一种金属硅化物，其厚度是自限制的。

78. 发明申请

US20070087541A1 METHOD AND APPARATUS FOR DEPOSITION & FORMATION OF METAL SILICIDES 审中-公开
标题翻译：用于沉积和形成金属硅的方法和装置
公开(公告)号：US20070087541A1
公开(公告)日：2007-04-19
申请号：US11557259
申请日：2006-11-07
申请人： Kenneth Giewont , Bradley Jones , Christian Lavoie , Robert Purtell , Yun-Yu Wang , Kwong Wong
发明人： Kenneth Giewont , Bradley Jones , Christian Lavoie , Robert Purtell , Yun-Yu Wang , Kwong Wong
IPC分类号： H01L21/4763 , H01L21/3205
CPC分类号： C23C14/5806 , C23C14/16
摘要： Disclosed is a method and structure for forming a silicide on a silicon material. The invention places the silicon material in a vacuum environment, forms metal on the silicon material, and then heats the silicon surface and the metal without breaking the vacuum environment. The processes of forming the metal and heating the silicon can be performed simultaneously without breaking the vacuum environment to form the silicide as the metal is being deposited. After the foregoing processing, the invention can remove the silicon surface from the vacuum environment and perform additional heating of the silicon surface. The first heating process forms a monosilicide and the additional heating forms a disilicide.
摘要翻译：公开了一种在硅材料上形成硅化物的方法和结构。本发明将硅材料置于真空环境中，在硅材料上形成金属，然后在不破坏真空环境的情况下加热硅表面和金属。当金属沉积时，形成金属和加热硅的工艺可以同时进行而不破坏真空环境以形成硅化物。在上述处理之后，本发明可以从真空环境中去除硅表面，并对硅表面进行附加加热。第一加热工艺形成一硅化物，另外的加热形成二硅化物。

79. 发明授权

US07129169B2 Method for controlling voiding and bridging in silicide formation 有权
标题翻译：控制硅化物形成中孔隙和桥接的方法
公开(公告)号：US07129169B2
公开(公告)日：2006-10-31
申请号：US10709534
申请日：2004-05-12
申请人： Bradley P. Jones , Christian Lavoie , Robert J. Purtell , Yun-Yu Wang , Keith Kwong Hon Wong
发明人： Bradley P. Jones , Christian Lavoie , Robert J. Purtell , Yun-Yu Wang , Keith Kwong Hon Wong
IPC分类号： H01L21/44 , H01L21/3205
CPC分类号： H01L29/665 , H01L21/28518 , H01L29/7833
摘要： A method for forming a metal silicide contact for a semiconductor device includes forming a refractory metal layer over a substrate, including active and non-active area of said substrate, and forming a cap layer over the refractory metal layer. A counter tensile layer is formed over the cap layer, wherein the counter tensile layer is selected from a material such that an opposing directional stress is created between the counter tensile layer and the cap layer, with respect to a directional stress created between the refractory metal layer and the cap layer.
摘要翻译：一种用于形成用于半导体器件的金属硅化物接触的方法包括在衬底上形成难熔金属层，该衬底包括所述衬底的有源区和非有源区，并在难熔金属层上形成覆盖层。反面拉伸层形成在覆盖层上方，其中相对抗拉层选自材料，使得在相对拉伸层和盖层之间产生相对的方向应力，相对于难熔金属之间产生的方向应力层和盖层。

80. 发明授权

US07119012B2 Stabilization of Ni monosilicide thin films in CMOS devices using implantation of ions before silicidation 失效
标题翻译：在硅化物中使用离子注入，在CMOS器件中稳定Ni单硅化物薄膜
公开(公告)号：US07119012B2
公开(公告)日：2006-10-10
申请号：US10838377
申请日：2004-05-04
申请人： Roy A. Carruthers , Cedrik Y. Coia , Christophe Detavernier , Christian Lavoie , Kenneth P. Rodbell
发明人： Roy A. Carruthers , Cedrik Y. Coia , Christophe Detavernier , Christian Lavoie , Kenneth P. Rodbell
IPC分类号： H01L21/44
CPC分类号： H01L21/28052 , H01L21/28518 , H01L29/665
摘要： A method for forming a stabilized metal silicide film, e.g., contact (source/drain or gate), that does not substantially agglomerate during subsequent thermal treatments, is provided. In the present invention, ions that are capable of attaching to defects within the Si-containing layer are implanted into the Si-containing layer prior to formation of metal silicide. The implanted ions stabilize the film, because the implants were found to substantially prevent agglomeration or at least delay agglomeration to much higher temperatures than in cases in which no implants were used.
摘要翻译：提供了一种用于形成稳定的金属硅化物膜的方法，例如接触（源极/漏极或栅极），其在随后的热处理期间基本上不附聚。在本发明中，在形成金属硅化物之前，将能够附着到含Si层内的缺陷的离子注入到含Si层中。植入的离子稳定膜，因为发现植入物基本上防止结块或至少延迟聚集到比没有使用植入物的情况下更高的温度。

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