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1. 发明授权

US07679164B2 Bipolar transistor with silicided sub-collector 有权
标题翻译：双极晶体管，带硅化子集电极
公开(公告)号：US07679164B2
公开(公告)日：2010-03-16
申请号：US11620242
申请日：2007-01-05
申请人： Francois Pagette , Christian Lavoie , Anna Topol
发明人： Francois Pagette , Christian Lavoie , Anna Topol
IPC分类号： H01L27/102
CPC分类号： H01L29/737 , H01L29/0821 , H01L29/66242
摘要： Embodiments of the invention provide a semiconductor device including a collector in an active region; a first and a second sub-collector, the first sub-collector being a heavily doped semiconductor material adjacent to the collector and the second sub-collector being a silicided sub-collector next to the first sub-collector; and a silicided reach-through in contact with the second sub-collector, wherein the first and second sub-collectors and the silicided reach-through provide a continuous conductive pathway for electrical charges collected by the collector from the active region. Embodiments of the invention also provide methods of fabricating the same.
摘要翻译：本发明的实施例提供了一种在有源区域中包括集电极的半导体器件; 第一和第二子集电极，所述第一子集电极是与所述集电极相邻的重掺杂半导体材料，所述第二子集电极是靠近所述第一子集电极的硅化副集电极; 以及与所述第二子集电器接触的硅化物到达通道，其中所述第一和第二子集电极和所述硅化物到达通道为所述集电器从所述有源区域收集的电荷提供连续的导电路径。本发明的实施例还提供了制造该方法的方法。

2. 发明申请

US20100003800A1 BIPOLAR TRANSISTOR WITH SILICIDED SUB-COLLECTOR 有权
标题翻译：双极晶体管，带有硅分集电极
公开(公告)号：US20100003800A1
公开(公告)日：2010-01-07
申请号：US12557557
申请日：2009-09-11
申请人： Francois Pagette , Christian Lavoie , Anna Topol
发明人： Francois Pagette , Christian Lavoie , Anna Topol
IPC分类号： H01L21/331
CPC分类号： H01L29/737 , H01L29/0821 , H01L29/66242
摘要： Embodiments of the invention provide a method of fabricating a semiconductor device. The method includes defining a sub-collector region in a layer of doped semiconductor material; forming an active region, a dielectric region, and a reach-through region on top of the layer of doped semiconductor material with the dielectric region separating the active region from the reach-through region; and siliciding the reach-through region and a portion of the sub-collector region to form a partially silicided conductive pathway. A semiconductor device made thereby is also provided.
摘要翻译：本发明的实施例提供一种制造半导体器件的方法。该方法包括在掺杂半导体材料层中限定子集电极区; 在所述掺杂半导体材料层的顶部上形成有源区，电介质区和到达区，所述电介质区将所述有源区与所述覆盖区分离; 并且将通过区域和子集电极区域的一部分硅化以形成部分硅化物的导电路径。还提供了由此制成的半导体器件。

3. 发明申请

US20080164494A1 BIPOLAR TRANSISTOR WITH SILICIDED SUB-COLLECTOR 有权
标题翻译：双极晶体管，带有硅分集电极
公开(公告)号：US20080164494A1
公开(公告)日：2008-07-10
申请号：US11620242
申请日：2007-01-05
申请人： Francois Pagette , Christian Lavoie , Anna Topol
发明人： Francois Pagette , Christian Lavoie , Anna Topol
IPC分类号： H01L29/737 , H01L29/73 , H01L21/04
CPC分类号： H01L29/737 , H01L29/0821 , H01L29/66242
摘要： Embodiments of the invention provide a semiconductor device including a collector in an active region; a first and a second sub-collector, the first sub-collector being a heavily doped semiconductor material adjacent to the collector and the second sub-collector being a silicided sub-collector next to the first sub-collector; and a silicided reach-through in contact with the second sub-collector, wherein the first and second sub-collectors and the silicided reach-through provide a continuous conductive pathway for electrical charges collected by the collector from the active region. Embodiments of the invention also provide methods of fabricating the same.
摘要翻译：本发明的实施例提供了一种在有源区域中包括集电极的半导体器件; 第一和第二子集电极，所述第一子集电极是与所述集电极相邻的重掺杂半导体材料，所述第二子集电极是靠近所述第一子集电极的硅化副集电极; 以及与所述第二子集电器接触的硅化物到达通道，其中所述第一和第二子集电极和所述硅化物到达通道为所述集电器从所述有源区域收集的电荷提供连续的导电路径。本发明的实施例还提供了制造该方法的方法。

4. 发明申请

US20070218641A1 FULLY SILICIDED EXTRINSIC BASE TRANSISTOR 失效
标题翻译：完全硅酸超级基极晶体管
公开(公告)号：US20070218641A1
公开(公告)日：2007-09-20
申请号：US11308259
申请日：2006-03-14
申请人： David Ahlgren , Guy Cohen , Christian Lavoie , Francois Pagette , Anna Topol
发明人： David Ahlgren , Guy Cohen , Christian Lavoie , Francois Pagette , Anna Topol
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L29/1004 , H01L29/1608 , H01L29/66242 , H01L29/66287 , H01L29/732 , H01L29/7378
摘要： A system and method comprises forming an intrinsic base on a collector. The system and method further includes forming a fully silicided extrinsic base on the intrinsic base by a self-limiting silicidation process at a predetermined temperature and for a predetermined amount of time, the silicidation substantially stopping at the intrinsic base. The system and method further includes forming an emitter which is physically insulated from the extrinsic base and the collector, and which is in physical contact with the intrinsic base.
摘要翻译：一种系统和方法包括在收集器上形成固有碱基。该系统和方法还包括通过在预定温度下的自限硅化工艺在本征基底上形成完全硅化的外在碱，并且预定量的时间，硅化物在本征碱基本上停止。该系统和方法还包括形成与外部基极和集电器物理绝缘的发射极，并与内部基极物理接触。

5. 发明授权

US08003473B2 Bipolar transistor with silicided sub-collector 有权
标题翻译：双极晶体管，带硅化子集电极
公开(公告)号：US08003473B2
公开(公告)日：2011-08-23
申请号：US12557557
申请日：2009-09-11
申请人： Francois Pagette , Christian Lavoie , Anna Topol
发明人： Francois Pagette , Christian Lavoie , Anna Topol
IPC分类号： H01L21/331
CPC分类号： H01L29/737 , H01L29/0821 , H01L29/66242
摘要： Embodiments of the invention provide a method of fabricating a semiconductor device. The method includes defining a sub-collector region in a layer of doped semiconductor material; forming an active region, a dielectric region, and a reach-through region on top of the layer of doped semiconductor material with the dielectric region separating the active region from the reach-through region; and siliciding the reach-through region and a portion of the sub-collector region to form a partially silicided conductive pathway. A semiconductor device made thereby is also provided.
摘要翻译：本发明的实施例提供一种制造半导体器件的方法。该方法包括在掺杂半导体材料层中限定子集电极区; 在所述掺杂半导体材料层的顶部上形成有源区，电介质区和到达区，所述电介质区将所述有源区与所述覆盖区分离; 并且将通过区域和子集电极区域的一部分硅化以形成部分硅化的导电路径。还提供了由此制成的半导体器件。

6. 发明申请

US20080121936A1 SELF-ALIGNMENT SCHEME FOR A HETEROJUNCTION BIPOLAR TRANSISTOR 有权
标题翻译：自对准双极晶体管的自对准方案
公开(公告)号：US20080121936A1
公开(公告)日：2008-05-29
申请号：US11460013
申请日：2006-07-26
申请人： Francois Pagette , Anna Topol
发明人： Francois Pagette , Anna Topol
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/7378 , H01L29/66242
摘要： Embodiments herein present a structure, method, etc. for a self-alignment scheme for a heterojunction bipolar transistor (HBT). An HBT is provided, comprising an extrinsic base, a first self-aligned silicide layer over the extrinsic base, and a nitride etch stop layer above the first self-aligned silicide layer. A continuous layer is also included between the first self-aligned silicide layer and the nitride etch stop layer, wherein the continuous layer can comprise oxide. The HBT further includes spacers adjacent the continuous layer, wherein the spacers and the continuous layer separate the extrinsic base from an emitter contact. In addition, an emitter is provided, wherein the height of the emitter is less than or equal to the height of the extrinsic base. Moreover, a second self-aligned silicide layer is over the emitter, wherein the height of the second silicide layer is less than or equal to the height of the first silicide layer.
摘要翻译：本文的实施方案提供了用于异质结双极晶体管（HBT）的自对准方案的结构，方法等。提供了一种HBT，其包括非本征基极，在外部基极上的第一自对准硅化物层，以及位于第一自对准硅化物层上方的氮化物蚀刻停止层。第一自对准硅化物层和氮化物蚀刻停止层之间还包括连续层，其中连续层可以包括氧化物。 HBT还包括邻近连续层的间隔物，其中间隔物和连续层将外部碱基与发射体接触分开。此外，提供了发射器，其中发射器的高度小于或等于外部基极的高度。此外，第二自对准硅化物层在发射极之上，其中第二硅化物层的高度小于或等于第一硅化物层的高度。

7. 发明授权

US07394113B2 Self-alignment scheme for a heterojunction bipolar transistor 有权
标题翻译：异质结双极晶体管的自对准方案
公开(公告)号：US07394113B2
公开(公告)日：2008-07-01
申请号：US11460013
申请日：2006-07-26
申请人： Francois Pagette , Anna Topol
发明人： Francois Pagette , Anna Topol
IPC分类号： H01L29/70
CPC分类号： H01L29/7378 , H01L29/66242
摘要： Embodiments herein present a structure, method, etc. for a self-alignment scheme for a heterojunction bipolar transistor (HBT). An HBT is provided, comprising an extrinsic base, a first self-aligned silicide layer over the extrinsic base, and a nitride etch stop layer above the first self-aligned silicide layer. A continuous layer is also included between the first self-aligned silicide layer and the nitride etch stop layer, wherein the continuous layer can comprise oxide. The HBT further includes spacers adjacent the continuous layer, wherein the spacers and the continuous layer separate the extrinsic base from an emitter contact. In addition, an emitter is provided, wherein the height of the emitter is less than or equal to the height of the extrinsic base. Moreover, a second self-aligned silicide layer is over the emitter, wherein the height of the second silicide layer is less than or equal to the height of the first silicide layer.
摘要翻译：本文的实施方案提供了用于异质结双极晶体管（HBT）的自对准方案的结构，方法等。提供了一种HBT，其包括非本征基极，在外部基极上的第一自对准硅化物层，以及位于第一自对准硅化物层上方的氮化物蚀刻停止层。第一自对准硅化物层和氮化物蚀刻停止层之间还包括连续层，其中连续层可以包括氧化物。 HBT还包括邻近连续层的间隔物，其中间隔物和连续层将外部碱基与发射体接触分开。此外，提供了发射器，其中发射器的高度小于或等于外部基极的高度。此外，第二自对准硅化物层在发射极之上，其中第二硅化物层的高度小于或等于第一硅化物层的高度。

8. 发明申请

US20050269664A1 BIPOLAR TRANSISTOR WITH ISOLATION AND DIRECT CONTACTS 有权
标题翻译：具有隔离和直接联系的双极晶体管
公开(公告)号：US20050269664A1
公开(公告)日：2005-12-08
申请号：US10709905
申请日：2004-06-04
申请人： David Ahlgren , Gregory Freeman , Francois Pagette , Christopher Schnabel , Anna Topol
发明人： David Ahlgren , Gregory Freeman , Francois Pagette , Christopher Schnabel , Anna Topol
IPC分类号： H01L21/331 , H01L29/737 , H01L29/80
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor has a collector that is contacted directly beneath a base-collector junction by metallization to reduce collector resistance. A conventional reach-through and buried layer, as well as their associated resistance, are eliminated. The transistor is well isolated, nearly eliminating well-to-substrate capacitance and device-to-device leakage current. The structure provides for improved electrical performance, including improved fT, Fmax and drive current.
摘要翻译：双极晶体管具有通过金属化直接接触基极 - 集电极结下方的集电极，以降低集电极电阻。消除了常规的通孔和掩埋层以及它们的相关电阻。晶体管非常隔离，几乎消除了良好的衬底电容和器件到器件的漏电流。该结构提供了改进的电性能，包括改进的f T，F max和驱动电流。

9. 发明申请

US20090140297A1 SELF-ALIGNMENT SCHEME FOR A HETEROJUNCTION BIPOLAR TRANSISTOR 审中-公开
标题翻译：自对准双极晶体管的自对准方案
公开(公告)号：US20090140297A1
公开(公告)日：2009-06-04
申请号：US12114036
申请日：2008-05-02
申请人： Francois Pagette , Anna Topol
发明人： Francois Pagette , Anna Topol
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/7378 , H01L29/66242
摘要： Embodiments herein present a structure, method, etc. for a self-alignment scheme for a heterojunction bipolar transistor (HBT). An HBT is provided, comprising an extrinsic base, a first self-aligned silicide layer over the extrinsic base, and a nitride etch stop layer above the first self-aligned silicide layer. A continuous layer is also included between the first self-aligned silicide layer and the nitride etch stop layer, wherein the continuous layer can comprise oxide. The HBT further includes spacers adjacent the continuous layer, wherein the spacers and the continuous layer separate the extrinsic base from an emitter contact. In addition, an emitter is provided, wherein the height of the emitter is less than or equal to the height of the extrinsic base. Moreover, a second self-aligned silicide layer is over the emitter, wherein the height of the second silicide layer is less than or equal to the height of the first silicide layer.
摘要翻译：本文的实施方案提供了用于异质结双极晶体管（HBT）的自对准方案的结构，方法等。提供了一种HBT，其包括非本征基极，在外部基极上的第一自对准硅化物层，以及位于第一自对准硅化物层上方的氮化物蚀刻停止层。第一自对准硅化物层和氮化物蚀刻停止层之间还包括连续层，其中连续层可以包括氧化物。 HBT还包括邻近连续层的间隔物，其中间隔物和连续层将外部碱基与发射体接触分开。此外，提供了发射器，其中发射器的高度小于或等于外部基极的高度。此外，第二自对准硅化物层在发射极之上，其中第二硅化物层的高度小于或等于第一硅化物层的高度。

10. 发明申请

US20110084393A1 METHOD OF FORMING ELECTRODEPOSITED CONTACTS 有权
标题翻译：形成电沉积联系人的方法
公开(公告)号：US20110084393A1
公开(公告)日：2011-04-14
申请号：US12967633
申请日：2010-12-14
申请人： Cyril Cabral, JR. , Hariklia Deligianni , Randolph F. Knarr , Sandra G. Malhotra , Stephen Rossnagel , Xiaoyan Shao , Anna Topol , Philippe M. Vereecken
发明人： Cyril Cabral, JR. , Hariklia Deligianni , Randolph F. Knarr , Sandra G. Malhotra , Stephen Rossnagel , Xiaoyan Shao , Anna Topol , Philippe M. Vereecken
IPC分类号： H01L23/48
CPC分类号： H01L23/485 , H01L21/2885 , H01L21/76843 , H01L21/76846 , H01L21/76877 , H01L23/53252 , H01L2924/0002 , H01L2924/00
摘要： A contact metallurgy structure comprising a patterned dielectric layer having vias on a substrate; a silicide layer of cobalt and/or nickel located at the bottom of vias; a contact layer comprising Ti located in vias on top of the silicide layer; a diffusion layer located in vias and on top of the contact layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer comprises at least one member selected from the group consisting of copper, ruthenium, rhodium platinum, palladium, iridium, rhenium, tungsten, gold, silver and osmium and alloys thereof. When the metal fill layer comprises rhodium, the diffusion layer is not required. Optionally a seed layer for the metal fill layer can be employed.
摘要翻译：一种接触式冶金结构，包括在衬底上具有通孔的图案化介电层; 位于通孔底部的钴和/或镍的硅化物层; 包含位于硅化物层顶部的通孔中的Ti的接触层; 位于所述接触层的通孔和顶部的扩散层; 提供通孔中的金属填充层以及制造方法。金属填充层包括选自铜，钌，铑铂，钯，铱，铼，钨，金，银和锇中的至少一种以及它们的合金。当金属填充层包含铑时，不需要扩散层。任选地，可以使用用于金属填充层的种子层。

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