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61. 发明授权

US06855981B2 Silicon carbide power device having protective diode 有权
标题翻译：具有保护二极管的碳化硅功率器件
公开(公告)号：US06855981B2
公开(公告)日：2005-02-15
申请号：US10230152
申请日：2002-08-29
申请人： Rajesh Kumar , Hiroki Nakamura , Tsuyoshi Yamamoto , Toshiyuki Morishita
发明人： Rajesh Kumar , Hiroki Nakamura , Tsuyoshi Yamamoto , Toshiyuki Morishita
IPC分类号： H01L21/04 , H01L29/24 , H01L29/66 , H01L29/808 , H01L29/861 , H01L29/866 , H01L29/872 , H01L29/76
CPC分类号： H01L29/66992 , H01L29/1608 , H01L29/66068 , H01L29/8083 , H01L29/861 , H01L29/866 , H01L29/872
摘要： A silicon carbide power device includes a junction field effect transistor and a protective diode, which is a Zener or PN junction diode. The PN junction of the protective diode has a breakdown voltage lower than the PN junction of the transistor. Another silicon carbide power device includes a protective diode, which is a Schottky diode. The Schottky diode has a breakdown voltage lower than the PN junction of the transistor by adjusting Schottky barrier height or the depletion layer formed in the semiconductor included in the Schottky diode. Another silicon carbide power device includes three protective diodes, which are Zener diodes. Two of the protective diodes are used to clamp the voltages applied to the gate and the drain of the transistor due to surge energy and used to release the surge energy. The last diode is a thermo-sensitive diode, with which the temperature of the JFET is measured.
摘要翻译：碳化硅功率器件包括结场效应晶体管和作为齐纳二极管或PN结二极管的保护二极管。保护二极管的PN结的击穿电压低于晶体管的PN结。另一种碳化硅功率器件包括一个保护二极管，它是肖特基二极管。通过调整肖特基势垒高度或肖特基二极管中包含的半导体中形成的耗尽层，肖特基二极管的击穿电压低于晶体管的PN结。另一种碳化硅功率器件包括三个保护二极管，它们是齐纳二极管。两个保护二极管用于钳位由于浪涌能量施加到晶体管的栅极和漏极的电压，并用于释放浪涌能量。最后一个二极管是热敏二极管，测量JFET的温度。

62. 发明授权

US06245442B1 Metal matrix composite casting and manufacturing method thereof 失效
标题翻译：金属基复合材料的铸造及其制造方法
公开(公告)号：US06245442B1
公开(公告)日：2001-06-12
申请号：US09084396
申请日：1998-05-27
申请人： Shinichi Towata , Nobuo Kamiya , Hiroshi Hohjo , Naohisa Nishino , Tsuyoshi Yamamoto , Shoichi Onda
发明人： Shinichi Towata , Nobuo Kamiya , Hiroshi Hohjo , Naohisa Nishino , Tsuyoshi Yamamoto , Shoichi Onda
IPC分类号： C22C110
CPC分类号： H01L21/4871 , B22D19/14 , C22C1/1036 , H01L23/3733 , H01L2224/32225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/73265 , H01L2924/1305 , H01L2924/13055 , Y10T428/12361 , Y10T428/12389 , Y10T428/12486 , Y10T428/12757 , H01L2924/00014 , H01L2924/00
摘要： A metal matrix composite casting comprises a metal matrix composite and a processed member inserted in the metal matrix composite by enveloped casting. By the processed member which is easier to process than the metal matrix composite, a processed portion of a predetermined shape can be formed in the metal matrix composite. That is, by a simple processing such that the processed member is removed from the metal matrix composite or the processed portion is formed in the processed member itself, the processed portion having a desired shape can be easily formed in the metal matrix composite.
摘要翻译：金属基复合材料铸造包括金属基复合材料和通过包封铸造插入金属基复合材料中的加工构件。通过比金属基复合材料更容易加工的加工构件，可以在金属基复合材料中形成预定形状的加工部分。也就是说，通过简单的处理使得处理的构件从金属基质复合体中除去，或者加工部分形成在加工构件本身中，可以容易地在金属基质复合材料中形成具有所需形状的加工部分。

63. 发明授权

US6107661A Semiconductor device and method of manufacturing same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US6107661A
公开(公告)日：2000-08-22
申请号：US720018
申请日：1996-09-27
申请人： Naoto Okabe , Tsuyoshi Yamamoto
发明人： Naoto Okabe , Tsuyoshi Yamamoto
IPC分类号： H01L21/336 , H01L29/06 , H01L29/739 , H01L29/78 , H01L29/76
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/7397 , H01L29/7398 , H01L29/7809
摘要： A concave channel type DMOS structure having an improved gate-to-source breakdown voltage are disclosed. By establishing a curvature at a corner portion of a lattice-like pattern in a groove portion for forming the concave channel structure, the shape of the tip of a three-dimensionally projecting portion of a semiconductor region determined by a plane angle of the corner portion in the lattice-like pattern and an inclination of the groove portion is rounded. That is, a three-dimensionally sharpened corner portion in the concave channel structure is rounded, and thereby electric field concentration at the corner portion is suppressed.
摘要翻译：公开了具有改善的栅 - 源击穿电压的凹沟道型DMOS结构。通过在用于形成凹槽结构的凹槽部分中的格子状图案的角部处建立曲率，由角部分的平面角确定的半导体区域的三维突出部分的尖端的形状呈格子状，槽部的倾斜为圆形。也就是说，凹槽结构中的三维锐角部分是圆形的，从而抑制角部处的电场集中。

64. 发明授权

US5714781A Semiconductor device having a gate electrode in a grove and a diffused region under the grove 失效
标题翻译：半导体器件具有沟槽中的栅电极和沟槽下的扩散区域
公开(公告)号：US5714781A
公开(公告)日：1998-02-03
申请号：US638388
申请日：1996-04-26
申请人： Tsuyoshi Yamamoto , Masami Naito , Takeshi Fukazawa
发明人： Tsuyoshi Yamamoto , Masami Naito , Takeshi Fukazawa
IPC分类号： H01L21/336 , H01L29/08 , H01L29/423 , H01L29/78 , H01L29/76 , H01L29/94
CPC分类号： H01L29/7813 , H01L29/0847 , H01L29/42368
摘要： A power MOSFET having a groove for forming a channel improved for shortening the switching time and increasing the dielectric breakdown strength of the gate oxide film is disclosed. The power MOSFET includes a concave structure in which a gate oxide film at a groove bottom is thickened. Namely, since the gate oxide film between a gate electrode and a first conductivity type semiconductor layer is thick, the capacitance of the oxide film therebetween is reduced. Therefore, the input and output capacitance of the gate oxide film can be reduced, and switching loss can be also reduced since the switching time can be shortened. Further, greater dielectric breakdown strength of the gate oxide film can be obtained as a result of the thickened gate oxide film at the groove bottom.
摘要翻译：公开了一种功率MOSFET，其具有用于形成通道的沟槽，用于缩短开关时间并增加栅极氧化膜的介电击穿强度。功率MOSFET包括凹槽结构，其中凹槽底部的栅氧化膜被加厚。也就是说，由于栅电极和第一导电类型半导体层之间的栅极氧化膜厚，所以其之间的氧化膜的电容减小。因此，可以减小栅极氧化膜的输入和输出电容，并且可以减少开关损耗，因为可以缩短开关时间。此外，作为沟槽底部的增厚的栅极氧化膜的结果，可以获得更大的栅极氧化膜的介电击穿强度。

65. 发明授权

US5675717A Image processing apparatus and method for previewing a color image generated by a color printer and displayed at a host computer 失效
标题翻译：用于预览由彩色打印机产生并在主计算机上显示的彩色图像的图像处理装置和方法
公开(公告)号：US5675717A
公开(公告)日：1997-10-07
申请号：US378371
申请日：1995-01-25
申请人： Tsuyoshi Yamamoto
发明人： Tsuyoshi Yamamoto
IPC分类号： G06K15/00 , G06T11/60 , G09G5/02 , H04N1/46 , H04N1/60 , G06K15/02 , H04N1/50
CPC分类号： G06K15/00 , H04N1/6011 , G06K2215/0017
摘要： In an image processing apparatus for previewing a color image, by using a color output device for forming a preview image, processing is decentralized, the load on a host computer is reduced, and a preview-processing program can be easily formed. The apparatus includes a communication device, e.g., a bidirectional interface, for communicating with a host computer, an output device for outputting image information for image formation to an image forming device for forming an image on a recording material based on input color-image information from the host computer, and a color conversion device for previewing an image which generates color-preview-image information for correcting the image formed by the image forming device on a color monitor. The color-preview-image information is transmitted to the host computer by the communication device.
摘要翻译：在用于预览彩色图像的图像处理装置中，通过使用用于形成预览图像的颜色输出装置，处理是分散的，减少了主计算机上的负载，并且可以容易地形成预览处理程序。该装置包括用于与主计算机通信的通信装置，例如双向接口，用于将图像形成的图像信息输出到用于基于输入的彩色图像信息在记录材料上形成图像的图像形成装置的输出装置以及用于预览在颜色监视器上生成用于校正由图像形成装置形成的图像的颜色预览图像信息的图像的颜色转换装置。彩色预览图像信息由通信设备发送到主计算机。

66. 发明授权

US5627440A Method of computing drive pattern for suppressing vibration of industrial robot 失效
标题翻译：计算工业机器人振动抑制驱动模式的方法
公开(公告)号：US5627440A
公开(公告)日：1997-05-06
申请号：US423458
申请日：1995-04-19
申请人： Tsuyoshi Yamamoto , Katsuhisa Tanaka , Fumihiko Komuro
发明人： Tsuyoshi Yamamoto , Katsuhisa Tanaka , Fumihiko Komuro
IPC分类号： B25J9/10 , B25J9/18 , B25J13/00 , G05B19/416 , G05D19/02 , G05B5/01
CPC分类号： G05B19/416
摘要： Vibration occurring at an arm part of an industrial robot when the arm part is moved is controlled by combining vibrations occurring at two time points for mutual interference. In each of acceleration and slowdown periods, the time difference of rise and fall time points t.sub.1, t.sub.4 and t.sub.2, t.sub.3 of a differential value of an acceleration with respect to time is set to be an integral number times the natural vibration period of the system so that the vibrations occurring at the rise and fall time points interfere with each other to cancel one another. Also, the vibration occurring in the acceleration period and the vibration occurring in the slowdown period can cancel each other.
摘要翻译：通过组合在两个时间点发生的相互干扰的振动来控制臂部移动时在工业机器人的臂部发生的振动。在加速和减速时段中，加速度相对于时间的差分值的上升和下降时间点t1，t4和t2，t3的时间差被设定为系统的固有振动周期的整数倍使得在上升和下降时间点发生的振动彼此相互干扰以相互抵消。此外，在加速期间发生的振动和在减速期间发生的振动可以相互抵消。

67. 发明授权

US5464992A Insulated gate bipolar transistor provided with a minority carrier extracting layer 失效
标题翻译：具有少数载流子提取层的绝缘栅双极晶体管
公开(公告)号：US5464992A
公开(公告)日：1995-11-07
申请号：US358983
申请日：1994-12-19
申请人： Naoto Okabe , Tsuyoshi Yamamoto , Naohito Kato
发明人： Naoto Okabe , Tsuyoshi Yamamoto , Naohito Kato
IPC分类号： H01L21/8234 , H01L21/331 , H01L27/088 , H01L29/10 , H01L29/739 , H01L29/78 , H01L27/01 , H01L33/00
CPC分类号： H01L29/66333 , H01L29/1095
摘要： A p type pad well layer is formed at the surface of an n.sup.- type drain layer under a gate bonding pad and the surface thereof is provided with a p.sup.++ type pad layer to be provided with lower resistivity. The p.sup.++ type pad layer is connected with a source electrode through a contact hole. Since the gate electrode supplying each cell with gate potential is of a pattern having extensions in a comb-teeth form arranged along the boundary between the pad region and the cell region, there is present substantially no gate electrode under the pad. Hence, introduction of impurities into the entire surface of the well layer under the pad region can be performed simultaneously with formation of p.sup.++ type contact layers after the formation of the gate electrode, and accordingly, the low resistance p.sup.++ type pad layer can be easily formed. The p.sup.++ type pad layer serves as a low resistance path for allowing the holes flowing into the region under the pad region of the insulated gate bipolar transistor to escape to the source electrode, whereby occurrence of the latch up and increase in the turn-off time due to the minority carriers concentrating into the border portion cell located adjacent to the pad region can be prevented.
摘要翻译： p型衬垫阱层形成在栅极焊盘下方的n型漏极层的表面处，并且其表面设置有具有较低电阻率的p ++型焊盘层。 p ++型垫层通过接触孔与源电极连接。由于向每个单元提供栅极电位的栅极电极具有沿着焊盘区域和单元区域之间的边界布置的梳齿形式的延伸的图案，所以在焊盘下面基本上不存在栅电极。因此，在形成栅极电极之后，可以在形成p ++型接触层的同时进行在焊盘区域下方的阱层的整个表面的杂质的引入，因此能够容易地形成低电阻p ++型焊盘层。 p ++型衬垫层用作低电阻路径，用于允许流入绝缘栅双极晶体管的焊盘区域下方的空穴逸出到源电极，由此发生闭锁并增加关断时间由于可以防止集中在位于焊盘区域附近的边界部分单元的少数载流子。

68. 发明授权

US08331779B2 Optical signal processing apparatus 有权
标题翻译：光信号处理装置
公开(公告)号：US08331779B2
公开(公告)日：2012-12-11
申请号：US12659270
申请日：2010-03-02
申请人： Hiroki Ooi , Akira Miura , Tsuyoshi Yamamoto , Naoki Hashimoto
发明人： Hiroki Ooi , Akira Miura , Tsuyoshi Yamamoto , Naoki Hashimoto
IPC分类号： H04J14/00
CPC分类号： G02B6/29313 , G02B6/2931 , G02B6/29383 , G02B6/3512 , G02B6/356 , G02B26/0833 , H04J14/0204 , H04J14/0208 , H04J14/0212 , H04J14/0213
摘要： An OADM in a wavelength division multiplexing transmission system includes a wavelength selection switch that selects a predetermined wavelength from a multiple optical signal obtained by multiplexing a phase modulated signal and an intensity modulated signal and outputs the selected wavelength signal to a predetermined output port. The wavelength selection switch has a different delay for each wavelength of the multiple optical signal. For example, the wavelength selection switch includes a mirror array. Optical paths from the surfaces of mirrors arranged on the mirror array to the diffraction grating are different in the case of adjacent mirrors.
摘要翻译：波分复用传输系统中的OADM包括波长选择开关，其从通过复用相位调制信号和强度调制信号获得的多个光信号中选择预定波长，并将所选择的波长信号输出到预定输出端口。波长选择开关对于多个光信号的每个波长具有不同的延迟。例如，波长选择开关包括反射镜阵列。在相邻反射镜的情况下，从反射镜阵列上布置在反射镜阵列上的反射镜的表面的光路不同。

69. 发明授权

US08093581B2 Optical semiconductor device and method for manufacturing the same 有权
公开(公告)号：US08093581B2
公开(公告)日：2012-01-10
申请号：US12222915
申请日：2008-08-19
申请人： Kan Takada , Tsuyoshi Yamamoto
发明人： Kan Takada , Tsuyoshi Yamamoto
IPC分类号： H01L31/0232
CPC分类号： H01S5/343 , B82Y20/00
摘要： There is provided an optical semiconductor device having a first optical semiconductor element including an InP substrate, a lower cladding layer formed on the InP substrate, a lower optical guide layer which is formed on the lower cladding layer and is composed of AlGaInAs, an active layer which is formed on the lower optical guide layer and has a multiple quantum well structure where a well layer and a barrier layer that is formed of AlGaInAs are alternately stacked, an upper optical guide layer which is formed on the active layer and is composed of InGaAsP, and an upper cladding layer formed on the upper optical guide layer.

70. 发明授权

US08085411B2 Data processing apparatus, print control method, computer-readable storage medium, and program stored therein 有权
标题翻译：数据处理装置，打印控制方法，计算机可读存储介质和存储在其中的程序
公开(公告)号：US08085411B2
公开(公告)日：2011-12-27
申请号：US10910285
申请日：2004-08-04
申请人： Hiroshi Kai , Masakazu Nomoto , Tsuyoshi Yamamoto , Hideo Natori , Hideki Honda
发明人： Hiroshi Kai , Masakazu Nomoto , Tsuyoshi Yamamoto , Hideo Natori , Hideki Honda
IPC分类号： G06K15/00
CPC分类号： B41J11/009 , G06K15/021
摘要： It is necessary to avoid performing printing which brings about a poor printing result due to a mismatch between a medium fed by a printer and a set medium. For arbitrary paper, a paper type determining process unit 612 determines according to the information plural times detected with different timing during the process on the print data whether or not a mismatch occurred between the type of paper set on a printer and paper set by a print setting process unit 611, and the generation and output of print data by a print data generating process unit 618 is correctly controlled.
摘要翻译：有必要避免执行由于由打印机供给的介质和设定介质之间的不匹配而导致打印结果不良的打印。对于任意纸张，纸张类型确定处理单元612根据在打印数据的处理期间用不同的定时检测到的多次的信息确定在打印机上设置的纸张类型和通过打印设置的纸张之间是否发生不匹配设定处理单元611以及打印数据生成处理单元618的打印数据的生成和输出被正确地控制。

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