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    • 61. 发明申请
    • Monitoring Method, Circuit, and System
    • 监控方法,电路和系统
    • US20100014203A1
    • 2010-01-21
    • US12363095
    • 2009-01-30
    • Ross E. TeggatzWayne T. ChenBrett Smith
    • Ross E. TeggatzWayne T. ChenBrett Smith
    • G01R19/00H02H3/24H02H3/20
    • H02H3/207G01R19/16542G01R31/3658H02H7/18Y10T307/826Y10T307/832Y10T307/858Y10T307/865
    • Systems, circuits, and methods are described for providing efficient, monitoring capabilities for providing output reactive to monitored conditions. According to the disclosed methods, steps are included for providing a floating gate monitoring circuit in association with a monitored circuit and programming the floating gate to a selected charge level. The programmed floating gate charge level is then compared with a signal level in a monitored circuit. In an additional step, selected comparison criteria are used for selectably activating output. Exemplary embodiments of methods and associated circuits and systems employing the methods are also disclosed, in which protection for a monitored circuit is provided in the event of undervoltage, undercurrent, overvoltage, or undervoltage. Configurations of preferred embodiments of circuits, systems, and methods using the principles of the invention are disclosed in which ultra-low power is consumed by operation in an “ON” state, and little or no significant power is consumed when operating in an “OFF” state.
    • 描述了系统,电路和方法,用于提供有效的监控功能,以提供对受监视条件的反应。 根据所公开的方法,包括用于提供与被监视电路相关联的浮动栅极监视电路并将浮动栅极编程为所选择的电荷电平的步骤。 然后将编程的浮置栅极电荷电平与被监测电路中的信号电平进行比较。 在附加步骤中,选择的比较标准用于可选择地激活输出。 还公开了采用这些方法的方法和相关电路和系统的示例性实施例,其中在欠电压,欠电流,过电压或欠电压的情况下提供对被监控电路的保护。 公开了使用本发明的原理的电路,系统和方法的优选实施例的配置,其中超低功耗在“接通”状态下操作消耗,并且当以“关” “状态。
    • 62. 发明授权
    • System and method of regulating the distribution of power throughout a system through the use of uni-directional and bi-directional switches
    • 通过使用单向和双向开关来调节整个系统的功率分配的系统和方法
    • US06678829B1
    • 2004-01-13
    • US09596451
    • 2000-06-19
    • Ross E. TeggatzDavid J. BaldwinSanmukh M. PatelJuan F. Alvarez
    • Ross E. TeggatzDavid J. BaldwinSanmukh M. PatelJuan F. Alvarez
    • G06F128
    • G06F1/266G06F1/26
    • An integrated solution to power management and distribution on a power bus, such as needed for an IEEE 1394 compliant expansion board. The integrated circuit includes a uni-directional switch on the input and one or more bi-directional switches on one or more outputs. Current can flow from the system power supply to any connected peripherals via the uni-directional switch and bi-directional switches, or can flow from the peripheral having the highest voltage power supply to the other peripherals via the bi-directional switches, but current will not flow back to the main system because of the unidirectional switch connected to the system power supply. Over-current conditions are quickly detected and the bi-directional switch is opened to prevent damage or over-heating. The switches are preferably fabricated as power FETs using NMOS technology. Several integrated circuits can be cascaded together to accommodate multiple peripherals.
    • 电源总线上的电源管理和分配的集成解决方案,如IEEE 1394兼容扩展板所需。 集成电路包括输入上的单向开关和一个或多个输出上的一个或多个双向开关。 电流可以通过单向开关和双向开关从系统电源流向任何连接的外围设备,或者可以通过双向开关从具有最高电压电源的外围设备流向其他外设,但是当前将 由于单向开关连接到系统电源,不会流回主系统。 快速检测过电流状态,并打开双向开关以防止损坏或过热。 这些开关优选地使用NMOS技术制造为功率FET。 几个集成电路可以级联在一起以适应多个外围设备。
    • 63. 发明授权
    • Bootstrap technique for a multiple mode switching regulator
    • 多模开关稳压器的自举技术
    • US06650100B1
    • 2003-11-18
    • US10233811
    • 2002-09-03
    • James A. KohoutDavid J. BaldwinRoss E. Teggatz
    • James A. KohoutDavid J. BaldwinRoss E. Teggatz
    • G05F1563
    • H02M3/1582G05F1/613H02M2001/0006H02M2001/009H03K17/063
    • A multiple mode switching regulator with a bootstrap technique includes an inductor 20; a high side input switch 22 coupled to a first end of the inductor 20; a low side input switch 24 coupled to the first end of the inductor 20; a high side driver 34 coupled to a control node of the high side input switch 22; a low side driver 36 coupled to a control node of the low side input switch 24; a high side output switch 26 coupled to a second end of the inductor 20; a low side output switch 28 coupled to the second end of the inductor 20; a first bootstrap capacitor 30 coupled between the first end of the inductor 20 and a voltage supply node of the high side driver 34; a second bootstrap capacitor 32 coupled between the second end of the inductor 20 and a voltage supply node of the low side driver 36; and a first diode 40 coupled between the voltage supply node of the high side driver 34 and the voltage supply node of the low side driver 36. The two bootstrap capacitors 30 and 32 are employed on both sides of inductor 20 to provide gate voltage to high side input switch 22 through high side driver 34 in any mode of operation. This allows the regulator to work in three modes of operation without different external components or configurations depending on the mode.
    • 具有自举技术的多模开关调节器包括电感器20; 耦合到电感器20的第一端的高侧输入开关22; 耦合到电感器20的第一端的低侧输入开关24; 耦合到高侧输入开关22的控制节点的高侧驱动器34; 耦合到低侧输入开关24的控制节点的低侧驱动器36; 耦合到电感器20的第二端的高侧输出开关26; 耦合到电感器20的第二端的低侧输出开关28; 耦合在电感器20的第一端和高侧驱动器34的电压供应节点之间的第一自举电容器30; 耦合在电感器20的第二端和低侧驱动器36的电压供应节点之间的第二自举电容器32; 以及耦合在高侧驱动器34的电压供应节点和低侧驱动器36的电压供应节点之间的第一二极管40.两个自举电容器30和32用于电感器20的两侧以将栅极电压提供到高电平 在任何操作模式下通过高侧驱动器34进行侧面输入开关22。 这允许调节器在三种工作模式下工作,而不需要不同的外部组件或配置,这取决于模式。
    • 64. 发明授权
    • Driver system and method for a field emission device
    • 用于场发射装置的驱动器系统和方法
    • US06300922B1
    • 2001-10-09
    • US09224978
    • 1999-01-04
    • Ross E. Teggatz
    • Ross E. Teggatz
    • G09G322
    • G09G3/22G09G3/2014G09G2330/021
    • A field emission device (10) for reducing the power dissipation of an array (14) includes video controller (12) coupled to array (14) by memory (13), column drivers (16), row drivers (20), and anode power supply (22). Column drivers (16) includes PWM circuit (17) coupled to signal conditioner (18). Signal conditioner (18) receives input digital signal (24) from PWM circuit (17) and generates output digital signal (26) that reduces the frequency of state transitions of signal (24) while maintaining the same duty cycle as that of signal (24). This reduces the power dissipation of parasitic capacitances (36) associated with array (14) pursuant to the equation P=½CV2f.
    • 用于减少阵列(14)的功率消耗的场致发射装置(10)包括由存储器(13),列驱动器(16),行驱动器(20)和阳极(14)耦合到阵列(14)的视频控制器(12) 电源(22)。 列驱动器(16)包括耦合到信号调节器(18)的PWM电路(17)。 信号调节器(18)从PWM电路(17)接收输入数字信号(24),并产生输出数字信号(26),其在保持与信号(24)相同的占空比的同时降低信号(24)的状态转换频率 )。 这降低了与阵列(14)相关联的寄生电容(36)根据等式P =½CV2f的功耗。
    • 65. 发明授权
    • Connection of active circuitry via wire bonding procedure
    • 通过接线方法连接有源电路
    • US5892283A
    • 1999-04-06
    • US991118
    • 1997-12-16
    • David John BaldwinRoss E. Teggatz
    • David John BaldwinRoss E. Teggatz
    • H01L21/66H01L21/60H01L23/485H01L23/58H01L23/48H01L23/52H01L29/40
    • H01L24/05H01L22/32H01L2224/05554H01L2224/05599H01L2224/05624H01L2224/05647H01L2224/05666H01L2224/05684H01L2924/01004H01L2924/01005H01L2924/01006H01L2924/01013H01L2924/01014H01L2924/01029H01L2924/05042H01L2924/12035H01L2924/14
    • A method of fabricating a bond and the bond. The process includes providing a lower level (M1,13, 15) of electrically conductive metal disposed on a substrate having a pair of spaced apart sections. An electrically insulating layer (11) is then disposed over the lower level and vias (23) are formed in the electrically insulating layer, individual ones of the vias extending to one of the spaced apart section of the lower level. An upper level of electrically conductive metal (M2, 17, 19) is disposed on the electrically insulating layer, the upper level having a pair of spaced apart sections, each coupled to one of the sections of the lower level through a via. One of the pair of spaced apart sections of the lower level is preferably essentially U-shaped (13) and the other section (15) of the lower level is essentially rectangular shaped and extends into the open end of the "U". One of the pair of spaced apart section of the upper level is essentially rectangular (17) with a rectangular aperture at its central region and the other section of the upper level (19) is essentially rectangular and disposed within the rectangular aperture. A bond (23) is formed completely enclosing the spaced apart sections of the upper level.
    • 一种制造键和键的方法。 该方法包括提供设置在具有一对间隔开的部分的基底上的较低级别的导电金属(M1,13,15)。 然后将电绝缘层(11)设置在下层上,并且通孔(23)形成在电绝缘层中,各个通孔延伸到下层的间隔开的部分之一。 导电金属(M2,17,19)的上层设置在电绝缘层上,上层具有一对间隔开的部分,每个部分通过通孔连接到下层的一个部分。 较低级别的一对间隔开的部分之一优选地基本上为U形(13),并且下层的另一部分(15)基本上为矩形并且延伸到“U”的开口端。 上层的一对间隔开的部分基本上是矩形(17),在其中心区域具有矩形孔,而上层(19)的另一部分基本上是矩形的并且设置在矩形孔内。 形成完全包围上层间隔开的部分的粘结(23)。