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61. 发明申请

US20100208527A1 SELECTIVE APPLICATION OF WORD LINE BIAS TO MINIMIZE FRINGE EFFECTS IN ELECTROMAGNETIC FIELDS DURING ERASE OF NONVOLATILE MEMORY 有权
标题翻译：选择性应用字线偏移以最小化非易失性存储器中的电磁场中的影响
公开(公告)号：US20100208527A1
公开(公告)日：2010-08-19
申请号：US12773232
申请日：2010-05-04
申请人： Gulzar Ahmed Kathawala , Wei Zheng , Zhizheng Liu , Sung-Yong Chung , Timothy Thurgate , Kuo-Tung Chang , Sheung-Hee Park , Gabrielle Wing Han Leung
发明人： Gulzar Ahmed Kathawala , Wei Zheng , Zhizheng Liu , Sung-Yong Chung , Timothy Thurgate , Kuo-Tung Chang , Sheung-Hee Park , Gabrielle Wing Han Leung
IPC分类号： G11C16/04
CPC分类号： G11C16/3418
摘要： A memory device comprising an optimization component that facilitates erasing memory cells in a substantially homogeneous electromagnetic field and methods that facilitate erasing memory cells in a substantially homogeneous electromagnetic field are presented. The optimization component facilitates selecting a subset of memory cells to be erased at the same time, such that a memory cell in the subset of memory cells has two neighbor memory cells adjacent thereto that are in the subset of memory, or one neighbor memory cell adjacent thereto when the memory cell is an end-row memory cell. The optimization component facilitates performing a Fowler-Nordheim channel erase to erase the subset of memory cells, and a predetermined voltage potential associated with an erase command is applied to each cell of the subset of memory cells to facilitate reducing fringing effect associated with the electromagnetic fields applied to the cells during the erase.
摘要翻译：提供了一种存储器件，其包括便于擦除基本上均匀的电磁场中的存储器单元的优化部件，以及便于在基本均匀的电磁场中擦除存储器单元的方法。优化组件有助于同时选择要擦除的存储器单元的子集，使得存储器单元子集中的存储单元具有与存储单元相邻的两个相邻存储器单元，其位于存储器的子集中，或者相邻的一个相邻存储器单元当存储器单元是端行存储单元时。优化组件有助于执行Fowler-Nordheim信道擦除来擦除存储器单元的子集，并且与擦除命令相关联的预定电压电位被施加到存储器单元子集的每个单元，以便于减少与电磁场相关联的边缘效应在擦除期间应用于细胞。

62. 发明授权

US07746698B2 Programming in memory devices using source bitline voltage bias 有权
标题翻译：使用源位线电压偏置对存储器件进行编程
公开(公告)号：US07746698B2
公开(公告)日：2010-06-29
申请号：US11956032
申请日：2007-12-13
申请人： Zhizheng Liu , An Chen , Wei Zheng , Kuo-Tung Chang , Sung-Yong Chung , Gulzar Ahmed Kathawala , Ashot Melik-Martirosian
发明人： Zhizheng Liu , An Chen , Wei Zheng , Kuo-Tung Chang , Sung-Yong Chung , Gulzar Ahmed Kathawala , Ashot Melik-Martirosian
IPC分类号： G11C16/04
CPC分类号： G11C16/0491 , G11C16/12
摘要： Systems and methods that facilitate improved programming memory cells in a nonvolatile memory (e.g., flash memory) are presented. An optimized voltage component can facilitate supplying respective voltages to a source, drain, and gate associated with a memory cell during operations, such as programming operations. The optimized voltage component can facilitate supplying a predetermined source bitline voltage to a memory cell during programming of the cell to facilitate reducing leakage currents associated with the bitlines, which can improve programming of the memory cell, and to facilitate reducing the programming current, which can result in power efficient programming and improved programming speed.
摘要翻译：提出了有助于改进非易失性存储器（例如闪速存储器）中的编程存储器单元的系统和方法。优化的电压分量可以有助于在诸如编程操作的操作期间向与存储器单元相关联的源极，漏极和栅极提供相应的电压。优化的电压分量可以有助于在单元的编程期间向存储器单元提供预定的源位线电压，以便于减少与位线相关联的泄漏电流，这可以改善存储器单元的编程，并且有助于减少编程电流，导致功率有效的编程和改进的编程速度。

63. 发明授权

US07619932B2 Algorithm for charge loss reduction and Vt distribution improvement 有权
标题翻译：电荷损失减少和Vt分布改进的算法
公开(公告)号：US07619932B2
公开(公告)日：2009-11-17
申请号：US11959122
申请日：2007-12-18
申请人： Gwyn Robert Jones , Edward Franklin Runnion , Zhizheng Liu , Mark William Randolph
发明人： Gwyn Robert Jones , Edward Franklin Runnion , Zhizheng Liu , Mark William Randolph
IPC分类号： G11C11/34
CPC分类号： G11C16/3436 , G11C11/5671 , G11C16/0475 , G11C16/0491 , G11C2211/5621
摘要： Methods and systems for accurately programming or erasing one or more memory cells on a selected wordline of a memory device are provided. In one embodiment, the memory device comprises a memory array, a threshold voltage measuring component configured to measure a threshold voltage of each memory cell on the selected wordline of the memory array, and an average threshold voltage determining component configured to determine an average threshold voltage result uniquely associated with the selected wordline, based on the measured threshold voltages. The memory device is configured to program one or more of the memory cells to a predefined program level relative to the determined average threshold voltage, or to erase memory cells of the selected wordline to the determined average threshold voltage. The method is particularly useful for multi-level flash memory cells to reduce charge loss while improving data reliability and Vt distributions of the programmed element states.
摘要翻译：提供了用于在存储器件的选定字线上精确编程或擦除一个或多个存储器单元的方法和系统。在一个实施例中，存储器件包括存储器阵列，阈值电压测量部件，被配置为测量存储器阵列的选定字线上的每个存储器单元的阈值电压，以及平均阈值电压确定部件，被配置为确定平均阈值电压结果与所选择的字线唯一地相关联，基于所测量的阈值电压。存储器装置被配置为相对于所确定的平均阈值电压将一个或多个存储器单元编程到预定程序级，或者将所选字线的存储单元擦除到所确定的平均阈值电压。该方法对于多级闪存单元特别有用，以减少电荷损耗，同时提高编程元件状态的数据可靠性和Vt分布。

64. 发明申请

US20090147589A1 Selective Application Of Word Line Bias To Minimize Fringe Effects In Electromagnetic Fields During Erase Of Nonvolatile Memory 有权
标题翻译：在非易失性存储器擦除期间，字线偏置的选择性应用以最小化电磁场中的边缘效应
公开(公告)号：US20090147589A1
公开(公告)日：2009-06-11
申请号：US11953689
申请日：2007-12-10
申请人： Gulzar Ahmed Kathawala , Wei Zheng , Zhizheng Liu , Sung-Yong Chung , Timothy Thurgate , Kuo-Tung Chang , Sheung-Hee Park , Gabrielle Wing Han Leung
发明人： Gulzar Ahmed Kathawala , Wei Zheng , Zhizheng Liu , Sung-Yong Chung , Timothy Thurgate , Kuo-Tung Chang , Sheung-Hee Park , Gabrielle Wing Han Leung
IPC分类号： G11C16/18
CPC分类号： G11C16/3418
摘要： A memory device comprising an optimization component that facilitates erasing memory cells in a substantially homogeneous electromagnetic field and methods that facilitate erasing memory cells in a substantially homogeneous electromagnetic field are presented. The optimization component facilitates selecting a subset of memory cells to be erased at the same time, such that a memory cell in the subset of memory cells has two neighbor memory cells adjacent thereto that are in the subset of memory, or one neighbor memory cell adjacent thereto when the memory cell is an end-row memory cell. The optimization component facilitates performing a Fowler-Nordheim channel erase to erase the subset of memory cells, and a predetermined voltage potential associated with an erase command is applied to each cell of the subset of memory cells to facilitate reducing fringing effect associated with the electromagnetic fields applied to the cells during the erase.
摘要翻译：提供了一种存储器件，其包括便于擦除基本上均匀的电磁场中的存储器单元的优化部件，以及便于在基本均匀的电磁场中擦除存储器单元的方法。优化组件有助于同时选择要擦除的存储器单元的子集，使得存储器单元子集中的存储单元具有与存储单元相邻的两个相邻存储器单元，其位于存储器的子集中，或者相邻的一个相邻存储器单元当存储器单元是端行存储单元时。优化组件有助于执行Fowler-Nordheim信道擦除来擦除存储器单元的子集，并且与擦除命令相关联的预定电压电位被施加到存储器单元子集的每个单元，以便于减少与电磁场相关联的边缘效应在擦除期间应用于细胞。

65. 发明授权

US07262095B1 System and method for reducing process-induced charging 有权
标题翻译：减少过程引发充电的系统和方法
公开(公告)号：US07262095B1
公开(公告)日：2007-08-28
申请号：US11146126
申请日：2005-06-07
申请人： Ashot Melik Martirosian , Zhizheng Liu , Mark Randolph
发明人： Ashot Melik Martirosian , Zhizheng Liu , Mark Randolph
IPC分类号： H01L21/336
CPC分类号： H01L21/76838 , H01L21/76816 , H01L27/11521
摘要： A semiconductor device includes a substrate, a memory cell formed on the substrate, and a contact to the substrate. The contact is formed in an area away from the memory cell and functions to raise the potential of the substrate.
摘要翻译：半导体器件包括衬底，形成在衬底上的存储单元和与衬底的接触。接触形成在远离存储单元的区域中，起到提高衬底电位的作用。

66. 发明授权

US07042767B2 Flash memory unit and method of programming a flash memory device 有权
公开(公告)号：US07042767B2
公开(公告)日：2006-05-09
申请号：US10909693
申请日：2004-08-02
申请人： Zhigang Wang , Nian Yang , Zhizheng Liu
发明人： Zhigang Wang , Nian Yang , Zhizheng Liu
IPC分类号： G11C16/04
CPC分类号： G11C16/12
摘要： Disclosed are a flash memory unit and a method of programming a flash memory device. The method of programming can include applying respective programming voltages to a control gate and a drain of the memory device. A source bias potential can be applied to a source of the memory device. The application of the source bias potential can be controlled with the selective application of one of the programming voltages to a source bias switching device.

67. 发明授权

US07042766B1 Method of programming a flash memory device using multilevel charge storage 有权
标题翻译：使用多电平电荷存储来编程闪存器件的方法
公开(公告)号：US07042766B1
公开(公告)日：2006-05-09
申请号：US10896651
申请日：2004-07-22
申请人： Zhigang Wang , Nian Yang , Zhizheng Liu
发明人： Zhigang Wang , Nian Yang , Zhizheng Liu
IPC分类号： G11C16/06
CPC分类号： G11C11/5628 , G11C16/12 , G11C16/3468 , G11C2211/5621
摘要： Disclosed is a method of programming a flash memory device to store an amount of charge corresponding to one of a plurality of charged program states. The method can include pulsing the memory device with program voltages including at least a gate voltage. If the gate voltage is greater than or equal to a predetermined minimum threshold voltage for the one of the plurality of charged program states, an amount of charge stored by the memory device can be verified. Otherwise the memory device can be repulsed. This procedure can be carried out until verifying is conducted and the verifying indicates that the amount of charge stored by the memory device corresponds to the one of the plurality of charged program states.
摘要翻译：公开了一种编程闪速存储器件以存储对应于多个充电程序状态之一的电荷量的方法。该方法可以包括使具有至少包括栅极电压的编程电压脉冲存储器件。如果栅极电压大于或等于多个充电程序状态之一的预定最小阈值电压，则可以验证由存储器件存储的电荷量。否则可能会使存储器件发生故障。可以执行该过程，直到进行验证，并且验证指示存储器件存储的电荷量对应于多个充电程序状态中的一个。

68. 发明申请

US20100327773A1 METHOD AND SYSTEM FOR DIMMING AN OFFLINE LED DRIVER 有权
标题翻译：用于调整离线LED驱动器的方法和系统
公开(公告)号：US20100327773A1
公开(公告)日：2010-12-30
申请号：US12495170
申请日：2009-06-30
申请人： Wei Gu , Zhizheng Liu
发明人： Wei Gu , Zhizheng Liu
IPC分类号： H05B37/02
CPC分类号： H05B33/0815 , Y02B20/348
摘要： An apparatus and method for dimming a light emitting diode (LED) driver. The apparatus includes a triode alternating current (TRIAC) dimmer and an LED driver receiving an input voltage from an output of the TRIAC dimmer so that the state of the LED driver is controlled by the TRIAC dimmer. The LED driver includes an active damping circuit configured for damping, upon detecting a rising edge of a bridge rectified input voltage, resonance caused by the TRIAC dimmer and the LED driver for a fixed period of time.
摘要翻译：一种用于调光发光二极管（LED）驱动器的装置和方法。该装置包括三极管交流电（TRIAC）调光器和从TRIAC调光器的输出接收输入电压的LED驱动器，使得LED驱动器的状态由TRIAC调光器控制。 LED驱动器包括主动阻尼电路，其被配置用于在检测到桥式整流输入电压的上升沿时，在固定的时间段内阻抗由TRIAC调光器和LED驱动器引起的谐振。

69. 发明申请

US20090154246A1 PROGRAMMING IN MEMORY DEVICES USING SOURCE BITLINE VOLTAGE BIAS 有权
标题翻译：使用源电压偏置在存储器件中编程
公开(公告)号：US20090154246A1
公开(公告)日：2009-06-18
申请号：US11956032
申请日：2007-12-13
申请人： Zhizheng Liu , An Chen , Wei Zheng , Kuo-Tung Chang , Sung-Yong Chung , Gulzar Ahmed Kathawala , Ashot Melik-Martirosian
发明人： Zhizheng Liu , An Chen , Wei Zheng , Kuo-Tung Chang , Sung-Yong Chung , Gulzar Ahmed Kathawala , Ashot Melik-Martirosian
IPC分类号： G11C16/04
CPC分类号： G11C16/0491 , G11C16/12
摘要： Systems and methods that facilitate improved programming memory cells in a nonvolatile memory (e.g., flash memory) are presented. An optimized voltage component can facilitate supplying respective voltages to a source, drain, and gate associated with a memory cell during operations, such as programming operations. The optimized voltage component can facilitate supplying a predetermined source bitline voltage to a memory cell during programming of the cell to facilitate reducing leakage currents associated with the bitlines, which can improve programming of the memory cell, and to facilitate reducing the programming current, which can result in power efficient programming and improved programming speed.
摘要翻译：提出了有助于改进非易失性存储器（例如闪速存储器）中的编程存储器单元的系统和方法。优化的电压分量可以有助于在诸如编程操作的操作期间向与存储器单元相关联的源极，漏极和栅极提供相应的电压。优化的电压分量可以有助于在单元的编程期间向存储器单元提供预定的源位线电压，以便于减少与位线相关联的泄漏电流，这可以改善存储器单元的编程，并且有助于减少编程电流，导致功率有效的编程和改进的编程速度。

70. 发明授权

US07394702B2 Methods for erasing and programming memory devices 有权
标题翻译：擦除和编程存储器件的方法
公开(公告)号：US07394702B2
公开(公告)日：2008-07-01
申请号：US11399130
申请日：2006-04-05
申请人： Meng Ding , Zhizheng Liu , Wei Zheng
发明人： Meng Ding , Zhizheng Liu , Wei Zheng
IPC分类号： G11C11/34
CPC分类号： H01L29/7923 , G11C16/0475 , H01L21/28282 , H01L27/115 , H01L27/11568 , H01L29/42332 , H01L29/42348 , H01L29/7887
摘要： A dual-bit memory device includes a first charge storage region spaced apart from a second charge storage region by an isolation region. Techniques for erasing a memory can be provided in which electrons can be injected into the charge storage regions to erase the charge storage regions. Other techniques for programming a memory can be provided in which holes can be injected into at least one of the charge storage regions to program the charge storage regions.
摘要翻译：双位存储器件包括通过隔离区域与第二电荷存储区域间隔开的第一电荷存储区域。可以提供用于擦除存储器的技术，其中电子可以被注入到电荷存储区域中以擦除电荷存储区域。可以提供用于编程存储器的其它技术，其中可以将空穴注入到至少一个电荷存储区域中以对电荷存储区域进行编程。

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