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61. 发明授权

US06221744B1 Method for forming a gate 失效
标题翻译：栅极形成方法
公开(公告)号：US06221744B1
公开(公告)日：2001-04-24
申请号：US09234618
申请日：1999-01-20
申请人： Hsueh-Hao Shih , Juan-Yuan Wu , Tri-Rung Yew
发明人： Hsueh-Hao Shih , Juan-Yuan Wu , Tri-Rung Yew
IPC分类号： H02L21305
CPC分类号： H01L21/28035 , H01L29/4925
摘要： A method for forming a gate on a substrate for manufacturing semiconductor devices is described. The present method comprises the step of providing a gate oxide layer on top of a substrate. A polysilicon layer is overlaid on the gate oxide layer and then, a amorphous silicon layer is formed thereon. The stack of amorphous and polysilicon layers is defined to form a gate structure on gate oxide layer. Next, a thermal treatment is performed on the gate structure.
摘要翻译：描述了一种用于在用于制造半导体器件的衬底上形成栅极的方法。本方法包括在衬底的顶部上提供栅氧化层的步骤。在栅氧化层上重叠多晶硅层，然后在其上形成非晶硅层。限定非晶和多晶硅层的堆叠以在栅极氧化物层上形成栅极结构。接下来，对栅极结构进行热处理。

62. 发明授权

US06180492B2 Method of forming a liner for shallow trench isolation 有权
标题翻译：浅沟槽隔离衬垫的形成方法
公开(公告)号：US06180492B2
公开(公告)日：2001-01-30
申请号：US09237298
申请日：1999-01-25
申请人： Hsueh-Hao Shih , Tri-Rung Yew , Water Lur , Gwo-Shii Yang
发明人： Hsueh-Hao Shih , Tri-Rung Yew , Water Lur , Gwo-Shii Yang
IPC分类号： H01L2176
CPC分类号： H01L21/76224
摘要： An improved method for forming shallow trench isolation structure is described. The present method comprises the steps of providing a pad oxide layer and a mask layer on a semiconductor substrate and forming a trench structure therein. Next, a liner oxide layer is formed on the surface of the trench structure in the semiconductor substrate and is extensively formed on the side surface of the mask layer exposed therein and the top surface of the mask layer by wet oxidation. A dielectric material is deposited on the liner oxide layer and fills the trench structure. The dielectric material layer is planarized. The mask layer and the pad oxide layer are then removed to form the isolation structures. The method for forming the shallow trench structures on a semiconductor structure in accordance with the present invention can eliminate the kink effect that occurs in the conventional method.
摘要翻译：描述了一种用于形成浅沟槽隔离结构的改进方法。本方法包括以下步骤：在半导体衬底上提供衬垫氧化物层和掩模层，并在其中形成沟槽结构。接下来，在半导体衬底中的沟槽结构的表面上形成衬垫氧化物层，并且通过湿氧化在其中暴露于其中的掩模层的侧表面和掩模层的顶表面上广泛地形成衬里氧化物层。电介质材料沉积在衬垫氧化物层上并填充沟槽结构。介电材料层被平坦化。然后去除掩模层和焊盘氧化物层以形成隔离结构。根据本发明的在半导体结构上形成浅沟槽结构的方法可以消除在常规方法中发生的扭结效应。

63. 发明授权

US6060379A Method of forming dual damascene structure 失效
公开(公告)号：US6060379A
公开(公告)日：2000-05-09
申请号：US123342
申请日：1998-07-28
申请人： Yimin Huang , Tri-Rung Yew
发明人： Yimin Huang , Tri-Rung Yew
IPC分类号： H01L21/768 , H01L21/4763
CPC分类号： H01L21/76829 , H01L21/76807
摘要： A method of forming a dual damascene structure comprises the steps of providing a substrate having a first conductive layer formed thereon, and then sequentially forming a first dielectric layer, an anti-reflection layer and a second dielectric layer over the substrate. Next, the first dielectric layer, the anti-reflection layer and the second dielectric layer are patterned to form a first opening that exposes the conductive layer. Thereafter, the second dielectric layer is patterned to form a trench (or second opening) in a position above the first conductive layer. The trench and the first opening together form an opening of the dual damascene structure. Finally, a second conductive material is deposited into the opening and the trench to form conductive lines and the dual damascene structures.

64. 发明授权

US6001414A Dual damascene processing method 失效
标题翻译：双镶嵌加工方法
公开(公告)号：US6001414A
公开(公告)日：1999-12-14
申请号：US991193
申请日：1997-12-16
申请人： Yimin Huang , Hsiao-Pang Chou , Tri-Rung Yew
发明人： Yimin Huang , Hsiao-Pang Chou , Tri-Rung Yew
IPC分类号： H01L21/768 , B05D5/12
CPC分类号： H01L21/76829 , H01L21/76804
摘要： A dual damascene processing method comprising the steps depositing sequentially a first oxide layer, a SRO layer and a second oxide layer over a substrate. Then, photolithographic and etching operations are conducted to form a via that links up with a desired wire-connecting region above the substrate. Next, another photolithographic and etching operations are conducted to form interconnect trench lines followed by the deposition of metal into the via and trench. Finally, the surface is polished with a chemical-mechanical polishing operation to remove the unwanted metal on the surface. The invention is capable of controlling the depth of trench and obtaining a smoother trench bottom for the metal lines. Furthermore, the separation of via and trench etching steps makes the control of the final etch profile much easier, thereby able to get an optimal result.
摘要翻译：一种双镶嵌加工方法，包括以下步骤：在基材上依次沉积第一氧化物层，SRO层和第二氧化物层。然后，进行光刻和蚀刻操作以形成与基板上方的期望的线连接区域连接的通孔。接下来，进行另一光刻和蚀刻操作以形成互连沟槽线，随后将金属沉积到通孔和沟槽中。最后，通过化学机械抛光操作抛光表面以除去表面上不需要的金属。本发明能够控制沟槽的深度并为金属线获得更平滑的沟槽底部。此外，通孔和沟槽蚀刻步骤的分离使得最终蚀刻轮廓的控制更容易，从而能够获得最佳结果。

65. 发明授权

US5990015A Dual damascence process 失效
标题翻译：双重大马士革过程
公开(公告)号：US5990015A
公开(公告)日：1999-11-23
申请号：US41567
申请日：1998-03-12
申请人： Tony Lin , Yimin Huang , Tri-Rung Yew
发明人： Tony Lin , Yimin Huang , Tri-Rung Yew
IPC分类号： H01L21/768 , H01L21/44
CPC分类号： H01L21/76813 , H01L21/76807
摘要： A dual damascene process can be used to form an interconnect. A first dielectric layer is formed on a semiconductor substrate having a device layer formed thereon. A stop layer is formed on the first dielectric layer and a second dielectric layer is formed on the stop layer. A hard mask layer is formed and patterned on the second dielectric layer so that an opening is formed to expose the second dielectric layer therewithin. The second dielectric layer, the stop layer and a part of the first dielectric layer are etched within the opening by photolithography and etching, so that a contact window is formed. Using the hard mask layer as a hard mask, an etching is performed so that a metal trench penetrating through the second dielectric layer is formed, and the device layer within the contact window is exposed.
摘要翻译：可以使用双镶嵌工艺来形成互连。在其上形成有器件层的半导体衬底上形成第一介电层。在第一电介质层上形成阻挡层，在停止层上形成第二电介质层。在第二电介质层上形成并图案化硬掩模层，从而形成开口以在其中露出第二介电层。通过光刻和蚀刻在开口内蚀刻第二介电层，停止层和第一介电层的一部分，从而形成接触窗。使用硬掩模层作为硬掩模，进行蚀刻，从而形成穿过第二介电层的金属沟槽，并且暴露接触窗内的器件层。

66. 发明授权

US08461037B2 Method for fabricating interconnections with carbon nanotubes 有权
标题翻译：制造与碳纳米管互连的方法
公开(公告)号：US08461037B2
公开(公告)日：2013-06-11
申请号：US13094388
申请日：2011-04-26
申请人： Hsin-wei Wu , Chung-Min Tsai , Tri-Rung Yew
发明人： Hsin-wei Wu , Chung-Min Tsai , Tri-Rung Yew
IPC分类号： H01L21/00
CPC分类号： H01L23/53276 , H01L21/76849 , H01L21/76876 , H01L21/76879 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating interconnections with carbon nanotubes of the present invention comprises the following steps: forming a dual-layer that contains a catalytic layer and an upper covering layer on the periphery of a hole connecting with a substrate; and growing carbon nanotubes on the catalytic layer with the upper covering layer covering the carbon nanotubes. The present invention grows the carbon nanotubes between the catalytic layer and the upper covering layer. The upper covering layer protects the catalytic layer from being oxidized and thus enhances the growth of the carbon nanotubes. The carbon nanotubes are respectively connected with the lower substrate and an upper conductive wire via the catalytic layer and the upper covering layer, which results in a lower contact resistance. Moreover, the upper covering layer also functions as a metal-diffusion barrier layer to prevent metal from spreading to other materials via diffusion or other approaches.
摘要翻译：本发明的制造与碳纳米管的互连的方法包括以下步骤：在与基板连接的孔的周围形成包含催化剂层和上覆盖层的双层; 并在上覆盖层覆盖碳纳米管的催化层上生长碳纳米管。本发明在催化层和上覆盖层之间生长碳纳米管。上覆盖层保护催化层不被氧化，从而增强碳纳米管的生长。碳纳米管分别通过催化层和上覆盖层与下基板和上导电线连接，导致较低的接触电阻。此外，上覆盖层还用作金属扩散阻挡层，以防止金属通过扩散或其它方法扩散到其它材料。

67. 发明申请

US20120148449A1 ELECTRIC CONDUCTIVITY-BASED BIOSENSOR 审中-公开
标题翻译：基于电导率的生物传感器
公开(公告)号：US20120148449A1
公开(公告)日：2012-06-14
申请号：US13114717
申请日：2011-05-24
申请人： Ya-Hsuan Chuang , Kuo-Liang Liu , Tri-Rung Yew
发明人： Ya-Hsuan Chuang , Kuo-Liang Liu , Tri-Rung Yew
IPC分类号： G01N27/00
CPC分类号： G01N27/125
摘要： An electric conductivity-based biosensor electrochemically detects the concentration of tested objects via measuring impedance or capacitance variation of the tested objects. The biosensor comprises a substrate, two electric-conduction electrodes arranged on the substrate, an antibody adhesion layer arranged on a region of the substrate and a plurality of antibodies arranged on the antibody adhesion layer. The antibody adhesion layer is between the two electric-conduction electrodes. The antibodies are connected with a plurality of tested objects. The tested objects connected with the antibodies form an electric-conduction group contacting the two electric-conduction electrodes. The concentration of the tested objects can be provided via measuring impedance or capacitance between the two electric-conduction electrodes.
摘要翻译：基于电导率的生物传感器通过测量被测物体的阻抗或电容变化来电化学地检测被测物体的浓度。生物传感器包括衬底，布置在衬底上的两个导电电极，布置在衬底的区域上的抗体粘附层和布置在抗体粘附层上的多个抗体。抗体粘附层位于两个导电电极之间。抗体与多个测试对象连接。与抗体连接的测试对象形成接触两个导电电极的导电组。可以通过测量两个导电电极之间的阻抗或电容来提供被测物体的浓度。

68. 发明申请

US20120118386A1 P-TYPE TRANSPARENT CONDUCTIVE OXIDES AND SOLAR CELLS WITH P-TYPE TRANSPARENT CONDUCTIVE OXIDES 有权
标题翻译： P型透明导电氧化物和具有P型透明导电氧化物的太阳能电池
公开(公告)号：US20120118386A1
公开(公告)日：2012-05-17
申请号：US13104744
申请日：2011-05-10
申请人： Han-Yi CHEN , Chia-Hsiang Chen , Huan-Chieh Su , Kuo-Liang Liu , Tri-Rung Yew
发明人： Han-Yi CHEN , Chia-Hsiang Chen , Huan-Chieh Su , Kuo-Liang Liu , Tri-Rung Yew
IPC分类号： H01L31/02 , H01B1/08 , B82Y99/00
CPC分类号： H01B1/08 , B82Y30/00 , C01G39/02 , C01P2002/54 , C01P2004/16 , C01P2004/17 , C01P2006/40 , H01G9/2031 , H01G9/2059 , H01L31/022466 , H01L31/035227 , H01L31/03529 , H01L31/072 , H01L31/1884 , H01L51/442 , Y02E10/50
摘要： A p-type transparent conductive oxide and a solar cell containing the p-type transparent conducting oxide, wherein the p-type transparent conductive oxide includes a molybdenum trioxide doped with an element having less than six valence electrons, the element is selected from the group consisting of alkali metals, alkaline earth metals, group III elements, group IV, group V, transition elements and their combinations. Doping an element having less than six valence electron results in hole number increase, and thus increasing the hole drift velocity, and making Fermi level closer to the range of p-type materials. Hence, a p-type transparent conductive material is generated. This p-type transparent conducting oxide not only has high electron hole drift velocity, low resistivity, but also reaches a transmittance of 88% in the visible wavelength range, and therefore it is very suitable to be used in solar cells.
摘要翻译： p型透明导电氧化物和含有p型透明导电氧化物的太阳能电池，其中p型透明导电氧化物包括掺杂有少于6价电子的元素的三氧化钼，该元素选自由碱金属，碱土金属，III族元素，IV族，V族，过渡元素及其组合组成。掺杂具有小于6价电子的元素导致孔数增加，从而增加空穴漂移速度，并使费米能级更接近p型材料的范围。因此，产生p型透明导电材料。该p型透明导电氧化物不仅具有高的电子空穴漂移速度，低电阻率，而且在可见光波长范围内也达到88％的透射率，因此非常适用于太阳能电池。

69. 发明申请

US20110193065A1 Organic thin film transistor 有权
标题翻译：有机薄膜晶体管
公开(公告)号：US20110193065A1
公开(公告)日：2011-08-11
申请号：US12807620
申请日：2010-09-09
申请人： Yu-Ping Wang , Heng-Wen Ting , Chung-Min Tsai , Tri-Rung Yew
发明人： Yu-Ping Wang , Heng-Wen Ting , Chung-Min Tsai , Tri-Rung Yew
IPC分类号： H01L51/30
CPC分类号： H01L51/0053 , H01L51/0545
摘要： An organic thin film transistor includes: a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an organic active layer. The organic active layer includes an organic semiconductor compound represented by the following formula (A) as defined in the specification.
摘要翻译：有机薄膜晶体管包括：栅极，栅极绝缘膜，源电极，漏电极和有机活性层。有机活性层包括由说明书中定义的下式（A）表示的有机半导体化合物。

70. 发明授权

US07807979B2 Specimen kit and fabricating method thereof 有权
标题翻译：试样套件及其制造方法
公开(公告)号：US07807979B2
公开(公告)日：2010-10-05
申请号：US11952148
申请日：2007-12-07
申请人： Kuo-Liang Liu , Tri-Rung Yew
发明人： Kuo-Liang Liu , Tri-Rung Yew
IPC分类号： G01F23/00
CPC分类号： H01J37/20 , H01J37/26 , H01J2237/2003
摘要： A specimen kit for enclosing a specimen is described, including a first substrate, a second substrate and a sealant. The first substrate has a first observation window at which a thickness thereof is smaller than that of the other parts thereof. The second substrate has a second observation window at which a thickness thereof is smaller than that of the other parts thereof, and is disposed on the first substrate such that the second observation window is aligned to the first observation window and an interval is present between the first and the second substrates. The sealant is disposed between the first and the second substrates and surrounds the first and the second observation windows to seal a space between fringes of the first and the second substrate, thus defining a specimen cell between the first and the second substrates.
摘要翻译：描述了用于封装样本的标本试剂盒，包括第一基底，第二基底和密封剂。第一基板具有第一观察窗，其第一观察窗的厚度小于其他部分的厚度。第二基板具有第二观察窗，其第二观察窗的厚度小于其他部分的厚度，并且设置在第一基板上，使得第二观察窗对准于第一观察窗，并且在第二观察窗之间存在间隔第一和第二基板。密封剂设置在第一和第二基板之间并且围绕第一和第二观察窗口以密封第一和第二基板的边缘之间的空间，从而在第一和第二基板之间限定了样本池。

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