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61. 发明专利

JP2003031732A Insulated semiconductor device 审中-公开
标题翻译：绝缘半导体器件
公开(公告)号：JP2003031732A
公开(公告)日：2003-01-31
申请号：JP2001219099
申请日：2001-07-19
申请人： Hitachi Ltd , Hitachi Metals Ltd , 日立金属株式会社 , 株式会社日立製作所
发明人： KURIHARA YASUTOSHI , MORITA TOSHIAKI , KODAMA HIRONORI , IIZUKA MAMORU , KOYAMA KENJI , OSHIMA MASAHIKO , FUKUI SATOSHI , HAMAYOSHI SHIGEYUKI
IPC分类号： H01L23/13 , H01L23/373
CPC分类号： H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/49111 , H01L2224/49175 , H01L2224/73265 , H01L2924/10253 , H01L2924/1301 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/19107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable insulated semiconductor device in which each member has little possibility of being deformed, denatured, and broken by reducing thermal stresses or thermal strains caused when the device is manufactured or operated, and to provide the members of the device. SOLUTION: This insulated semiconductor device is constituted by firmly fixing a semiconductor substrate to a metallic wiring layer provided on one main surface of a ceramic board and the other main surface of the ceramic board to a supporting member through a metallic junction layer. In addition, the supporting member is constituted of a composite metallic plate manufactured by scattering ceramic power and particles in a matrix metal composed of an Al-alloy, and the metallic wiring layer and metallic junction layer are composed of Al-alloys.
摘要翻译：要解决的问题：为了提供一种高度可靠的绝缘半导体器件，其中每个部件几乎不会因制造或操作器件时引起的热应力或热应变而变形，变形和破坏，并且提供装置。解决方案：该绝缘半导体器件通过金属结层将半导体衬底牢固地固定在设置在陶瓷板的一个主表面上的金属布线层和陶瓷板的另一个主表面上的支撑构件上。此外，支撑构件由通过将陶瓷功率和颗粒散射在由Al合金构成的基体金属中而制造的复合金属板构成，金属布线层和金属接合层由Al合金构成。

62. 发明专利

JP2001244376A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2001244376A
公开(公告)日：2001-09-07
申请号：JP2000055938
申请日：2000-02-28
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD
发明人： KOBAYASHI TOSHIYUKI , KURIHARA YASUTOSHI , UENO TAKUMI , MAEJIMA NOBUYOSHI , NAKAJIMA KOICHI , YAMADA TOMIO , ENDO TSUNEO
IPC分类号： H01L23/13 , H01L23/12 , H01L23/498 , H01L23/538 , H05K1/02 , H05K1/03 , H05K3/00 , H05K3/28 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that can prevent generation of crack and breaking of wire of an inner layer wiring by thermal change in a ceramic substrate when mounting the semiconductor device on an external wiring board having a different thermal expansion coefficient. SOLUTION: A semiconductor device is provided with the ceramic substrate having a first and a second main surfaces, a wiring pattern that is formed on the first main surface to mount a semiconductor component, an external electrode that is formed on the second main surface and is connected with an external circuit, the inner layer wiring that is formed within the ceramic substrate and connects the wiring pattern and the external electrode via a through hole wiring, the semiconductor component that is connected with the wiring pattern, and a resin layer that envelopes the first main surface and the semiconductor component. The inner layer wiring is formed inside not less than 0.05 mm from the side surface of the ceramic substrate.

63. 发明专利

JP2001127074A SEMICONDUCTOR DEVICE AND FULL-WAVE RECTIFICATON DEVICE USING THE SAME 失效
公开(公告)号：JP2001127074A
公开(公告)日：2001-05-11
申请号：JP30796699
申请日：1999-10-29
申请人： HITACHI LTD
发明人： KURIHARA YASUTOSHI , SUZUKI KAZUHIRO , KUSHIMA TADAO , UENO TAKUMI , NAKAJIMA TSUTOMU
IPC分类号： H01L25/07 , H01L21/52
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device wherein resistance to thermal fatigue of a brazing filler metal layer is improved and stable and safe operation is enabled, and a full-wave rectification device using the semiconductor device. SOLUTION: A semiconductor chip has a first main surface and a second main surface which are parallel with each other, and an end surface in the outer peripheral part. The first main surface forms an acute angle with the end surface. The second main surface forms an obtuse angle with the end surface. The first main surface forms a right angle or an obtuse angle with the outer peripheral end surface of a first brazing filler metal layer arranged continuously to the first main surface. The second main surface forms a right angle or an acute angle with the outer peripheral end surface of a second brazing material layer arranged continuously to the second main surface.

64. 发明专利

JP2000077831A Protecting circuit device and secondary battery using the device 审中-公开
标题翻译：使用设备保护电路设备和二次电池
公开(公告)号：JP2000077831A
公开(公告)日：2000-03-14
申请号：JP25933398
申请日：1998-08-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MAEJIMA NOBUYOSHI , KURIHARA YASUTOSHI , ENDO TSUNEO
IPC分类号： H01L23/29 , H01L23/31 , H01M10/42 , H02H7/18 , H05K1/03 , H05K1/05 , H05K3/28
CPC分类号： H01L2224/48091 , H01L2224/48465 , H01L2224/73265 , H01L2924/181 , H01L2924/19105 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To prevent overcharge, excessive discharge and the erroneous operation of electromagnetic waves of the secondary battery. SOLUTION: In the space constituted of a metal case 5 housing a secondary- battery element and a metal cover 6, a protecting circuit device 40 having a flexible printed substrate 9 and an electromagnetic-wave shielding function is mounted. The mounting part of the protecting circuit device 40 is fixed on the first resin layer, which is formed by dispersing ferrite powder of 35-95% on one main surface of a glass epoxy plate 1 through the second resin layer and the wiring layer. The ferrite powder having of 35-95 vol.% is dispersed into organic resin and sealed by a resin sealing body 30, which is molded with the sealing resin, whose thermal expansion coefficient is set at 14-30 ppm. In this way, since the protecting circuit device is surrounded by the resin sealing body, wherein the ferrite powder is added and the first resin layer, the device is protected from electromagnetic-wave noises, and the occurrence of the excessive discharge and the excessive charging of the secondary battery by the erroneous operation is prevented.
摘要翻译：要解决的问题：为了防止二次电池的过充电，过度放电和电磁波的错误操作。解决方案：在由容纳二次电池元件和金属盖6的金属外壳5构成的空间中，安装有具有柔性印刷基板9和电磁波屏蔽功能的保护电路装置40。保护电路装置40的安装部固定在第一树脂层上，该第一树脂层通过第二树脂层和布线层将35-95％的铁氧体粉末分散在玻璃环氧板1的一个主表面上而形成。将35-95体积％的铁氧体粉末分散在有机树脂中，并用热封膨胀系数为14-30ppm的密封树脂模制的树脂密封体30密封。以这种方式，由于保护电路装置被树脂密封体包围，其中添加铁氧体粉末和第一树脂层，该装置被保护免受电磁波噪声，并且发生过度放电和过度充电防止了二次电池的错误操作。

65. 发明专利

JP2566341B2 失效
公开(公告)号：JP2566341B2
公开(公告)日：1996-12-25
申请号：JP32037790
申请日：1990-11-24
申请人： HITACHI LTD
发明人： TAKAHASHI MASAAKI , KURIHARA YASUTOSHI , TAKAHASHI SHIGERU , KANAI KYOSHI , ENDO TSUNEO , KUROSU TOSHIKI
IPC分类号： H01L23/14 , H01L21/52 , H01L23/373

66. 发明专利

JPH04290488A MANUFACTURE OF NON-OXIDE CERAMIC CIRCUIT BOARD AND MANUFACTURE OF ELECTRONIC DEVICE USING THE BOARD 失效
公开(公告)号：JPH04290488A
公开(公告)日：1992-10-15
申请号：JP5477691
申请日：1991-03-19
申请人： HITACHI LTD
发明人： KURIHARA YASUTOSHI , TAKAHASHI SHIGERU , OGIWARA SATORU , ENDO TSUNEO
IPC分类号： C04B37/02 , H01B13/00 , H05K1/03 , H05K1/09 , H05K3/12 , H05K3/38
摘要： PURPOSE:To provide a non-oxide ceramic circuit board having a conductor layer which is excellent in adhesion strength with a non-oxide ceramic substrate and wettability with brazing filler such as solder. CONSTITUTION:A non-oxide ceramic circuit board comprises a conductor layer containing metal powder, at least one of oxides selected among iron, cobalt, cadmium, manganese, titanium, praseodymium and glass powder formed on a man-oxide ceramic substrate, which is then baked in inactive gas of oxygen concentration

67. 发明专利

JPH04192341A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH04192341A
公开(公告)日：1992-07-10
申请号：JP32037790
申请日：1990-11-24
申请人： HITACHI LTD
发明人： TAKAHASHI MASAAKI , KURIHARA YASUTOSHI , TAKAHASHI SHIGERU , KANAI KIYOSHI , ENDO TSUNEO , KUROSU TOSHIKI
IPC分类号： H01L23/14 , H01L21/52 , H01L23/373
摘要： PURPOSE:To improve the reliability of a semiconductor device by providing stress reliever between a ceramic substrate and a metallic support to prevent cracks in the ceramic and bond. CONSTITUTION:A silicon chip 1 is bonded with solder 2a to a predetermined place on a metallized ceramic 3. The ceramic 3, solder 2b, a stress reliever 4 plated with nickel 7 on both sides, and solder 2c are stacked on a metallic support 5 and bonded by heat. The stress reliever is a 50-250mum thick foil made of Cu, Al, Fe, or their alloy, and it has Young's modulus of 6000-15000. This structure prevents the fracture of ceramic due to thermal expansion or the increase of thermal resistance due to a break at a connection.

68. 发明专利

JPH02273991A NON-OXIDE TYPE CERAMIC CIRCUIT BOARD AND ELECTRONIC DEVICE USING SAME 失效
公开(公告)号：JPH02273991A
公开(公告)日：1990-11-08
申请号：JP9513589
申请日：1989-04-17
申请人： HITACHI LTD
发明人： KURIHARA YASUTOSHI , TAKAHASHI SHIGERU , TAKAHASHI MASAAKI , YAMADA KAZUJI , ENDO TSUNEO
IPC分类号： H01L27/01 , H05K3/38
摘要： PURPOSE:To allow power and control circuit elements to be loaded on the same high heat-conductivity board by holding a glassy intermediate layer of 1-10mum thickness between interfaces which are made up by non-oxide system ceramics and a thick film conductor layer. CONSTITUTION:Being a circuit board in which a thick film conductor layer is provided at non-oxide system ceramics, interfaces which are constructed by the non-oxide system ceramics and the thin film conductor hold a glassy intermediate layer of 1-10mum thickness between the interfaces. As a result, a reaction between the non-oxide system ceramics and glassy substances takes place moderately. Then interface layers required for film adhesion are formed uniformly through all the required faces and no bubbles and the like are produced. In this way, a power device and its control circuit are loaded on the same board.

69. 发明专利

JPH01272140A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01272140A
公开(公告)日：1989-10-31
申请号：JP10030988
申请日：1988-04-25
申请人： HITACHI LTD
发明人： EMOTO YOSHIAKI , OTSUKA KANJI , YATSUNO KOMEI , KURIHARA YASUTOSHI , MIWA TAKASHI , KURODA SHIGEO , OKUYA KEN , YAMADA TAKEO , SAWARA KUNIZO , KOBAYASHI TSUNEO , SATO TOSHIHIKO , SHIRAI MASAYUKI
IPC分类号： H01L23/538 , H01L23/08 , H01L23/14 , H01L23/15 , H01L23/52
摘要： PURPOSE:To manufacture various packages having excellent heat-dissipating properties and high reliability by using an aluminum nitride substrate capable of forming a multilayer substrate through a green sheet method as a package base and mounting and sealing a cap composed of aluminum nitride or mullite onto the base by a sealing medium. CONSTITUTION:A package 1 consists of AlN, AlN powder is kneaded with a liquefied binder, CaCO3, etc., and a green sheet is manufactured, and a required number of the green sheets are superposed, and contact-bonded and sintered. Through-holes are bored to the green sheets by a press, patterns are printed, and internal wirings 2 conducting superposition sintering can be shaped. Multilayer thin-film circuits are formed by an insulating layer 3A and thin-film conductors 3B on the surface of a base 1 in a thin-film multilayer interconnection 3. An AlN film and a polyimide synthetic resin may also be used as the insulating layer 3A, but it is preferable that thin film diamond through a vapor phase method is employed. A cap made up of AlN or mullite is fitted, thus eliminating the need for a water cooling jacket on the cap.

70. 发明专利

JPS6413791A THIN-FILM DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPS6413791A
公开(公告)日：1989-01-18
申请号：JP16860187
申请日：1987-07-08
申请人： HITACHI LTD
发明人： INOUE KOICHI , KURIHARA YASUTOSHI , OKADA NOBUSUKE , YATSUNO KOMEI , ENDO TSUNEO
IPC分类号： H01L21/302 , H01L21/3065 , H05K1/16
摘要： PURPOSE:To prevent the surface contamination of a foundation film in a first conduc tive thin-film without increasing mandays while obviating the generation of film discon nection by forming one main surface of a dielectric substrate just under the first conductive thin-film or the surface of the dielectric foundation film shaped onto one main surface of the substrate in height higher than one main surface of the peripheral dielectric substrate or the surface of the dielectric foundation film 'h'. CONSTITUTION:A stepped section h forcibly shaped to the foundation of a second conductive thin-film 11 consisting of a first conductive thin-film 10 and a dielectric base 12 is transferred accurately onto the surface of the second conductive thin film 11 at the intial stage of the deposition of the second conductive thin-film 31. The shapes of the rising and falling sections of the step change with the increase of the film thickness of the second conductive thin-film 11, but the absolute value of the stepped section does not alter and is maintained. The shapes of the rising and falling sections of the step have no effect on the recognition of a pattern. The thickness of the first conductive thin-film is made smaller than 0.05mum and the total of the difference of height with the surface of a foundation film formed onto a main surface and the thickness of the first conductive thin-film is brought to 0.05mum or more to one main surface of a substrate under or in the periphery of the first conductive thin-film.

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