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61. 发明授权

US06834017B2 Error detection system for an information storage device 有权
标题翻译：信息存储设备的错误检测系统
公开(公告)号：US06834017B2
公开(公告)日：2004-12-21
申请号：US10264588
申请日：2002-10-03
申请人： Frederick A. Perner , David Murray Banks
发明人： Frederick A. Perner , David Murray Banks
IPC分类号： G11C702
CPC分类号： G11C11/16 , G11C7/1006 , G11C29/50 , G11C2029/5006 , G11C2207/063
摘要： An information storage device is disclosed. In one embodiment, the information storage device includes first and second memory cells which store complementary first and second logic states. An error detection system coupled to the first and second memory cells is configured to indicate an error if a difference between a first current flowing through the first memory cell and a second current flowing through the second memory cell is less than a predefined value.
摘要翻译：公开了一种信息存储装置。在一个实施例中，信息存储设备包括存储互补的第一和第二逻辑状态的第一和第二存储器单元。耦合到第一和第二存储器单元的错误检测系统被配置为如果流过第一存储单元的第一电流和流过第二存储单元的第二电流之间的差小于预定值，则指示错误。

62. 发明授权

US06829191B1 Magnetic memory equipped with a read control circuit and an output control circuit 有权
标题翻译：磁记忆体配有读控制电路和输出控制电路
公开(公告)号：US06829191B1
公开(公告)日：2004-12-07
申请号：US10726393
申请日：2003-12-03
申请人： Frederick A. Perner , Kenneth Kay Smith , Sarah Morris Brandenberger
发明人： Frederick A. Perner , Kenneth Kay Smith , Sarah Morris Brandenberger
IPC分类号： G11C700
CPC分类号： G11C11/16
摘要： A magnetic memory is disclosed. In one embodiment, the magnetic memory includes first and second memory cells and a read controller coupled to the first and second memory cells. An output controller coupled to the read controller and to the first and second memory cells, wherein the output controller is configured to receive read data in parallel only from the first or second memory cells which have completed the current read operation regardless of whether both the first and second memory cells have completed the current read operation and convert the parallel data to serial data and shift the parallel data to an output in synchronism with the system clock signal.
摘要翻译：公开了磁存储器。在一个实施例中，磁存储器包括耦合到第一和第二存储器单元的第一和第二存储器单元和读取控制器。耦合到读控制器和第一和第二存储器单元的输出控制器，其中输出控制器被配置为仅从已完成当前读操作的第一或第二存储器单元并行地接收读数据，而不管第一并且第二存储单元已经完成当前的读取操作，并且将并行数据转换成串行数据，并且将并行数据与系统时钟信号同步地移位到输出端。

63. 发明授权

US06791873B1 Apparatus and method for generating a write current for a magnetic memory cell 有权
标题翻译：用于产生磁存储单元的写入电流的装置和方法
公开(公告)号：US06791873B1
公开(公告)日：2004-09-14
申请号：US10658442
申请日：2003-09-08
申请人： Frederick A. Perner
发明人： Frederick A. Perner
IPC分类号： G11C1100
CPC分类号： G11C5/147 , G11C11/15
摘要： The invention includes an apparatus and method for generating a write current for a magnetic memory cell. The apparatus includes a write current generator for generating a write current, the write current being magnetically coupled to the magnetic memory cell. The apparatus further includes at least one test magnetic memory cell, the write current being magnetically coupled to the at least one test magnetic memory cell. A switching response of the at least one test magnetic memory cell determines a magnitude of the write current generated by the write current generator. The method for determining a write current for a magnetic memory cell includes supplying a test write current to a test magnetic memory cell, sensing a magnetic state of the test magnetic memory cell to determine a switching response of the test magnetic memory cell, and generating the write current having a magnitude that is dependent upon the switching response.
摘要翻译：本发明包括一种用于产生磁存储单元的写入电流的装置和方法。该装置包括用于产生写入电流的写入电流发生器，写入电流磁耦合到磁性存储单元。该装置还包括至少一个测试磁存储单元，该写入电流磁耦合至该至少一个测试磁存储单元。至少一个测试磁存储器单元的切换响应确定由写入电流发生器产生的写入电流的大小。用于确定磁存储单元的写入电流的方法包括向测试磁存储单元提供测试写入电流，感测测试磁存储单元的磁状态以确定测试磁存储单元的切换响应，写入具有取决于切换响应的幅度的电流。

64. 发明授权

US06757188B2 Triple sample sensing for magnetic random access memory (MRAM) with series diodes 有权
公开(公告)号：US06757188B2
公开(公告)日：2004-06-29
申请号：US10151915
申请日：2002-05-22
申请人： Frederick A. Perner , Lung T. Tran , Kenneth J. Eldredge
发明人： Frederick A. Perner , Lung T. Tran , Kenneth J. Eldredge
IPC分类号： G11C1100
CPC分类号： G11C11/15 , G11C11/16 , G11C13/004 , G11C27/02 , G11C2013/0057
摘要： A data storage device that includes an array of resistive memory cells. The resistive memory cells may include a magnetic tunnel junction (MTJ) and a thin-film diode. The device may include a circuit that is electrically connected to the array and that is also capable of monitoring a signal current flowing through a selected memory cell. Once the signal current has been monitored, the circuit is capable of comparing the signal current to an average reference current in order to determine which of a first resistance state and a second resistance state the selected memory cell is in. Also, a method for operating the data storage device.

65. 发明授权

US06751147B1 Method for adaptively writing a magnetic random access memory 有权
标题翻译：自适应写磁性随机存取存储器的方法
公开(公告)号：US06751147B1
公开(公告)日：2004-06-15
申请号：US10635399
申请日：2003-08-05
申请人： Kenneth K. Smith , Frederick A. Perner , Richard L. Hilton
发明人： Kenneth K. Smith , Frederick A. Perner , Richard L. Hilton
IPC分类号： G11C1115
CPC分类号： G11C11/15
摘要： A method of adaptively writing magnetic memory cells of a MRAM is disclosed according to an embodiment of the present invention. The method comprises providing a logical data block of a memory array having magnetic memory cells, each magnetic memory cell in a known initial state and each magnetic memory cell configured along an easy-axis magnetic field generating conductor and writing to the magnetic memory cells using a predefined minimum current level. The method may further comprise sensing the magnetic memory cells to determine if data has been successfully written, incrementing the current level if writing was unsuccessful and repeating above.
摘要翻译：根据本发明的实施例公开了一种自适应地写入MRAM的磁存储单元的方法。该方法包括提供具有磁存储单元的存储器阵列的逻辑数据块，具有已知初始状态的每个磁存储单元和沿着易轴磁场产生导体配置的每个磁存储单元，并使用预定义的最小电流电平。该方法还可以包括感测磁存储器单元以确定数据是否已被成功写入，如果写入不成功并在上面重复，则递增当前电平。

66. 发明授权

US06674679B1 Adjustable current mode differential amplifier for multiple bias point sensing of MRAM having equi-potential isolation 有权
标题翻译：用于具有等电位隔离的MRAM的多偏压点感测的可调电流模式差分放大器
公开(公告)号：US06674679B1
公开(公告)日：2004-01-06
申请号：US10262051
申请日：2002-10-01
申请人： Frederick A. Perner , Anthony P. Holden
发明人： Frederick A. Perner , Anthony P. Holden
IPC分类号： G11C706
CPC分类号： G11C7/062 , G11C11/1673 , G11C13/0033 , G11C13/004 , G11C2013/0054 , G11C2207/063 , G11C2213/77
摘要： An adjustable current mode differential sense amplifier is disposed to be in communication with a selected memory cell and a reference cell having a predetermined value. The amplifier is able to sense current and voltage changes associated with the selected memory cell and compare them to current and voltage changes associated with the reference cell. The operating point of the sensing amplifier may be changed by modifying threshold voltages related to the back gate bias applied to selected transistors in the amplifier. This adjusting capability enables currents or voltages of the sense amplifier to be set when a first bias voltage is applied to a selected memory cell in order to maximize the sensitivity of the amplifier. When a second bias voltage is applied to the memory and reference cells in order to determine the memory cell value, the amplifier is able to sense slight changes in the currents or voltages associated with the selected memory cell and the reference cell and compare them to determine the state of the memory cell. This increased sensitivity enables the amplifier to have a substantially increased dynamic range without introducing components that might adversely affect the memory circuitry parameters. The memory cell array being sensed has equi-potential isolation for all unselected memory cells, thereby minimizing sneak currents through the unselected memory cells.
摘要翻译：可调电流模式差分读出放大器设置为与选定的存储单元和具有预定值的参考单元通信。放大器能够检测与所选存储单元相关联的电流和电压变化，并将其与参考单元相关的电流和电压变化进行比较。可以通过修改与施加到放大器中的选定晶体管的背栅极偏置相关的阈值电压来改变感测放大器的工作点。当将第一偏置电压施加到所选择的存储器单元以便最大化放大器的灵敏度时，该调整能力使得读出放大器的电流或电压被设置。当第二偏置电压施加到存储器和参考单元以便确定存储单元值时，放大器能够感测与所选择的存储器单元和参考单元相关联的电流或电压的轻微变化，并将其进行比较以确定存储单元的状态。这种增加的灵敏度使得放大器具有显着增加的动态范围，而不引入可能不利地影响存储器电路参数的组件。所感测的存储单元阵列对所有未选择的存储单元具有等电位隔离，从而最小化通过未选择存储单元的潜行电流。

67. 发明授权

US06667901B1 Dual-junction magnetic memory device and read method 有权
标题翻译：双结磁存储器件及读取方式
公开(公告)号：US06667901B1
公开(公告)日：2003-12-23
申请号：US10426381
申请日：2003-04-29
申请人： Frederick A. Perner , Manish Sharma , Manoj Bhattacharyya
发明人： Frederick A. Perner , Manish Sharma , Manoj Bhattacharyya
IPC分类号： G11C1115
CPC分类号： G11C11/1673 , G11C11/161
摘要： A magnetic memory device includes a first magnetic tunnel junction having a first reference ferromagnetic layer; a second magnetic tunnel junction having a second reference ferromagnetic layer; and an electrically conductive spacer layer between the first and second reference layers. The first and second reference layers are antiferromagnetically coupled.
摘要翻译：磁存储器件包括具有第一参考铁磁层的第一磁性隧道结; 具有第二参考铁磁层的第二磁性隧道结; 以及在第一和第二参考层之间的导电间隔层。第一和第二参考层是反铁磁耦合的。

68. 发明授权

US06643213B2 Write pulse circuit for a magnetic memory 有权
标题翻译：为磁存储器写入脉冲电路
公开(公告)号：US06643213B2
公开(公告)日：2003-11-04
申请号：US10096542
申请日：2002-03-12
申请人： Frederick A. Perner , Manoj Bhattacharyya
发明人： Frederick A. Perner , Manoj Bhattacharyya
IPC分类号： G11C800
CPC分类号： G11C11/16
摘要： A magnetic memory includes a memory cell and a conductor wherein the memory cell is crossed by the conductor. A write pulse generator is coupled to the conductor and is configured to provide a discharge current to the conductor during a write operation of the memory cell.
摘要翻译：磁存储器包括存储单元和导体，其中存储单元被导体交叉。写入脉冲发生器耦合到导体并被配置为在存储器单元的写入操作期间向导体提供放电电流。

69. 发明授权

US06256247B1 Differential sense amplifiers for resistive cross point memory cell arrays 有权
公开(公告)号：US06256247B1
公开(公告)日：2001-07-03
申请号：US09745103
申请日：2000-12-19
申请人： Frederick A. Perner
发明人： Frederick A. Perner
IPC分类号： G11C1115
CPC分类号： G11C11/15 , G11C11/1673 , G11C27/02
摘要： Resistance of a memory cell element in a resistive cross point memory cell array is sensed by a read circuit including a differential amplifier, a first direct injection preamplifier and a second direct injection preamplifier. During a read operation, the first direct injection preamplifier is coupled to a first input node of the differential amplifier, and the second direct injection preamplifier is coupled to a second input node of the differential amplifier.

70. 发明授权

US6115019A Register pixel for liquid crystal displays 失效
标题翻译：液晶显示器的寄存器像素
公开(公告)号：US6115019A
公开(公告)日：2000-09-05
申请号：US30245
申请日：1998-02-25
申请人： Frederick A. Perner
发明人： Frederick A. Perner
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3648 , G09G2300/0814 , G09G2300/0852 , G09G3/3614 , G09G3/3651 , G09G3/3659
摘要： A display device and a method of driving liquid crystals in an array of pixels of the display device include providing dual port memory cells that isolate write operations to the pixels from read operations within the pixels. Preferably, each pixel has an array of integrated dual port memory cells, with the number of cells in the array being equal to the number of bits per pixel within each frame of pixel data. The dual port memory cell may be an electrical series connection of a bit-storage device having write access circuitry (e.g., a write access transistor) on one side and read access circuitry (e.g., two read access transistors) on the opposite side. Such a series connection of devices enables the rate of driving the liquid crystal to be set independently from the rate of receiving pixel data at the pixels.
摘要翻译：在显示装置的像素阵列中驱动液晶的显示装置和方法包括提供将像素的写入操作与像素内的读取操作隔离的双端口存储单元。优选地，每个像素具有集成双端口存储器单元的阵列，其中阵列中的单元数目等于像素数据的每帧内的每像素的位数。双端口存储器单元可以是在一侧具有写入存取电路（例如，写存取晶体管）和位于相对侧的读访问电路（例如，两个读存取晶体管）的位存储器件的电串联连接。这种装置的串联使得可以独立于在像素处接收像素数据的速率来设置驱动液晶的速率。

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