专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明申请

US20060211187A1 MOS transistor with laser-patterned metal gate, and method for making the same 有权
公开(公告)号：US20060211187A1
公开(公告)日：2006-09-21
申请号：US11203563
申请日：2005-08-11
申请人： Criswell Choi , Joerg Rockenberger , J. MacKenzie , Christopher Gudeman
发明人： Criswell Choi , Joerg Rockenberger , J. MacKenzie , Christopher Gudeman
IPC分类号： H01L21/8234
CPC分类号： H01L21/32131 , H01L21/28123 , H01L21/84 , H01L27/1292 , H01L29/66757
摘要： A MOS transistor with a laser-patterned metal gate, and methods for its manufacture. The method generally includes forming a layer of metal-containing material on a dielectric film, wherein the dielectric film is on an electrically functional substrate comprising an inorganic semiconductor; laser patterning a metal gate from the metal-containing material layer; and forming source and drain terminals in the inorganic semiconductor in locations adjacent to the metal gate. The transistor generally includes an electrically functional substrate; a dielectric film on at least portions of the electrically functional substrate; a laser patterned metal gate on the dielectric film; and source and drain terminals comprising a doped inorganic semiconductor layer adjacent to the metal gate. The present invention advantageously provides MOS thin film transistors having reliable electrical characteristics quickly, efficiently, and/or at a low cost by eliminating one or more conventional photolithographic steps.

62. 发明授权

US06984369B1 Process for making surfactant capped metal oxide nanocrystals, and products produced by the process 有权
标题翻译：用于制备表面活性剂封端的金属氧化物纳米晶体的方法，以及通过该方法生产的产物
公开(公告)号：US06984369B1
公开(公告)日：2006-01-10
申请号：US09721126
申请日：2000-11-22
申请人： A. Paul Alivisatos , Joerg Rockenberger
发明人： A. Paul Alivisatos , Joerg Rockenberger
IPC分类号： C01B13/00
CPC分类号： C01B13/18 , B82Y30/00 , C01G1/02 , C01G3/02 , C01G11/00 , C01G45/02 , C01G49/06 , C01G51/04 , C01P2002/72 , C01P2004/04 , C01P2004/52 , C01P2004/64 , C09C1/00 , C09C1/24 , C09C3/08
摘要： Disclosed is a process for making surfactant capped nanocrystals of metal oxides which are dispersable in organic solvents. The process comprises decomposing a metal cupferron complex of the formula MXCupX, wherein M is a metal, and Cup is a N-substituted N-Nitroso hydroxylamine, in the presence of a coordinating surfactant, the reaction being conducted at a temperature ranging from about 150 to about 400° C., for a period of time sufficient to complete the reaction. Also disclosed are compounds made by the process.
摘要翻译：公开了一种制备可分散在有机溶剂中的金属氧化物的表面活性剂封端的纳米晶体的方法。该方法包括分解式M为X的金属铜复合物，其中M为金属，Cup为N-取代的N-亚硝基羟胺，其中存在配位表面活性剂，反应在约150至约400℃的温度下进行足以完成反应的时间。还公开了通过该方法制备的化合物。

63. 发明授权

US08758982B1 Laser processing enabling radio frequency identification (RFID) customization 有权
标题翻译：激光加工使射频识别（RFID）定制
公开(公告)号：US08758982B1
公开(公告)日：2014-06-24
申请号：US11595839
申请日：2006-11-08
申请人： Criswell Choi , Patrick Smith , James Montague Cleeves , Joerg Rockenberger , Christopher Gudeman , J. Devin MacKenzie
发明人： Criswell Choi , Patrick Smith , James Montague Cleeves , Joerg Rockenberger , Christopher Gudeman , J. Devin MacKenzie
IPC分类号： G03F7/00
CPC分类号： G06K19/07773 , G03F7/0043 , G03F7/2055 , G06K19/07749 , G08B13/2402 , G08B13/2417 , G08B13/244 , G08B13/2468
摘要： Methods, algorithms, processes, circuits, and/or structures for laser patterning suitable for customized RFID designs are disclosed. In one embodiment, a method of laser patterning of an identification device can include the steps of: (i) depositing a patternable resist formulation on a substrate having configurable elements and/or materials thereon; (ii) irradiating the resist formulation with a laser tool sufficiently to change the solubility characteristics of the resist in a developer; and (iii) developing exposed areas of the resist using the developer. Embodiments of the present invention can advantageously provide a relatively low cost and high throughput approach for customized RFID devices.
摘要翻译：公开了适用于定制RFID设计的用于激光图案的方法，算法，过程，电路和/或结构。在一个实施例中，识别装置的激光图案化的方法可以包括以下步骤：（i）在其上具有可配置元件和/或材料的衬底上沉积可图案化的抗蚀剂制剂; （ii）用激光工具照射抗蚀剂制剂，足以改变显影剂中抗蚀剂的溶解度特性; 和（iii）使用显影剂显影抗蚀剂的曝光区域。本发明的实施例可以有利地为定制的RFID设备提供相对低成本和高吞吐量的方法。

64. 发明授权

US08461628B2 MOS transistor with laser-patterned metal gate, and method for making the same 有权
标题翻译：具有激光图案化金属栅极的MOS晶体管及其制造方法
公开(公告)号：US08461628B2
公开(公告)日：2013-06-11
申请号：US11203563
申请日：2005-08-11
申请人： Criswell Choi , Joerg Rockenberger , J. Devin MacKenzie , Christopher Gudeman
发明人： Criswell Choi , Joerg Rockenberger , J. Devin MacKenzie , Christopher Gudeman
IPC分类号： H01L29/66 , H01L21/336 , H01L21/8234 , H01L29/772
CPC分类号： H01L21/32131 , H01L21/28123 , H01L21/84 , H01L27/1292 , H01L29/66757
摘要： A MOS transistor with a laser-patterned metal gate, and methods for its manufacture. The method generally includes forming a layer of metal-containing material on a dielectric film, wherein the dielectric film is on an electrically functional substrate comprising an inorganic semiconductor; laser patterning a metal gate from the metal-containing material layer; and forming source and drain terminals in the inorganic semiconductor in locations adjacent to the metal gate. The transistor generally includes an electrically functional substrate; a dielectric film on at least portions of the electrically functional substrate; a laser patterned metal gate on the dielectric film; and source and drain terminals comprising a doped inorganic semiconductor layer adjacent to the metal gate. The present invention advantageously provides MOS thin film transistors having reliable electrical characteristics quickly, efficiently, and/or at a low cost by eliminating one or more conventional photolithographic steps.
摘要翻译：具有激光图案化金属栅极的MOS晶体管及其制造方法。该方法通常包括在电介质膜上形成含金属材料层，其中电介质膜位于包含无机半导体的电功能基底上; 激光从含金属材料层图案化金属栅极; 以及在与金属栅极相邻的位置的无机半导体中形成源极和漏极端子。晶体管通常包括电功能基板; 在所述电功能基板的至少一部分上的介电膜; 电介质膜上的激光图案化金属栅极; 源极和漏极端子包括与金属栅极相邻的掺杂的无机半导体层。本发明有利地通过消除一个或多个常规光刻步骤来快速，有效地和/或以低成本提供具有可靠电特性的MOS薄膜晶体管。

65. 发明授权

US07701011B2 Printed dopant layers 有权
标题翻译：印刷掺杂剂层
公开(公告)号：US07701011B2
公开(公告)日：2010-04-20
申请号：US11888942
申请日：2007-08-03
申请人： Arvind Kamath , James Montague Cleeves , Joerg Rockenberger , Patrick Smith , Fabio Zürcher
发明人： Arvind Kamath , James Montague Cleeves , Joerg Rockenberger , Patrick Smith , Fabio Zürcher
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L27/12 , H01L27/1292 , H01L29/78618
摘要： An electronic device, including a substrate, a plurality of first semiconductor islands on the substrate, a plurality of second semiconductor islands on the substrate, a first dielectric film on the first subset of the semiconductor islands, second dielectric film on the second semiconductor islands, and a metal layer in electrical contact with the first and second semiconductor islands. The first semiconductor islands and the first dielectric film contain a first diffusible dopant, and the second semiconductor islands and the second dielectric layer film contain a second diffusible dopant different from the first diffusible dopant. The present electronic device can be manufactured using printing technologies, thereby enabling high-throughput, low-cost manufacturing of electrical circuits on a wide variety of substrates.
摘要翻译：一种电子器件，包括衬底，衬底上的多个第一半导体岛，衬底上的多个第二半导体岛，半导体岛的第一子集上的第一电介质膜，第二半导体岛上的第二电介质膜，以及与第一和第二半导体岛电接触的金属层。第一半导体岛和第一介电膜包含第一可扩散掺杂剂，第二半导体岛和第二介电层膜含有不同于第一可扩散掺杂剂的第二可扩散掺杂物。本电子装置可以使用印刷技术制造，从而能够在各种基板上实现高通量，低成本的电路制造。

66. 发明申请

US20140094004A1 Printed Dopant Layers 有权
标题翻译：印刷掺杂层
公开(公告)号：US20140094004A1
公开(公告)日：2014-04-03
申请号：US13633816
申请日：2012-10-02
申请人： Arvind Kamath , James Montague Cleeves , Joerg Rockenberger , Patrick Smith , Fabio Zürcher
发明人： Arvind Kamath , James Montague Cleeves , Joerg Rockenberger , Patrick Smith , Fabio Zürcher
IPC分类号： H01L21/336
CPC分类号： H01L27/1292 , H01L29/66757
摘要： A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.
摘要翻译：一种用于制造诸如MOS晶体管的电子器件的方法，包括以下步骤：在电功能衬底上形成多个半导体岛，在第一半导体岛子集上或第二子体上印刷第一介电层，在半导体岛的第二子集上或之上，以及退火。第一介电层包含第一掺杂剂，并且（任选的）第二介电层包含不同于第一掺杂剂的第二掺杂剂。电介质层，半导体岛和衬底被充分退火以将第一掺杂剂扩散到半导体岛的第一子集中，并且当存在时将第二掺杂剂扩散到半导体岛的第二子集中。

67. 发明授权

US08460983B1 Method for modifying and controlling the threshold voltage of thin film transistors 有权
标题翻译：修改和控制薄膜晶体管阈值电压的方法
公开(公告)号：US08460983B1
公开(公告)日：2013-06-11
申请号：US12357065
申请日：2009-01-21
申请人： Wenzhuo Guo , Fabio Zürcher , Arvind Kamath , Joerg Rockenberger
发明人： Wenzhuo Guo , Fabio Zürcher , Arvind Kamath , Joerg Rockenberger
IPC分类号： C09D183/16 , H01L21/208
CPC分类号： H01L21/02667 , C08G77/56 , C08K5/55 , C08K2201/001 , C09D11/52 , C09D183/16 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02628 , H01L21/208 , H01L27/1292 , H01L29/167 , H01L29/66757
摘要： Doped semiconductor ink formulations, methods of making doped semiconductor ink formulations, methods of coating or printing thin films, methods of forming electronic devices and/or structures from the thin films, and methods for modifying and controlling the threshold voltage of a thin film transistor using the films are disclosed. A desired dopant may be added to an ink formulation comprising a Group IVA compound and a solvent, and then the ink may be printed on a substrate to form thin films and conductive structures/devices, such as thin film transistors. By adding a customized amount of the dopant to the ink prior to printing, the threshold voltage of a thin film transistor made from the doped semiconductor ink may be independently controlled upon activation of the dopant.
摘要翻译：掺杂的半导体油墨配方，制造掺杂的半导体油墨配方的方法，涂覆或印刷薄膜的方法，从薄膜形成电子器件和/或结构的方法，以及用于修改和控制薄膜晶体管的阈值电压的方法，其使用披露了这些电影。可以将期望的掺杂剂添加到包含IVA族化合物和溶剂的油墨配方中，然后可以将油墨印刷在基材上以形成薄膜和诸如薄膜晶体管的导电结构/器件。通过在打印之前向墨水添加定制量的掺杂剂，可以在掺杂剂激活时独立地控制由掺杂半导体油墨制成的薄膜晶体管的阈值电压。

68. 发明授权

US07951892B1 Doped polysilanes, compositions containing the same, methods for making the same, and films formed therefrom 有权
标题翻译：掺杂的聚硅烷，含有它们的组合物，其制备方法和由其形成的膜
公开(公告)号：US07951892B1
公开(公告)日：2011-05-31
申请号：US11249167
申请日：2005-10-11
申请人： Wenzhuo Guo , Vladimir K. Dioumaev , Joerg Rockenberger
发明人： Wenzhuo Guo , Vladimir K. Dioumaev , Joerg Rockenberger
IPC分类号： C08G77/00
CPC分类号： C07F7/0896 , C08G77/60 , C08L83/16
摘要： Doped polysilanes, inks containing the same, and methods for their preparation and use are disclosed. The doped polysilane generally has the formula H-[AaHb(DRx)m]q-[(AcHdR1e)n]p—H, where each instance of A is independently Si or Ge, and D is B, P, As or Sb. In preferred embodiments, R is H, -AfHf+1R2f, alkyl, aryl or substituted aryl, and R1 is independently H, halogen, aryl or substituted aryl. In one aspect, the method of making a doped poly(aryl)silane generally includes the steps of combining a doped silane of the formula AaHb+2(DRx)m (optionally further including a silane of the formula AcHd+2R1e) with a catalyst of the formula R4wR5yMXz (or an immobilized derivative thereof) to form a doped poly(aryl)silane, then removing the metal M. In another aspect, the method of making a doped polysilane includes the steps of halogenating a doped polyarylsilane, and reducing the doped halopolysilane with a metal hydride to form the doped polysilane. The synthesis of semiconductor inks via dehydrocoupling of doped silanes and/or germanes allows for tuning of the ink properties (e.g., viscosity, boiling point, surface tension and dopant level or concentration) and for deposition of doped silicon films or islands by spincoating, inkjetting, dropcasting, etc., with or without the use of UV irradiation.
摘要翻译：公开了掺杂聚硅烷，含有它们的油墨及其制备和使用方法。掺杂的聚硅烷通常具有式H [AaHb（DRx）m] q - [（AcHdR1e）n] p-H，其中A的每个实例独立地为Si或Ge，D为B，P，As或Sb。在优选的实施方案中，R是H，-AfHf + 1R2f，烷基，芳基或取代的芳基，R1独立地是H，卤素，芳基或取代的芳基。一方面，制备掺杂的聚（芳基）硅烷的方法通常包括将式AaHb + 2（DRx）m的掺杂硅烷（任选进一步包括式AcHd + 2R1e的硅烷）与催化剂（或其固定化的衍生物）以形成掺杂的聚（芳基）硅烷，然后除去金属M.另一方面，制备掺杂聚硅烷的方法包括以下步骤：卤化掺杂的聚芳基硅烷，并将掺杂的卤代聚硅烷与金属氢化物反应形成掺杂的聚硅烷。通过掺杂硅烷和/或锗烷的脱氢键合合半导体油墨允许调节油墨性能（例如粘度，沸点，表面张力和掺杂剂水平或浓度），以及通过旋涂，喷墨来沉积掺杂的硅膜或岛，放映等，有或没有使用紫外线照射。

69. 发明申请

US20070287237A1 Printed, self-aligned, top gate thin film transistor 有权
标题翻译：印刷，自对准，顶栅薄膜晶体管
公开(公告)号：US20070287237A1
公开(公告)日：2007-12-13
申请号：US11818078
申请日：2007-06-12
申请人： Joerg Rockenberger , James Cleeves , Arvind Kamath
发明人： Joerg Rockenberger , James Cleeves , Arvind Kamath
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L29/7866 , B82Y10/00 , H01L27/1248 , H01L27/1292 , H01L29/458 , H01L29/4908 , H01L29/66757 , H01L29/78681 , H01L29/7869
摘要： A self-aligned top-gate thin film transistor (TFT) and a method of forming such a thin film transistor, by forming a semiconductor thin film layer; printing a doped glass pattern thereon, a gap in the doped glass pattern defining a channel region of the TFT; forming a gate electrode on or over the channel region, the gate electrode comprising a gate dielectric film and a gate conductor thereon; and diffusing a dopant from the doped glass pattern into the semiconductor thin film layer.
摘要翻译：一种自对准顶栅薄膜晶体管（TFT）和通过形成半导体薄膜层形成这种薄膜晶体管的方法; 在其上印刷掺杂的玻璃图案，所述掺杂玻璃图案中的间隙限定所述TFT的沟道区域; 在沟道区域上或上方形成栅电极，栅电极在其上包括栅介质膜和栅极导体; 并且将掺杂剂从掺杂的玻璃图案扩散到半导体薄膜层中。

70. 发明授权

US08900915B2 Epitaxial structures and methods of forming the same 有权
标题翻译：外延结构及其形成方法
公开(公告)号：US08900915B2
公开(公告)日：2014-12-02
申请号：US13081257
申请日：2011-04-06
申请人： Joerg Rockenberger , Fabio Zürcher , Mao Takashima
发明人： Joerg Rockenberger , Fabio Zürcher , Mao Takashima
IPC分类号： H01L31/078 , H01L21/02 , H01L31/068 , H01L31/18
CPC分类号： H01L21/0237 , H01L21/02428 , H01L21/0243 , H01L21/02494 , H01L21/02532 , H01L21/02587 , H01L21/02628 , H01L21/02661 , H01L21/228 , H01L31/068 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： Epitaxial structures, methods of making epitaxial structures, and devices incorporating such epitaxial structures are disclosed. The methods and the structures employ a liquid-phase Group IVA semiconductor element precursor ink (e.g., including a cyclo- and/or polysilane) and have a relatively good film quality (e.g., texture, density and/or purity). The Group IVA semiconductor element precursor ink forms an epitaxial film or feature when deposited on a (poly)crystalline substrate surface and heated sufficiently for the Group IVA semiconductor precursor film or feature to adopt the (poly)crystalline structure of the substrate surface. Devices incorporating a selective emitter that includes the present epitaxial structure may exhibit improved power conversion efficiency relative to a device having a selective emitter made without such a structure due to the improved film quality and/or the perfect interface formed in regions between the epitaxial film and contacts formed on the film.
摘要翻译：公开了外延结构，制造外延结构的方法和结合这种外延结构的器件。方法和结构采用液相IVA族半导体元件前体油墨（例如，包括环和/或聚硅烷）并且具有相对较好的膜质量（例如质地，密度和/或纯度）。当IVA半导体元件前体油墨沉积在（多）晶体衬底表面上时，IVA半导体元件前体油墨形成外延膜或特征，并充分加热以使IVA族半导体前体膜或特征采用衬底表面的（多）晶体结构。结合包括本外延结构的选择性发射极的器件相对于具有选择性发射极的器件而言，具有提高的功率转换效率，由于改善的膜质量和/或在外延膜和在电影上形成的触点。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式