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61. 发明申请

US20100052018A1 CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS 有权
标题翻译：连续金属半导体合金通过互连
公开(公告)号：US20100052018A1
公开(公告)日：2010-03-04
申请号：US12198592
申请日：2008-08-26
申请人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
发明人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
IPC分类号： H01L21/768 , H01L29/78
CPC分类号： H01L29/7848 , B82Y10/00 , H01L21/28518 , H01L21/76885 , H01L23/481 , H01L29/665 , H01L29/78 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： A contact structure is disclosed in which a continuous metal semiconductor alloy is located within a via contained within a dielectric material. The continuous semiconductor metal alloy is in direct contact with an upper metal line of a first metal level located atop the continuous semiconductor metal alloy and at least a surface of each source and drain diffusion region located beneath the continuous metal semiconductor alloy. The continuous metal semiconductor alloy can be derived from either a semiconductor nanowire or an epitaxial grown semiconductor material. The continuous metal semiconductor alloy includes a lower portion that is contained within an upper surface of each source and drain region, and a vertical pillar portion extending upward from the lower portion. The lower portion of the continuous metal semiconductor alloy and the vertical pillar portion are not separated by a material interface. Instead, the two portions of the continuous metal semiconductor alloy are of unitary construction, i.e., a single piece.
摘要翻译：公开了一种接触结构，其中连续的金属半导体合金位于包含在电介质材料内的通孔内。连续半导体金属合金与位于连续半导体金属合金顶部的第一金属水平的上金属线和至少位于连续金属半导体合金下方的源极和漏极扩散区的表面直接接触。连续金属半导体合金可以衍生自半导体纳米线或外延生长半导体材料。连续金属半导体合金包括包含在每个源极和漏极区域的上表面内的下部以及从下部向上延伸的垂直柱部分。连续金属半导体合金的下部和垂直支柱部分不被材料界面分离。相反，连续金属半导体合金的两个部分是单一结构，即单件。

62. 发明申请

US20090304951A1 ULTRALOW DIELECTRIC CONSTANT LAYER WITH CONTROLLED BIAXIAL STRESS 审中-公开
标题翻译：超导介质恒定层与受控双向应力
公开(公告)号：US20090304951A1
公开(公告)日：2009-12-10
申请号：US12542287
申请日：2009-08-17
申请人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
发明人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
IPC分类号： C23C16/513 , G21G5/00
CPC分类号： H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要： A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
摘要翻译：描述了形成具有受控双轴应力的超低介电常数层的方法，其包括以下步骤：通过PECVD和旋涂方法之一形成包含Si，C，O和H的层，并在含有非常低的浓度的环境中固化该膜的氧和水各自小于10ppm。还通过使用介电常数不超过2.8的方法描述材料。本发明克服了低双轴应力低于46MPa的薄膜形成问题。

63. 发明授权

US07615482B2 Structure and method for porous SiCOH dielectric layers and adhesion promoting or etch stop layers having increased interfacial and mechanical strength 有权
标题翻译：多孔SiCOH介电层的结构和方法以及具有增加的界面和机械强度的粘合促进或蚀刻停止层
公开(公告)号：US07615482B2
公开(公告)日：2009-11-10
申请号：US11690248
申请日：2007-03-23
申请人： Daniel C. Edelstein , Alexandros Demos , Stephen M. Gates , Alfred Grill , Steven E. Molis , Vu Ngoc Tran Nguyen , Steven Reiter , Darryl D. Restaino , Kang Sub Yim
发明人： Daniel C. Edelstein , Alexandros Demos , Stephen M. Gates , Alfred Grill , Steven E. Molis , Vu Ngoc Tran Nguyen , Steven Reiter , Darryl D. Restaino , Kang Sub Yim
IPC分类号： H01L21/4763
CPC分类号： C23C16/401 , C23C16/0272 , C23C16/029 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/31695 , H01L21/7682 , H01L21/76832 , H01L21/76834 , H01L21/76835 , H01L2221/1047 , Y10T428/24851 , Y10T428/249961
摘要： Disclosed is a structure and method for forming a structure including a SiCOH layer having increased mechanical strength. The structure includes a substrate having a layer of dielectric or conductive material, a layer of oxide on the layer of dielectric or conductive material, the oxide layer having essentially no carbon, a graded transition layer on the oxide layer, the graded transition layer having essentially no carbon at the interface with the oxide layer and gradually increasing carbon towards a porous SiCOH layer, and a porous SiCOH (pSiCOH) layer on the graded transition layer, the porous pSiCOH layer having an homogeneous composition throughout the layer. The method includes a process wherein in the graded transition layer, there are no peaks in the carbon concentration and no dips in the oxygen concentration.
摘要翻译：公开了一种用于形成包括具有增加的机械强度的SiCOH层的结构的结构和方法。该结构包括具有电介质或导电材料层的基底，介电层或导电材料层上的氧化物层，氧化物层基本上不含碳，氧化物层上的渐变过渡层，梯度过渡层基本上在与氧化物层的界面处没有碳并逐渐向多孔SiCOH层增加碳，并且在渐变过渡层上的多孔SiCOH（pSiCOH）层，多孔pSiCOH层在整个层中具有均匀的组成。该方法包括一种方法，其中在渐变过渡层中，在碳浓度中没有峰，而在氧浓度中没有下降。

64. 发明授权

US07510904B2 Structure for and method of fabricating a high-speed CMOS-compatible Ge-on-insulator photodetector 有权
标题翻译：制造高速CMOS兼容的绝缘体上的光电探测器的结构和方法
公开(公告)号：US07510904B2
公开(公告)日：2009-03-31
申请号：US11556739
申请日：2006-11-06
申请人： Jack O. Chu , Gabriel K. Dehlinger , Alfred Grill , Steven J. Koester , Qiqing Ouyang , Jeremy D. Schaub
发明人： Jack O. Chu , Gabriel K. Dehlinger , Alfred Grill , Steven J. Koester , Qiqing Ouyang , Jeremy D. Schaub
IPC分类号： H01L21/00
CPC分类号： H01L31/101
摘要： The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.
摘要翻译：本发明解决了与Si CMOS技术兼容的高速高效光电探测器的问题。该结构由薄的SOI衬底上的Ge吸收层组成，并且使用隔离区，交替的n型和p型接触以及低电阻表面电极。该器件通过利用掩埋绝缘层，通过利用Ge吸收层，利用薄的吸收层和窄电极间隔的低电压操作以及兼容性来兼容宽泛的光谱，利用埋入的绝缘层来隔离底层衬底中产生的载流子，通过其平面结构和使用IV族吸收材料的CMOS器件。用于制造光电检测器的方法使用在薄SOI或外延氧化物上的Ge的直接生长，以及随后的热退火以实现高质量的吸收层。该方法限制可用于相互扩散的Si的量，从而允许Ge层退火，而不会导致Ge层被下面的Si大量稀释。

65. 发明申请

US20090075472A1 METHODS TO MITIGATE PLASMA DAMAGE IN ORGANOSILICATE DIELECTRICS 失效
标题翻译：减轻有机电介质中等离子体损伤的方法
公开(公告)号：US20090075472A1
公开(公告)日：2009-03-19
申请号：US11857760
申请日：2007-09-19
申请人： John C. Arnold , Griselda Bonilla , William J. Cote , Geraud Dubois , Daniel C. Edelstein , Alfred Grill , Elbert Huang , Robert D. Miller , Satya V. Nitta , Sampath Purushothaman , E. Todd Ryan , Muthumanickam Sankarapandian , Terry A. Spooner , Willi Volksen
发明人： John C. Arnold , Griselda Bonilla , William J. Cote , Geraud Dubois , Daniel C. Edelstein , Alfred Grill , Elbert Huang , Robert D. Miller , Satya V. Nitta , Sampath Purushothaman , E. Todd Ryan , Muthumanickam Sankarapandian , Terry A. Spooner , Willi Volksen
IPC分类号： H01L21/4763
CPC分类号： H01L21/76808 , H01L21/02063 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02304 , H01L21/02348 , H01L21/02362 , H01L21/31138 , H01L21/31144 , H01L21/31633 , H01L21/76814 , H01L21/76826 , H01L21/76831
摘要： Methods of minimizing or eliminating plasma damage to low k and ultra low k organosilicate intermetal dielectric layers are provided. The reduction of the plasma damage is effected by interrupting the etch and strip process flow at a suitable point to add an inventive treatment which protects the intermetal dielectric layer from plasma damage during the plasma strip process. Reduction or elimination of a plasma damaged region in this manner also enables reduction of the line bias between a line pattern in a photoresist and a metal line formed therefrom, and changes in the line width of the line trench due to a wet clean after the reactive ion etch employed for formation of the line trench and a via cavity. The reduced line bias has a beneficial effect on electrical yields of a metal interconnect structure.
摘要翻译：提供了最小化或消除对低k和超低k有机硅酸盐金属间电介质层的等离子体损伤的方法。等离子体损伤的降低通过在合适的点处中断蚀刻和剥离工艺流程来实现，以增加本发明的处理，其保护金属间电介质层免受等离子体条带处理期间的等离子体损伤。以这种方式减少或消除等离子体损伤区域还能够减少光致抗蚀剂中的线图案和由其形成的金属线之间的线偏压，并且由于在反应性之后的湿清洁而改变线沟槽的线宽用于形成线沟槽和通孔腔的离子蚀刻。减少的线偏压对金属互连结构的电产量具有有益的影响。

66. 发明申请

US20090061649A1 LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT 审中-公开
标题翻译：低k多孔SiCOH电介质和后期成膜处理的整合
公开(公告)号：US20090061649A1
公开(公告)日：2009-03-05
申请号：US11846250
申请日：2007-08-28
申请人： Stephen M. Gates , Alfred Grill , Son Nguyen , Satyanarayana V. Nitta , Thomas M. Shaw
发明人： Stephen M. Gates , Alfred Grill , Son Nguyen , Satyanarayana V. Nitta , Thomas M. Shaw
IPC分类号： H01L21/47
CPC分类号： H01L23/5329 , C23C16/401 , C23C16/505 , C23C16/511 , C23C16/56 , H01J2237/336 , H01J2237/338 , H01J2237/3382 , H01L21/02126 , H01L21/02203 , H01L21/02205 , H01L21/02216 , H01L21/02274 , H01L21/0234 , H01L21/02345 , H01L21/02348 , H01L21/02351 , H01L21/31633 , H01L21/31695 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A porous SiCOH (e.g., p-SiCOH) dielectric film in which the stress change caused by increased tetrahedral strain is minimized by post treatment in unsaturated Hydrocarbon ambient. The inventive p-SiCOH dielectric film has more —(CHx) and less Si—O—H and Si—H bondings as compared to prior art p-SiCOH dielectric films. Moreover, a stable pSiOCH dielectric film is provided in which the amount of Si—OH (silanol) and Si—H groups at least within the pores has been reduced by about 90% or less by the post treatment. Hence, the inventive p-SiCOH dielectric film has hydrophobicity improvement as compared with prior art p-SiCOH dielectric films. In the present invention, a p-SiCOH dielectric film is produced that is flexible since the pores of the inventive film include stabilized crosslinking —(CHx)— chains wherein x is 1, 2 or 3 therein. The dielectric film is produced utilizing an annealing step subsequent deposition that includes a gaseous ambient that includes at least one C—C double bond and/or at least one C—C triple bond.
摘要翻译：通过在不饱和烃环境中后处理使多孔SiCOH（例如，p-SiCOH）介电膜在其中由增加的四面体应变引起的应力变化最小化。与现有技术的p-SiCOH介电膜相比，本发明的p-SiCOH电介质膜具有更多的（（CH x））和更少的Si-O-H和Si-H键。此外，提供稳定的pSiOCH电介质膜，其中至少在孔内的Si-OH（硅烷醇）和Si-H基团的量通过后处理减少约90％以下。因此，与现有技术的p-SiCOH介电膜相比，本发明的p-SiCOH介电膜具有疏水性改善。在本发明中，由于本发明薄膜的孔包括其中x为1,2或3的稳定的交联 - （CHx） - 链，因此制备柔性的p-SiCOH介电膜。介电膜是利用包括至少一个C-C双键和/或至少一个C-C三键的气态环境的退火步骤进行的。

67. 发明授权

US07357977B2 Ultralow dielectric constant layer with controlled biaxial stress 有权
标题翻译：具有受控双轴应力的超低介电常数层
公开(公告)号：US07357977B2
公开(公告)日：2008-04-15
申请号：US11034479
申请日：2005-01-13
申请人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
发明人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
IPC分类号： H01L23/52 , H01L23/58
CPC分类号： H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要： A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
摘要翻译：描述了形成具有受控双轴应力的超低介电常数层的方法，其包括以下步骤：通过PECVD和旋涂方法之一形成包含Si，C，O和H的层，并在含有非常低的浓度的环境中固化该膜的氧和水各自小于10ppm。还通过使用介电常数不大于2.8的方法描述材料。本发明克服了低双轴应力低于46MPa的薄膜形成问题。

68. 发明申请

US20070173071A1 SiCOH dielectric 审中-公开
标题翻译： SiCOH电介质
公开(公告)号：US20070173071A1
公开(公告)日：2007-07-26
申请号：US11336726
申请日：2006-01-20
申请人： Ali Afzali-Ardakani , Stephen Gates , Alfred Grill , Deborah Neumayer , Son Nguyen , Vishnubhai Patel
发明人： Ali Afzali-Ardakani , Stephen Gates , Alfred Grill , Deborah Neumayer , Son Nguyen , Vishnubhai Patel
IPC分类号： H01L21/469 , H01L23/58
CPC分类号： H01L21/31695 , C23C16/401 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/02348 , H01L21/02362 , H01L21/7682 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L23/5329 , H01L23/53295 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： A porous composite material useful in semiconductor device manufacturing, in which the diameter (or characteristic dimension) of the pores and the pore size distribution (PSD) is controlled in a nanoscale manner and which exhibits improved cohesive strength (or equivalently, improved fracture toughness or reduced brittleness), and increased resistance to water degradation of properties such as stress-corrosion cracking, Cu ingress, and other critical properties is provided. The porous composite material is fabricating utilizing at least one bifunctional organic porogen as a precursor compound
摘要翻译：可用于半导体器件制造的多孔复合材料，其中孔的直径（或特征尺寸）和孔径分布（PSD）以纳米级方式进行控制，并且其表现出改进的内聚强度（或等效地提高的断裂韧性或降低脆性），并且提供了诸如应力腐蚀开裂，Cu进入和其它关键性能等性能的降低的耐水分性。多孔复合材料是利用至少一种双功能有机致孔剂作为前体化合物制造的

69. 发明申请

US20060165891A1 SiCOH dielectric material with improved toughness and improved Si-C bonding, semiconductor device containing the same, and method to make the same 失效
标题翻译： SiCOH介电材料具有改善的韧性和改善的Si-C键合，含有其的半导体器件及其制造方法
公开(公告)号：US20060165891A1
公开(公告)日：2006-07-27
申请号：US11132108
申请日：2005-05-18
申请人： Daniel Edelstein , Stephen Gates , Alfred Grill , Michael Lane , Qinghuang Lin , Robert Miller , Deborah Neumayer , Son Nguyen
发明人： Daniel Edelstein , Stephen Gates , Alfred Grill , Michael Lane , Qinghuang Lin , Robert Miller , Deborah Neumayer , Son Nguyen
IPC分类号： C23C16/00 , B05D3/00
CPC分类号： H01L31/103 , Y10T428/31663
摘要： A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC═CH, C≡CH2, C≡C or a [S]n linkage, where n is a defined above.
摘要翻译：提供了一种用于包括互连和感测结构的电子结构中具有增强的内聚强度的低k介电材料，其包括Si，C，O和H的原子，其中C原子的一部分键合为Si-CH _{3个官能团，另外一部分C原子键合为Si-R-Si，其中R是苯基， - [CH 2 N] - 其中n大于或等于1，HC-CH，C≡CH2，C≡C或[S] n N连接，其中n是定义的以上。}

70. 发明授权

US07038277B2 Transferable device-containing layer for silicon-on-insulator applications 失效
公开(公告)号：US07038277B2
公开(公告)日：2006-05-02
申请号：US10826712
申请日：2004-04-16
申请人： Jack Oon Chu , Alfred Grill , Dean A. Herman, Jr. , Katherine L. Saenger
发明人： Jack Oon Chu , Alfred Grill , Dean A. Herman, Jr. , Katherine L. Saenger
IPC分类号： H01L27/01
CPC分类号： H01L27/1203 , H01L21/76259
摘要： A method for forming an integrated circuit on an insulating substrate is described comprising the steps of forming a semiconductor layer on a seed wafer substrate containing an at least partially crystalline porous release layer, processing the semiconductor layer to form a “transferable” device layer containing at least one semiconductor device, and bonding said transferable device layer to a final, insulating substrate before or after separating said device layer from the seed wafer substrate. A second method, for separating a semiconductor layer from a seed wafer substrate, is described wherein an at least partially crystalline porous layer initially connecting the semiconductor layer and seed wafer substrate is split or broken apart by the steps of (i) introducing a fluid including water into the pores of said porous layer, and (ii) expanding said fluid by solidifying or freezing to break apart the porous layer. The at least partially crystalline porous layer may incorporate at least one porous silicon germanium alloy layer alone or in combination with at least one porous Si layer. Also described is an integrated circuit comprising the transfered device layer described above.

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