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    • 63. 发明申请
    • Non-volatile memory devices including dummy word lines and related structures and methods
    • 包括虚拟字线和相关结构和方法的非易失性存储器件
    • US20080013377A1
    • 2008-01-17
    • US11729169
    • 2007-03-28
    • Jong-Sun SelJung-Dal ChoiYoung-Woo ParkJin-Taek Park
    • Jong-Sun SelJung-Dal ChoiYoung-Woo ParkJin-Taek Park
    • G11C16/04
    • G11C16/0483G11C16/3427
    • A non-volatile memory device may include a semiconductor substrate including an active region at a surface thereof, a first memory cell string on the active region, and a second memory cell string on the active region. The first memory cell string may include a first plurality of word lines crossing the active region between a first ground select line and a first string select line, and about a same first spacing may be provided between adjacent ones of the first plurality of word lines. The second memory cell string may include a second plurality of word lines crossing the active region between a second ground select line and a second string select line, and about the same first spacing may be provided between adjacent ones of the second plurality of word lines. Moreover, the first ground select line may be between the second ground select line and the first plurality of word lines, and the second ground select line may be between the first ground select line and the second plurality of word lines. Moreover, portions of the active region between the first and second ground select lines may be free of word lines, and a second spacing between the first and second ground select lines may be at least about 3 times greater than the first spacing. Related methods are also discussed.
    • 非易失性存储器件可以包括半导体衬底,其包括其表面处的有源区,有源区上的第一存储单元串和有源区上的第二存储单元串。 第一存储单元串可以包括与第一地选择线和第一串选择线之间的有源区域交叉的第一多个字线,并且可以在第一多个字线中相邻的字线之间提供约相同的第一间隔。 第二存储单元串可以包括与第二接地选择线和第二串选择线之间的有源区域交叉的第二多个字线,并且可以在相邻的第二多个字线之间提供约相同的第一间隔。 此外,第一接地选择线可以在第二接地选择线和第一多个字线之间,并且第二接地选择线可以在第一接地选择线和第二多个字线之间。 此外,第一和第二接地选择线之间的有源区域的部分可以没有字线,并且第一和第二接地选择线之间的第二间隔可以比第一间隔大至少约3倍。 还讨论了相关方法。
    • 65. 发明申请
    • Zoom lens
    • 变焦镜头
    • US20050105192A1
    • 2005-05-19
    • US10989591
    • 2004-11-16
    • Young-Woo Park
    • Young-Woo Park
    • G02B15/16G02B15/177G02B15/14
    • G02B15/177
    • The present invention is directed to a zoom lens which includes, in order from an object side: a first lens group having a negative refractive power; a second lens group having a positive refractive power; and a third lens group having a positive refractive power. While zooming from a wide-angle position to a telephoto position, the distance between the third lens group and an image side is greater at the wide-angle position than at the telephoto position. The zoom lens satisfies the following conditional expression: 1.0 ≤ L II f W ⁢ f T ≤ 1.5 where fW denotes the total focal length at the wide-angle position; fT denotes the total focal length at the telephoto position; and LII denotes the moving distance of the second lens group from the wide-angle position to the telephoto position.
    • 本发明涉及一种变焦透镜,其从物体侧依次包括具有负屈光力的第一透镜组; 具有正屈光力的第二透镜组; 以及具有正屈光力的第三透镜组。 当从广角位置变焦到远摄位置时,第三透镜​​组和像侧之间的距离在广角位置比在远摄位置处更大。 变焦镜头满足以下条件表达式: 1.0 <= 表示在宽范围内的总焦距, 角度位置 f 表示在远摄位置的总焦距; L II表示第二透镜组从广角位置到远摄位置的移动距离。
        • 66. 发明授权
        • Compact zoom lens system
        • 小型变焦镜头系统
        • US06710934B2
        • 2004-03-23
        • US10244446
        • 2002-09-17
        • Young-Woo Park
        • Young-Woo Park
        • G02B1514
        • G02B15/177
        • Disclosed is a zoom lens system. The zoom lens system comprises: a first lens group of a negative refractive power, the first lens group comprising at least one lens of a negative refractive power and at least one lens of a positive refractive power, a second lens group of a positive refractive power, the second lens group comprising a first lens of a positive refractive power, a second lens of a positive refractive power, and a third lens of a negative refractive power; and a third lens group of a positive refractive power, the third lens group comprising at least one lens of a positive refractive power; where the first, the second, and the third lens groups move along an optical axis, and the zoom lens system satisfies the following conditions: .4 ≤ t II f W ⁢ f T ≤ .6 and 2.8 ≤ f T f W ≤ 3.0 , where fw represents a total focal length at a wide-angle position; ft represents a total focal length at a telephoto position; and tII represents a total thickness of the second lens group.
        • 公开了一种变焦透镜系统。 变焦透镜系统包括:负折射光焦度的第一透镜组,第一透镜组包括至少一个具有负折射光焦度的透镜和至少一个具有正折光力的透镜,第二透镜组具有正折光力 所述第二透镜组包括正折光力的第一透镜,正折射光焦度的第二透镜和负折射光焦度的第三透镜; 和具有正屈光力的第三透镜组,所述第三透镜组包括至少一个具有正折光力的透镜; 其中第一透镜组和第三透镜组沿着光轴移动,并且变焦透镜系统满足以下条件:其中fw表示广角位置处的总焦距; ft表示长焦位置处的总焦距; 而tII表示第二透镜组的总厚度。
        • 68. 发明授权
        • Semiconductor device capable of preventing moisture-absorption of fuse area thereof
        • 能够防止其保险丝区域的吸湿的半导体装置
        • US06525398B1
        • 2003-02-25
        • US09650967
        • 2000-08-29
        • Byung-yoon KimWon-seong LeeYoung-woo Park
        • Byung-yoon KimWon-seong LeeYoung-woo Park
        • H01L2900
        • H01L23/564H01L21/768H01L23/5258H01L23/585H01L27/10814H01L27/10894H01L27/11H01L2924/0002Y10S257/906Y10S257/907Y10S257/908H01L2924/00
        • A fuse area of a semiconductor device capable of preventing moisture-absorption and a method for manufacturing the fuse area are provided. When forming a guard ring for preventing permeation of moisture through the sidewall of an exposed fuse opening portion, an etch stop layer is formed over a fuse line. A guard ring opening portion is formed using the etch stop layer. The guard ring opening portion is filled with a material for forming the uppermost wiring of multi-level interconnect wirings or the material of a passivation layer, thereby forming the guard ring concurrently with the uppermost interconnect wiring or the passivation layer. Accordingly, permeation of moisture through an interlayer insulating layer or the interface between interlayer insulating layers around the fuse opening portion can be efficiently prevented by a simple process. In addition, the etch stop layer is also formed under the fuse opening portion so that an insulating layer remaining on the fuse line can be controlled to have a predetermined thickness when forming the fuse opening portion, thereby improving the cutting efficiency of fuses.
        • 提供了能够防止吸湿的半导体器件的保险丝区域和制造保险丝区域的方法。 当形成用于防止湿气透过露出的保险丝开口部分的侧壁的保护环时,在熔丝线上形成蚀刻停止层。 使用蚀刻停止层形成防护环开口部。 保护环开口部分填充有用于形成多层互连布线的最上布线或钝化层的材料的材料,从而与最上面的布线或钝化层同时形成保护环。 因此,可以通过简单的工艺有效地防止湿气渗透到层间绝缘层或熔断器开口部周围的层间绝缘层之间的界面。 另外,在保险丝开口部分也形成有蚀刻停止层,使得在形成保险丝开口部分时,保留在熔丝线上的绝缘层可以被控制为具有预定的厚度,从而提高了保险丝的切割效率。
        • 70. 发明授权
        • Methods of forming field oxide isolation regions with reduced
susceptibility to polysilicon residue defects
        • 形成具有降低的多晶硅残留缺陷易感性的场氧化物隔离区的方法
        • US5837595A
        • 1998-11-17
        • US785999
        • 1997-01-21
        • Dong-ho AhnMin-wook HwangYoung-woo Park
        • Dong-ho AhnMin-wook HwangYoung-woo Park
        • H01L21/316H01L21/76H01L21/762
        • H01L21/76205
        • Methods of forming field oxide isolation regions in a semiconductor substrate include the steps of exposing residual polysilicon defects contained within preliminary field oxide isolation regions and then performing a cleaning step to etch and reduce the size of the exposed defects (or eliminate the defects altogether). The preliminary field oxide isolation regions are then oxidized to preferably convert any remaining polysilicon defects into silicon dioxide and then a final oxide etching step is performed to define the shapes of the final field oxide isolation regions. Preferably, a pad oxide layer is formed on a face of a semiconductor substrate and then a masking layer is formed on the pad oxide layer, opposite the face of the substrate. The masking layer is then patterned to define an opening therein which exposes an upper surface of the pad oxide layer. An isotropic etching step is then performed on the pad oxide layer at the exposed upper surface thereof using the patterned masking layer as an etching mask. Polysilicon sidewall spacers are then formed in the opening at the sidewalls of the patterned masking layer. The portion of the substrate extending opposite the opening is then oxidized along with the polysilicon sidewall spacers to thereby define a preliminary field oxide isolation region which potentially contains residues of polycrystalline silicon therein which have not been fully oxidized. The preliminary field oxide isolation region is etched to expose the polysilicon residues. The exposed polysilicon residues are then etched in a cleaning solution to reduce their size and then an oxidation step is performed to convert any remaining portions of the polysilicon residues to silicon dioxide. Finally, the preliminary field oxide isolation region is etched to define a final field oxide isolation region on an electrically inactive portion of the substrate.
        • 在半导体衬底中形成场氧化物隔离区域的方法包括以下步骤:将包含在预备场氧化物隔离区域内的残留多晶硅缺陷曝光,然后执行清洁步骤以蚀刻并减小暴露缺陷的尺寸(或完全消除缺陷)。 然后氧化初步场氧化物隔离区域以优选将任何剩余的多晶硅缺陷转化为二氧化硅,然后执行最终的氧化物蚀刻步骤以限定最后的场氧化物隔离区域的形状。 优选地,在半导体衬底的表面上形成衬垫氧化物层,然后在衬底氧化物层上形成与衬底的表面相对的掩模层。 然后对掩模层进行图案化以限定其中暴露氧化层的上表面的开口。 然后使用图案化掩模层作为蚀刻掩模,在其暴露的上表面上的焊盘氧化物层上进行各向同性蚀刻步骤。 然后在图案化掩模层的侧壁处的开口中形成多晶硅侧壁间隔物。 然后与开口相对延伸的衬底的部分与多晶硅侧壁间隔物一起被氧化,从而限定潜在地包含尚未完全氧化的多晶硅残留物的预备场氧化物隔离区。 蚀刻初步场氧化物隔离区以暴露多晶硅残渣。 然后将暴露的多晶硅残余物在清洁溶液中蚀刻以减小其尺寸,然后执行氧化步骤以将多余残余物的任何剩余部分转化为二氧化硅。 最后,蚀刻初步场氧化物隔离区以在衬底的电不活泼部分上限定最终的场氧化物隔离区。