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61. 发明申请

US20090186591A1 RECEIVER 审中-公开
标题翻译：接收器
公开(公告)号：US20090186591A1
公开(公告)日：2009-07-23
申请号：US12355104
申请日：2009-01-16
申请人： Takeshi Ikeda , Hiroshi Miyagi , Akira Okamoto
发明人： Takeshi Ikeda , Hiroshi Miyagi , Akira Okamoto
IPC分类号： H04B1/16
CPC分类号： H04B1/28 , H04B1/0007
摘要： In a mixer circuit 6 connected in common to output sides of an LNA 2 for FM receiving and an LNA 4 for AM receiving, each of a radiofrequency signal output from the LNA 2 for FM receiving and a radiofrequency signal output from the LNA 4 for AM receiving is frequency-converted into an intermediate frequency signal of a lower intermediate frequency for AM broadcast waves. In this way, receiving of an FM broadcast is performed by a low IF system and receiving of an AM broadcast is performed by a single conversion system; the need for separately providing a mixer circuit, a local oscillation circuit and an IF filter for down-mixing of AM broadcast waves is eliminated.
摘要翻译：在共同连接到用于FM接收的LNA2的输出侧和用于AM接收的LNA 4的混频器电路6中，从用于FM接收的LNA2输出的射频信号和从LNA 4输出的用于AM的射频信号接收被频率转换成AM广播波的较低中频的中频信号。以这种方式，通过低IF系统执行FM广播的接收，并且通过单个转换系统执行AM广播的接收; 消除了分别提供混频器电路，本地振荡电路和用于AM广播波的下混合的IF滤波器的需要。

62. 发明授权

US07551906B2 AM/FM radio receiver and local oscillator circuit used therein 失效
标题翻译： AM / FM无线电接收机和其中使用的本地振荡器电路
公开(公告)号：US07551906B2
公开(公告)日：2009-06-23
申请号：US11383087
申请日：2006-05-12
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H04B1/18 , H04B7/00
CPC分类号： H03J5/242 , H03J5/0245 , H03J2200/10 , H03L7/07 , H03L7/181
摘要： A couple of frequency doubler circuits 21 and 22 which multiplys a frequency of a reference oscillation signal outputted from a reference oscillator 12 is provided, thereby a frequency of a reference oscillation signal, as the greatest common divisor between a frequency (300 KHz) determined by multiplying the frequency (fx=75 KHz) of a crystal oscillator 11 by four and a frequency (54 KHz) determined by multiplying an assigned frequency per one channel in AM radio broadcasting by a prescribed divide ratio, can be higher than a conventional frequency. This way realizes the decrease of a divide ratio in a programmable counter 17, resulting in the reduction of the circuit scale, shortening of the lock-up time, and improvement of the S/N ratio.
摘要翻译：提供了一个倍增电路21和22，它们乘以基准振荡器12输出的基准振荡信号的频率，从而提供参考振荡信号的频率，作为由（...）确定的频率（300KHz）之间的最大公约数将晶体振荡器11的频率（fx = 75KHz）乘以4，通过将AM无线电广播中的每个信道的分配频率乘以规定的分频比而确定的频率（54KHz）可以高于常规频率。这样可以实现可编程计数器17中的分频比的减小，导致电路规模的缩小，锁定时间的缩短以及S / N比的提高。

63. 发明申请

US20080311872A1 Broadcast Signal Receiving Apparatus 审中-公开
标题翻译：广播信号接收装置
公开(公告)号：US20080311872A1
公开(公告)日：2008-12-18
申请号：US12280095
申请日：2006-09-28
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H04B1/16
CPC分类号： H04B1/18 , H03H11/1252 , H03H11/1291 , H03J3/185
摘要： An LNA (2) is directly connected to a loop antenna (1), and a variable BPF (3), the passed frequency band of which is adapted to be variable, is connected in a stage following the LNA (2). In this way, the variable BPF (3) is used to configure a variable tuning circuit exhibiting a high Q-value without using any impedance conversion transformer between the loop antenna (1) and the LNA (2), whereby almost all of the constituent elements of the tuner part can be integrated in an IC chip (10) and further the variable tuning can maintain an excellent selectivity of a target frequency.
摘要翻译： LNA（2）直接连接到环形天线（1），并且其通过的频带适于可变的可变BPF（3）在LNA（2）之后的阶段连接。以这种方式，变量BPF（3）用于配置呈现高Q值的可变调谐电路，而不在环形天线（1）和LNA（2）之间使用任何阻抗转换变压器，由此几乎所有成分调谐器部件的元件可以集成在IC芯片（10）中，并且进一步可变调谐可以保持目标频率的优异选择性。

64. 发明授权

US07443240B2 AM intermediate frequency variable gain amplifier circuit, variable gain amplifier circuit and its semiconductor integrated circuit 失效
标题翻译： AM中频可变增益放大器电路，可变增益放大器电路及其半导体集成电路
公开(公告)号：US07443240B2
公开(公告)日：2008-10-28
申请号：US10580167
申请日：2004-11-11
申请人： Hiroshi Katsunaga , Hiroshi Miyagi
发明人： Hiroshi Katsunaga , Hiroshi Miyagi
IPC分类号： H03F3/45
CPC分类号： H03G1/007 , H03G1/0029
摘要： It is an object of the present invention to provide a variable gain amplifier circuit operable with a low power supply voltage and with less noise generated inside the circuit. In the variable gain amplifier circuit, a third MOS transistor is connected between the respective sources of two MOS transistors constituting a differential amplifier circuit and to the gate of the third MOS transistor, and a DC bias voltage for operating the third MOS transistor in a non-saturated region is supplied. If the output voltage of an AM intermediate frequency variable gain amplifier circuit increases, a control voltage for reducing the resistance between the source and drain of the third MOS transistor is applied to reduce the gain of the AM intermediate frequency variable gain amplifier circuit.
摘要翻译：本发明的一个目的是提供一种可变增益放大器电路，其可以以低电源电压工作并且在电路内部产生更少的噪声。在可变增益放大器电路中，第三MOS晶体管连接在构成差分放大器电路的两个MOS晶体管的各个源极和第三MOS晶体管的栅极之间，以及用于以非非晶体管驱动第三MOS晶体管的DC偏压，提供饱和区域。如果AM中频可变增益放大器电路的输出电压增加，则施加用于降低第三MOS晶体管的源极和漏极之间的电阻的控制电压，以降低AM中频可变增益放大器电路的增益。

65. 发明申请

US20070170946A1 Pilot signal detection circuit and semiconductor integrated circuit equipping the circuit 审中-公开
标题翻译：导频信号检测电路和半导体集成电路配备电路
公开(公告)号：US20070170946A1
公开(公告)日：2007-07-26
申请号：US10591880
申请日：2005-02-22
申请人： Masaaki Kato , Hiroshi Miyagi
发明人： Masaaki Kato , Hiroshi Miyagi
IPC分类号： G01R31/26
CPC分类号： H04B1/1653 , H03F3/189 , H03F3/45192 , H03F3/45753 , H03F2203/45212 , H03F2203/45424 , H03F2203/45521
摘要： The purpose of the present invention is to improve a detection accuracy of a pilot signal detection circuit. A pilot detection signal voltage is input to a differential amplifier circuit 16 and a reference voltage generated by a reference signal generation circuit 17 is input to a differential amplifier circuit 19. A pilot signal is compared with the reference voltage by the differential amplifier circuits 16 and 19. Output currents of the differential amplifier circuits 16 and 19 are converted into voltages by a current-to-voltage conversion circuit 21. And an input to the current-to-voltage conversion circuit 21 is fed back with a voltage proportionate with an offset voltage of the circuit and the offset voltage of the pilot signal detection circuit is cancelled.
摘要翻译：本发明的目的是提高导频信号检测电路的检测精度。导频检测信号电压被输入到差分放大电路16，由参考信号发生电路17产生的参考电压被输入到差分放大电路19.导频信号与差分放大电路16和 19。差分放大电路16和19的输出电流由电流 - 电压转换电路21转换成电压。并且，向电流 - 电压转换电路21的输入端以与电路的偏移电压成比例的电压反馈，导频信号检测电路的偏移电压被取消。

66. 发明申请

US20060278909A1 Mis transistor and cmos transistor 审中-公开
标题翻译：误差晶体管和cmos晶体管
公开(公告)号：US20060278909A1
公开(公告)日：2006-12-14
申请号：US10560706
申请日：2004-06-11
申请人： Takefumi Nishimuta , Hiroshi Miyagi , Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto
发明人： Takefumi Nishimuta , Hiroshi Miyagi , Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto
IPC分类号： H01L29/94
CPC分类号： H01L29/7851 , H01L21/823807 , H01L21/823821 , H01L21/82385 , H01L29/045
摘要： A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate (702, 910) comprising a projecting part (704, 910B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (708, 920B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (706, 930B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region (710a, 710b, 910c, 910d) formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.
摘要翻译：形成在半导体衬底上的MIS晶体管被认为包括半导体衬底（702,910），该半导体衬底包括在主平面上的表面上具有至少两个不同晶面的突出部分（704,910B），栅极绝缘体 708,920B），用于覆盖构成突出部分的表面的所述至少两个不同晶面的每一个的至少一部分;栅电极（706,930B），包括在所述至少两个不同晶面中的每一个上构成突出部分的表面，其将栅极绝缘体与所述至少两个不同的平面夹住，并且形成在突出部分中的单个导电型扩散区域（710a，710b，910c，910d）所述至少两个不同的晶面并且分别形成在所述栅电极的两侧。这种配置允许控制元件面积的增加和通道宽度的增加。

67. 发明申请

US20060217094A1 Automatic gain control device 失效
标题翻译：自动增益控制装置
公开(公告)号：US20060217094A1
公开(公告)日：2006-09-28
申请号：US11441055
申请日：2006-05-26
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H04B17/02
CPC分类号： H03G3/3052
摘要： A received signal level is detected in each of a wide band, middle band, and narrow band and each detected signal is converted to a digital signal. A DSP 18 determines the enabled/disabled state of an LNA 3 and an attenuator 4 as well as a gain adjustment amount based on the signal level of each band. For example, the gain adjustment is not performed when the signal level of the narrow band including a desired frequency is not larger than a prescribed value even the signal level of the wide band or middle band is larger than a prescribed value. When the signal level of the narrow band is larger than the prescribed value exceeding a gain adjustable limit level in the attenuator 4, the gain of the LNA 3 is adjusted, while maintaining the gain adjustable amount in the attenuator 4 around the limit level, to reduce the gain as a whole.
摘要翻译：在宽带，中频带和窄带中的每一个中检测到接收信号电平，并且将每个检测信号转换为数字信号。 DSP18根据每个频带的信号电平确定LNA 3和衰减器4的使能/禁止状态以及增益调整量。例如，即使宽带或中频带的信号电平大于规定值，当包含期望频率的窄带的信号电平不大于规定值时，也不进行增益调整。当窄带的信号电平大于衰减器4中超过增益可调极限电平的规定值时，调节LNA 3的增益，同时将衰减器4中的增益可调量保持在限制电平附近，至减少整体收益。

68. 发明申请

US20060199555A1 AM/FM RADIO RECEIVER AND LOCAL OSCILLATOR CIRCUIT USED THEREIN 失效
标题翻译： AM / FM无线电接收器和本地振荡器电路
公开(公告)号：US20060199555A1
公开(公告)日：2006-09-07
申请号：US11383087
申请日：2006-05-12
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H04B1/18 , H04B1/06
CPC分类号： H03J5/242 , H03J5/0245 , H03J2200/10 , H03L7/07 , H03L7/181
摘要： A couple of frequency doubler circuits 21 and 22 which multiplys a frequency of a reference oscillation signal outputted from a reference oscillator 12 is provided, thereby a frequency of a reference oscillation signal, as the greatest common divisor between a frequency (300 KHz) determined by multiplying the frequency (fx=75 KHz) of a crystal oscillator 11 by four and a frequency (54 KHz) determined by multiplying an assigned frequency per one channel in AM radio broadcasting by a prescribed divide ratio, can be higher than a conventional frequency. This way realizes the decrease of a divide ratio in a programmable counter 17, resulting in the reduction of the circuit scale, shortening of the lock-up time, and improvement of the S/N ratio.
摘要翻译：提供了一个倍增电路21和22，它们乘以基准振荡器12输出的基准振荡信号的频率，从而提供参考振荡信号的频率，作为由（...）确定的频率（300KHz）之间的最大公约数将晶体振荡器11的频率（fx = 75KHz）乘以4，通过将AM无线电广播中的每个信道的分配频率乘以规定的分频比而确定的频率（54KHz）可以高于常规频率。这样可以实现可编程计数器17中的分频比的减小，导致电路规模的缩小，锁定时间的缩短以及S / N比的提高。

69. 发明申请

US20060138476A1 Dc amplifier and semiconductor integrated circuit therefor 审中-公开
标题翻译： Dc放大器及其半导体集成电路
公开(公告)号：US20060138476A1
公开(公告)日：2006-06-29
申请号：US10560704
申请日：2004-06-11
申请人： Takefumi Nishimuta , Hiroshi Miyagi , Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto
发明人： Takefumi Nishimuta , Hiroshi Miyagi , Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto
IPC分类号： H01L29/76
CPC分类号： H01L29/7851 , H01L21/823807 , H01L21/82385 , H01L27/092 , H01L29/66795 , H03F3/343 , H03F3/45183 , H03F2200/372
摘要： A rectangular parallelepiped projecting portion 21 having a height of HB and a width of WB is formed on a silicon substrate, and a gate oxide film is formed on a part of the top surface and the side surface of the projecting portion 21. A source and a drain are formed on both sides of the gate electrode 26 to form a MOS transistor. The MOS transistor configures a DC amplifier. The DC amplifier includes a differential amplification circuit having MOS transistors 61 and 62, thereby realizing a high-gain DC amplifier.
摘要翻译：在硅衬底上形成具有H B B高度和W B B的宽度的长方体的突出部分21，并且栅极氧化膜形成在突出部分21的顶表面和侧表面。源极和漏极形成在栅电极26的两侧以形成MOS晶体管。 MOS晶体管配置一个直流放大器。 DC放大器包括具有MOS晶体管61和62的差分放大电路，从而实现高增益DC放大器。

70. 发明申请

US20060035612A1 Receiver 审中-公开
标题翻译：接收器
公开(公告)号：US20060035612A1
公开(公告)日：2006-02-16
申请号：US10533358
申请日：2003-10-14
申请人： Hiroshi Miyagi , Tsuyoshi Koike
发明人： Hiroshi Miyagi , Tsuyoshi Koike
IPC分类号： H04B17/00
CPC分类号： H04B17/20
摘要： There is provided a receiver not requiring a complicated connection for an operation test and capable of reducing the test time and simplifying the device configuration. An output signal of an oscillator 21 used for generating a reference signal input to a PLL circuit 20 connected to a local oscillator 13 is divided by a divider 24 to generate a test signal contained in a reception band of the AM broadcast. This test signal is input via a switch 25 to a high frequency amplification circuit 11 and an intermediate frequency signal for this test signal is input to a level detector 30. When the AM receiver operates normally, the output of a voltage comparator 31 becomes high level.
摘要翻译：提供了不需要用于操作测试的复杂连接并且能够减少测试时间并简化设备配置的接收器。用于产生输入到连接到本地振荡器13的PLL电路20的参考信号的振荡器21的输出信号由分频器24分频，以产生包含在AM广播的接收频带中的测试信号。该测试信号通过开关25输入到高频放大电路11，该测试信号的中频信号被输入到电平检测器30。当AM接收器正常工作时，电压比较器31的输出变为高电平。

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