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51. 发明授权

US09503039B2 Trimming method for current sense amplifiers 有权
标题翻译：电流检测放大器的微调方法
公开(公告)号：US09503039B2
公开(公告)日：2016-11-22
申请号：US14967529
申请日：2015-12-14
申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
发明人： Razvan Puscasu , Cornel D. Stanescu , Laurentiu O. Creosteanu , Pavel Brinzoi
IPC分类号： H03F3/45 , H03F3/21 , H03F1/52 , H03F1/02
CPC分类号： H03F3/45748 , G01R1/203 , G01R19/0092 , H03F1/0205 , H03F1/523 , H03F3/211 , H03F3/45 , H03F3/45179 , H03F3/45273 , H03F3/45381 , H03F3/45479 , H03F2200/261 , H03F2200/444 , H03F2200/462 , H03F2203/45116 , H03F2203/45118 , H03F2203/45528 , H03F2203/45571 , H03F2203/45594 , H03F2203/45674
摘要： A method for adjusting common mode rejection ratio (CMRR) and gain error of a current sense (CS) amplifier, comprising: measuring a first referred to input (RTI) offset voltage while presenting a given common mode (CM) input voltage; adding a first trim resistor of a plurality of selectable trim resistors within an adjustable feedback resistor chain to a feedback electrical path; measuring a second RTI offset voltage while presenting the given CM input voltage; estimating, based upon the first and second RTI offset voltages, a third RTI offset voltage value that would result by adding a second trim resistor of the plurality of selectable trim resistors to the feedback electrical path; using the first, second and third RTI offset voltage values to identify the combination of selectable trim resistors that achieves an RTI offset voltage closest to zero volts; and adding the identified selectable trim resistors to the feedback electrical path.
摘要翻译：一种用于调节电流检测（CS）放大器的共模抑制比（CMRR）和增益误差的方法，包括：在呈现给定共模（CM）输入电压的同时测量第一参考输入（RTI）偏移电压; 将多个可选修整电阻器的第一微调电阻器添加到可调反馈电阻器链中到反馈电路径; 在呈现给定CM输入电压的同时测量第二RTI偏移电压; 基于所述第一和第二RTI偏移电压估计将通过将所述多个可选修整电阻器的第二调整电阻器添加到所述反馈电路径而产生的第三RTI偏移电压值; 使用第一，第二和第三RTI偏移电压值来识别实现最接近零伏的RTI偏移电压的可选择的微调电阻器的组合; 并将所识别的可选修整电阻器添加到反馈电路径。

52. 发明授权

US09496835B2 Current sense amplifer with extended common mode input voltage range 有权
标题翻译：具有扩展共模输入电压范围的电流检测放大器
公开(公告)号：US09496835B2
公开(公告)日：2016-11-15
申请号：US14668809
申请日：2015-03-25
申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
发明人： Laurentiu O. Creosteanu , Razvan Puscasu , Pavel Brinzoi , Nicusor Bortun
IPC分类号： H03F3/45 , H03F3/21 , H03F1/52 , H03F1/02
CPC分类号： H03F3/45748 , G01R1/203 , G01R19/0092 , H03F1/0205 , H03F1/523 , H03F3/211 , H03F3/45 , H03F3/45179 , H03F3/45273 , H03F3/45381 , H03F3/45479 , H03F2200/261 , H03F2200/444 , H03F2200/462 , H03F2203/45116 , H03F2203/45118 , H03F2203/45528 , H03F2203/45571 , H03F2203/45594 , H03F2203/45674
摘要： Current sense amplifiers with extended input common mode (CM) voltage range, including an extended CM input voltage amplifier that includes a low voltage (LV) p-type metal oxide semiconductor (PMOS) input module coupled to a positive supply rail, wherein said supply rail provides a voltage that is the maximum between a positive input signal (IN+) applied to the amplifier and an internal power supply voltage. The amplifier further includes a voltage regulator coupled to the supply rail that generates a decreased voltage level relative to the supply rail voltage that is provided to the LV PMOS input module via a high voltage ground (HV_GND) line. At least part of the LV PMOS input module is powered by a voltage difference between the positive supply rail and the HV_GND line. The voltage regulator maintains said voltage difference within an operating range of LV devices within the LV PMOS input module.
摘要翻译：具有扩展输入共模（CM）电压范围的电流检测放大器，包括扩展CM输入电压放大器，其包括耦合到正电源轨的低电压（LV）p型金属氧化物半导体（PMOS）输入模块，其中所述电源轨道提供在施加到放大器的正输入信号（IN +）和内部电源电压之间的最大值的电压。放大器还包括耦合到电源轨的电压调节器，其相对于经由高压地（HV_GND）线提供给LVPOS输入模块的电源轨电压产生降低的电压电平。至少部分LV PMOS输入模块由正电源轨和HV_GND线之间的电压差供电。电压调节器将所述电压差保持在LV PMOS输入模块内的LV器件的工作范围内。

53. 发明申请

US20160173037A1 TRIMMING METHOD FOR CURRENT SENSE AMPLIFIERS 有权
标题翻译：电流检测放大器的测量方法
公开(公告)号：US20160173037A1
公开(公告)日：2016-06-16
申请号：US14967529
申请日：2015-12-14
申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
发明人： Razvan PUSCASU , Cornel D. STANESCU , Laurentiu O. CREOSTEANU , Pavel BRINZOI
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F3/45748 , G01R1/203 , G01R19/0092 , H03F1/0205 , H03F1/523 , H03F3/211 , H03F3/45 , H03F3/45179 , H03F3/45273 , H03F3/45381 , H03F3/45479 , H03F2200/261 , H03F2200/444 , H03F2200/462 , H03F2203/45116 , H03F2203/45118 , H03F2203/45528 , H03F2203/45571 , H03F2203/45594 , H03F2203/45674
摘要： A method for adjusting common mode rejection ratio (CMRR) and gain error of a current sense (CS) amplifier, comprising: measuring a first referred to input (RTI) offset voltage while presenting a given common mode (CM) input voltage; adding a first trim resistor of a plurality of selectable trim resistors within an adjustable feedback resistor chain to a feedback electrical path; measuring a second RTI offset voltage while presenting the given CM input voltage; estimating, based upon the first and second RTI offset voltages, a third RTI offset voltage value that would result by adding a second trim resistor of the plurality of selectable trim resistors to the feedback electrical path; using the first, second and third RTI offset voltage values to identify the combination of selectable trim resistors that achieves an RTI offset voltage closest to zero volts; and adding the identified selectable trim resistors to the feedback electrical path.
摘要翻译：一种用于调节电流检测（CS）放大器的共模抑制比（CMRR）和增益误差的方法，包括：在呈现给定共模（CM）输入电压的同时测量第一参考输入（RTI）偏移电压; 将多个可选修整电阻器的第一微调电阻器添加到可调反馈电阻器链中到反馈电路径; 在呈现给定CM输入电压的同时测量第二RTI偏移电压; 基于所述第一和第二RTI偏移电压估计将通过将所述多个可选修整电阻器的第二调整电阻器添加到所述反馈电路径而产生的第三RTI偏移电压值; 使用第一，第二和第三RTI偏移电压值来识别实现最接近零伏的RTI偏移电压的可选择的微调电阻器的组合; 并将所识别的可选修整电阻器添加到反馈电路径。

54. 发明授权

US09203364B2 DC offset canceller 有权
标题翻译：直流偏移消除器
公开(公告)号：US09203364B2
公开(公告)日：2015-12-01
申请号：US14574052
申请日：2014-12-17
申请人： Panasonic Corporation
发明人： Takayuki Abe , Koji Imamura , Kazutoshi Satou , Shigeki Nakamura
IPC分类号： H03F3/45 , H03F1/02
CPC分类号： H03F3/45071 , H03F1/0233 , H03F3/45179 , H03F3/45475 , H03F3/45748 , H03F3/45973 , H03F2200/513 , H03F2203/45101 , H03F2203/45112 , H03F2203/45212
摘要： Two LPFs are disposed on the output side of a differential amplifier to remove an AC component contained in an output signal output from a first output terminal of the differential amplifier and an AC component contained in an output signal output from a second output terminal of the differential amplifier. The lowpass filter voltage of the output signal output from the first output terminal with the AC component removed is input to one of input terminals of one of two comparators, and the lowpass filter voltage of the output signal output from the second output terminal with the AC component removed is input to one of input terminals of the other comparator.
摘要翻译：两个LPF设置在差分放大器的输出侧，以去除包含在从差分放大器的第一输出端输出的输出信号中的AC分量，以及包含在从差分放大器的第二输出端输出的输出信号中的AC分量放大器从去除了交流分量的第一输出端子输出的输出信号的低通滤波器电压输入到两个比较器之一的一个输入端子，并且从第二输出端子输出的输出信号的低通滤波器电压与AC 去除的元件被输入到另一个比较器的一个输入端。

55. 发明授权

US07903150B2 Differential amplifier circuit used in solid-state image pickup apparatus, and arrangement that avoids influence of variations of integrated circuits in manufacture and the like 有权
标题翻译：用于固态图像拾取装置的差分放大器电路，以及避免制造中的集成电路的变化的影响的装置等
公开(公告)号：US07903150B2
公开(公告)日：2011-03-08
申请号：US11123042
申请日：2005-05-06
申请人： Katsuhito Sakurai
发明人： Katsuhito Sakurai
IPC分类号： H04N5/235 , H03F3/45 , G05F1/10 , G05F3/02
CPC分类号： H03F3/45197 , H03F3/45748 , H03F2203/45356 , H03F2203/45466 , H03F2203/45504
摘要： The output terminal of a first voltage-current conversion circuit, which includes operational amplifiers and a resistor, is connected to the output terminal of a second voltage-current conversion circuit which includes operational amplifiers and a resistor, and also to the negative input terminal of the second voltage-current conversion circuit via a source follower as an impedance conversion circuit which is formed by an NMOS transistor and constant current source. Furthermore, the output terminal of the first voltage-current conversion circuit serves as the output terminal of a differential amplifier circuit. The positive-phase input terminal of the second voltage-current conversion circuit is connected to a reference voltage. Since the node of the current outputs of the first and second voltage-current conversion circuits has a high impedance, these circuits operate to equalize their output currents.
摘要翻译：包括运算放大器和电阻的第一电压 - 电流转换电路的输出端子连接到包括运算放大器和电阻器的第二电压 - 电流转换电路的输出端，并且还连接到第二电压电流转换电路经由源极跟随器作为由NMOS晶体管和恒流源形成的阻抗转换电路。此外，第一电压 - 电流转换电路的输出端子用作差分放大器电路的输出端。第二电压 - 电流转换电路的正相输入端子连接到参考电压。由于第一和第二电压 - 电流转换电路的电流输出的节点具有高阻抗，所以这些电路用于使其输出电流相等。

56. 发明授权

US07859339B2 Differential amplification circuit 有权
标题翻译：差分放大电路
公开(公告)号：US07859339B2
公开(公告)日：2010-12-28
申请号：US12285598
申请日：2008-10-09
申请人： Akira Ide
发明人： Akira Ide
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45475 , H03F3/45748 , H03F2203/45136 , H03F2203/45212 , H03F2203/45244 , H03F2203/45626 , H03F2203/45674 , H03F2203/45682 , H03F2203/45696 , H03F2203/45702 , H03F2203/45732
摘要： A differential amplification circuit is constituted of a differential transistor pair including a pair of n-channel MOS transistors whose sources are connected together, a constant current source circuit which is connected to the sources of the differential transistor pair, a current-mirror load circuit including a pair of p-channel MOS transistors whose gates are connected together, and a bias generation circuit which generates a gate bias voltage and a drain bias voltage applied to the current-mirror load circuit in such a way that the same potential is set to both the drains of the p-channel MOS transistors. Thus, it is possible to reduce the input offset voltage without reducing the margin of operation voltage and without increasing the overall chip size.
摘要翻译：差分放大电路由包括源极连接在一起的一对n沟道MOS晶体管的差分晶体管对，连接到差分晶体管对的源极的恒流源电路构成，电流镜负载电路包括其栅极连接在一起的一对p沟道MOS晶体管，以及偏置产生电路，其产生施加到电流镜负载电路的栅极偏置电压和漏极偏置电压，使得将相同的电位设置为两者 p沟道MOS晶体管的漏极。因此，可以在不降低工作电压余量的同时降低输入偏移电压，而不增加整体芯片尺寸。

57. 发明申请

US20080290940A1 DIFFERENTIAL LOW NOISE AMPLIFIER (LNA) WITH COMMON MODE FEEDBACK AND GAIN CONTROL 失效
标题翻译：具有通用模式反馈和增益控制的差分低噪声放大器（LNA）
公开(公告)号：US20080290940A1
公开(公告)日：2008-11-27
申请号：US11751491
申请日：2007-05-21
申请人： Jeremy Scuteri , Gregory Blum
发明人： Jeremy Scuteri , Gregory Blum
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F1/26 , H03F3/45475 , H03F3/45654 , H03F3/45748 , H03F2200/294 , H03F2203/45008 , H03F2203/45134 , H03F2203/45138 , H03F2203/45354 , H03F2203/45511 , H03F2203/45652 , H03F2203/45681 , H03G1/0029
摘要： A method, algorithm, architecture, circuits, and/or systems for low noise amplification are disclosed. In one embodiment, an amplifier can include an input stage, including a first differential input configured to receive a differential signal, a first current source coupled to the first differential input, a first current load receiving a first bias voltage and coupling the input stage to a first power supply, and a first pair of common mode feedback transistors, coupled to an output of the first current load and configured to limit a current to the first current source. The input stage provides an amplified signal to an additional stage having a structure similar to the input stage, configured to further amplify the amplified signal.
摘要翻译：公开了一种用于低噪声放大的方法，算法，架构，电路和/或系统。在一个实施例中，放大器可以包括输入级，包括被配置为接收差分信号的第一差分输入，耦合到第一差分输入的第一电流源，接收第一偏置电压的第一电流负载并将输入级耦合到第一电源和第一对共模反馈晶体管，耦合到第一电流负载的输出并被配置为限制电流到第一电流源。输入级将放大的信号提供给具有类似于输入级的结构的附加级，被配置为进一步放大放大的信号。

58. 发明授权

US07443234B2 Differential amplifier, digital-to-analog converter and display device 失效
标题翻译：差分放大器，数模转换器和显示设备
公开(公告)号：US07443234B2
公开(公告)日：2008-10-28
申请号：US11689340
申请日：2007-03-21
申请人： Masao Iriguchi
发明人： Masao Iriguchi
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F3/45179 , H03F3/45744 , H03F3/45748 , H03F2203/45212 , H03F2203/45536 , H03F2203/45588 , H03F2203/45616 , H03F2203/45681 , H03F2203/45726 , H03M1/0607
摘要： Disclosed are a multi-level differential amplifier that includes first to third input terminals; an output terminal; first to third differential pairs; a current source circuit for supplying currents to the respective first to mth differential pairs; a load circuit connected to first and second nodes to which first and second outputs of each of output pairs of the first to third differential pairs are connected in common; an amplifier stage receiving a signal from at least one node of the first and second nodes as an input and having its output connected to the output terminal; and a capacitance element. A data output period includes first and second periods. In the first period, responsive to a control signal, a first input of each input pair of the first to third differential pairs is made a non-inverting input, the second input is made an inverting input, the first inputs are connected to the respective first to third input terminals, and the second inputs of the first to third differential pairs are connected in common with one end of the capacitance element and with the output terminal. In the second period, responsive to a control signal, the first input of each input pair of the first to third differential pairs is made an inverting input and the second input is made a non-inverting input, the first inputs of each of the input pairs are connected in common with the output terminal, and the second inputs are connected in common with the one end of the capacitance element.
摘要翻译：公开了包括第一至第三输入端的多电平差分放大器; 输出端子; 第一到第三差分对; 电流源电路，用于向相应的第一至第m差分对提供电流; 连接到第一和第二节点的负载电路，第一至第三差分对的每个输出对的第一和第二输出共同连接到该负载电路; 放大器级接收来自第一和第二节点的至少一个节点的信号作为输入并将其输出连接到输出端; 和电容元件。数据输出周期包括第一和第二周期。在第一时段中，响应于控制信号，将第一至第三差分对的每个输入对的第一输入作为非反相输入，将第二输入作为反相输入，将第一输入连接到相应的输入第一至第三输入端子，第一至第三差分对的第二输入端与电容元件的一端和输出端子共同连接。在第二时段中，响应于控制信号，将第一至第三差分对的每个输入对的第一输入作为反相输入，将第二输入作为非反相输入，输入的每一个的第一输入对与输出端子共同连接，第二输入端与电容元件的一端共同连接。

59. 发明申请

US20080238547A1 OFFSET CANCELING CIRCUIT AND OFFSET CANCELING METHOD 有权
标题翻译：偏移取消电路和偏移取消方法
公开(公告)号：US20080238547A1
公开(公告)日：2008-10-02
申请号：US12059348
申请日：2008-03-31
申请人： Yoshitaka MATSUOKA
发明人： Yoshitaka MATSUOKA
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45748 , H03F2203/45082 , H03F2203/45212 , H03F2203/45371
摘要： An offset canceling circuit includes a differential amplifier circuit configured to output a first output signal in response to a differential input signal; a latch circuit configured to hold a second output signal determined based on the first output signal; and an offset control circuit configured to supply a reference voltage to the differential amplifier circuit to adjust an offset of the differential amplifier circuit. The second output signal is a binary signal, and the latch circuit changes a signal level of the second output signal based on the first output signal. The offset control circuit acquires the second output signal from the latch circuit for every predetermined time and updates a voltage value of the reference voltage based on the signal levels of two of the second output signals which are acquired continuously in time series.
摘要翻译：偏移消除电路包括：差分放大器电路，被配置为响应差分输入信号输出第一输出信号; 锁存电路，被配置为保持基于所述第一输出信号确定的第二输出信号; 以及偏移控制电路，被配置为向所述差分放大器电路提供参考电压以调整所述差分放大器电路的偏移。第二输出信号是二进制信号，并且锁存电路基于第一输出信号改变第二输出信号的信号电平。偏移控制电路每隔预定时间从锁存电路获取第二输出信号，并基于以时间序列连续获取的两个第二输出信号的信号电平来更新参考电压的电压值。

60. 发明授权

US07405625B1 Common-mode control structures and signal converter systems for use therewith 有权
标题翻译：共模控制结构和与其一起使用的信号转换器系统
公开(公告)号：US07405625B1
公开(公告)日：2008-07-29
申请号：US11789858
申请日：2007-04-25
申请人： Joseph Michael Hensley , Michael R. Elliott
发明人： Joseph Michael Hensley , Michael R. Elliott
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03F3/45659 , H03F3/45677 , H03F3/45748 , H03F2200/513 , H03F2203/45052 , H03F2203/45074 , H03F2203/45354 , H03F2203/45442 , H03F2203/45636 , H03F2203/45652 , H03M1/1245 , H03M1/145
摘要： Control structures are provided to accurately maintain amplifier common-mode levels at the predetermined level of a common-mode reference voltage Vcm. The disclosed control structures provide amplifier feedback along a first feedback path that is configured to provide high gain and low bandwidth to closely maintain amplifier common-mode level at the predetermined level of a common-mode reference voltage Vcm. They also provide amplifier feedback along a second feedback path that is configured to provide wide bandwidth to substantially reduce perturbations of the common-mode level that would have otherwise been induced by input signal transients. In an important amplifier feature, these controls are obtained without use of structures (e.g., capacitors and switching transistors) that use substantial current which reduces amplifier efficiency. Although the disclosed control structures may be used in a variety of systems, they are particularly suited for use in samplers and converter stages of pipelined analog-to-digital converters.
摘要翻译：提供控制结构以在共模参考电压V cm cm的预定电平下精确地保持放大器共模电平。所公开的控制结构提供沿着第一反馈路径的放大器反馈，其被配置为提供高增益和低带宽，以在共模参考电压V cm的预定电平下紧密维持放大器共模电平。。它们还沿着第二反馈路径提供放大器反馈，其被配置为提供宽带宽以基本上减少否则由输入信号瞬变引起的共模电平的扰动。在重要的放大器特征中，获得这些控制，而不使用使用降低放大器效率的大量电流的结构（例如，电容器和开关晶体管）。尽管公开的控制结构可以用于各种系统，但是它们特别适用于流水线模数转换器的采样器和转换器级。

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