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热词
    • 52. 发明授权
    • Divider-multiplier circuit
    • 分路器多路复用器电路
    • US3636332A
    • 1972-01-18
    • US3636332D
    • 1970-07-22
    • GEN MOTORS CORP
    • NELSON ROBERT ESANDERS ROBERT KWATTS ORAN ALTON
    • F01D17/08G06G7/161G06G7/28G06G7/64G06G7/16G06G7/18
    • G06G7/161F01D17/085G06G7/28G06G7/64
    • A divider-multiplier circuit for dividing a first direct current potential signal by a second direct current potential signal and multiplying the quotient by a third direct current potential signal. During respective alternate half cycles of a series of square waveform alternating current reference signals, a dividend signal is applied through a potential sensitive switch to one input circuit of an integrating operational amplifier, which integrates this signal in a first direction, and a divisor signal is applied through another potential sensitive switch to the input circuit of the integrating operational amplifier which results in an integration thereby of the divisor signal in a second opposite direction. While the second direct current potential signal is being integrated, the third direct current potential signal is applied through a third potential sensitive switch to a direct current potential signal averaging circuit until the second direct current potential signal has been integrated to substantially zero, at which time a switching arrangement sensitive to a substantially zero output signal from the integrating operational amplifier extinguishes the third potential sensitive switch.