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51. 发明申请

US20110139981A1 METHOD FOR CONTROLLING CHARGING OF SAMPLE AND SCANNING ELECTRON MICROSCOPE 有权
标题翻译：用于控制样品和扫描电子显微镜充电的方法
公开(公告)号：US20110139981A1
公开(公告)日：2011-06-16
申请号：US13059537
申请日：2009-08-08
申请人： Ritsuo Fukaya , Nobuhiro Okai , Koki Miyahara , Zhigang Wang
发明人： Ritsuo Fukaya , Nobuhiro Okai , Koki Miyahara , Zhigang Wang
IPC分类号： G01N23/225 , G01N23/00
CPC分类号： H01J37/026 , H01J37/09 , H01J37/15 , H01J37/28 , H01J2237/0041 , H01J2237/0045 , H01J2237/0458
摘要： An object of the present invention is to provide a scanning electron microscope aiming at making it possible to control the quantity of electrons generated by collision of electrons emitted from a sample with other members, and a sample charging control method using the control of electron quantity. To achieve the object, a scanning electron microscope including a plurality of apertures through which an electron beam can pass and a mechanism for switching the apertures for the electron beam, and a method for controlling sample charging by switching the apertures are proposed. The plurality of apertures are at least two apertures. Portions respectively having different secondary electron emission efficiencies are provided on peripheral portions of the at least two apertures on a side opposed to the sample. The quantity of electrons generated by collision of electrons emitted from the sample can be controlled by switching the apertures.
摘要翻译：本发明的目的是提供一种扫描电子显微镜，其目的在于可以控制从样品与其他部件发射的电子的碰撞产生的电子的量，以及使用电子量的控制的样品充电控制方法。为了实现该目的，提出了一种扫描电子显微镜，其包括电子束可以通过的多个孔，以及用于切换电子束的孔的机构，以及通过切换孔来控制样品充电的方法。多个孔是至少两个孔。分别具有不同二次电子发射效率的部分设置在与样品相对的一侧上的至少两个孔的周边部分上。可以通过切换孔来控制从样品发射的电子的碰撞产生的电子的量。

52. 发明授权

US07940452B2 Method for acquiring spectrum shape of a gain flattening filter in an optical amplifier 失效
标题翻译：用于获取光放大器中的增益平坦化滤波器的光谱形状的方法
公开(公告)号：US07940452B2
公开(公告)日：2011-05-10
申请号：US12195864
申请日：2008-08-21
申请人： Zhigang Wang , Aihua Yu
发明人： Zhigang Wang , Aihua Yu
IPC分类号： H04B10/17 , H04B10/12
CPC分类号： H01S3/06754 , H01S3/0014 , H01S3/1616 , H01S2301/04
摘要： A method for acquiring spectrum shape of a gain flattening filter of a doped optical fiber amplifier comprises the steps of: measuring spectrum shapes at two gain point (H, L) of the doped optical fiber with invariable fiber length respectively; and acquiring various gain spectrums of the doped optical fiber with various fiber length and various population inversion level according to an expression: ErGain(λ,x,L′)=[ErLGain(λ)+[ErHGain(λ)−ErLGain(λ)]*x]*L′, Wherein Gain(λ) refers to the spectral function of gain, x is Δ′inv/Δinv which refers to change of population inversion level, and L′ is set as proportion of doped fiber length. Gain spectrums of the doped optical fiber with various fiber length can be acquired by measuring spectrum shapes at two gain point (H, L) of the doped optical fiber in invariable fiber length and applying change rule of gain spectrum of the doped optical fiber in different population inversion level, which improves the flexibility for design of amplifier.
摘要翻译：一种用于获取掺杂光纤放大器的增益平坦滤波器的光谱形状的方法，包括以下步骤：分别测量具有不变光纤长度的掺杂光纤的两个增益点（H，L）处的光谱形状; 根据以下表达式获得具有各种光纤长度和各种总体反转电平的掺杂光纤的各种增益光谱：ErGain（λ，x，L'）= [ErLGain（λ）+ [ErHGain（λ）-ErLGain（λ） ] * x] * L'，其中增益（λ）是指增益的光谱函数，x是＆Dgr; inv /＆Dgr; inv，其是指群体反转级别的变化，L'被设置为掺杂光纤的比例长度。通过以不变的光纤长度测量掺杂光纤的两个增益点（H，L）处的光谱形状，并将掺杂光纤的增益光谱的变化规则应用于不同的光纤中，可以获得具有各种光纤长度的掺杂光纤的增益谱人口反演水平提高了放大器设计的灵活性。

53. 发明授权

US07851756B2 Charged particle beam irradiation system 有权
标题翻译：带电粒子束照射系统
公开(公告)号：US07851756B2
公开(公告)日：2010-12-14
申请号：US12182709
申请日：2008-07-30
申请人： Ritsuo Fukaya , Zhigang Wang
发明人： Ritsuo Fukaya , Zhigang Wang
IPC分类号： G01K1/08 , H01J3/14 , H01J3/26
CPC分类号： H01J37/28 , H01J37/026 , H01J37/147 , H01J37/265 , H01J2237/0044
摘要： It is to prevent an image drift from occurring caused by a specimen being charged when observing the specimen including an insulating material.A first scan is performed in a predetermined direction on scanning line and in a predetermined sequential direction of scanning lines and a second scan is performed in a scanning direction different from the predetermined scanning direction and in a sequential direction different from the predetermined sequential direction. An image may be created by repeating the process of executing the second scan after executing the first scan and by requiring the arithmetic average of the frames obtained by the second scans. An image may be created by averaging arithmetically at least one frame obtained by the first scan and at least one frame obtained by the second scan.
摘要翻译：这是为了防止在观察包括绝缘材料的试样时由试样充电引起的图像漂移。在扫描线和扫描线的预定顺序方向上沿预定方向执行第一扫描，并且在与预定扫描方向不同的扫描方向上和沿与预定顺序方向不同的顺序方向上执行第二扫描。可以通过在执行第一次扫描之后重复执行第二扫描的处理并且要求通过第二扫描获得的帧的算术平均来创建图像。可以通过对由第一扫描获得的至少一帧和通过第二扫描获得的至少一帧进行算术平均来创建图像。

54. 发明授权

US07779322B1 Compacting test responses using X-driven compactor 有权
标题翻译：使用X驱动压实机压实测试响应
公开(公告)号：US07779322B1
公开(公告)日：2010-08-17
申请号：US11898070
申请日：2007-09-07
申请人： Zhigang Wang , Laung-Terng (L.-T.) Wang , Shianling Wu , Xiaoqing Wen , Boryau (Jack) Sheu , Zhigang Jiang
发明人： Zhigang Wang , Laung-Terng (L.-T.) Wang , Shianling Wu , Xiaoqing Wen , Boryau (Jack) Sheu , Zhigang Jiang
IPC分类号： G01R31/28
CPC分类号： G01R31/318547
摘要： A method and apparatus for compacting test responses containing unknown values in a scan-based integrated circuit. The proposed X-driven compactor comprises a chain-switching matrix block and a space compaction logic block. The chain-switching matrix block switches the internal scan chain outputs before feeding them to the space compaction logic block for compaction so as to minimize X-induced masking and error masking. The X-driven compactor further selectively includes a finite-memory compaction logic block to further compact the outputs of the space compaction logic block.
摘要翻译：一种在基于扫描的集成电路中压缩包含未知值的测试响应的方法和装置。所提出的X驱动压实机包括链切换矩阵块和空间压缩逻辑块。链路切换矩阵块在将它们馈送到空间压缩逻辑块以进行压缩之前切换内部扫描链输出，以最小化X诱导的掩蔽和错误掩蔽。 X驱动压实机还选择性地包括有限存储器压缩逻辑块，以进一步压缩空间压缩逻辑块的输出。

55. 发明申请

US20080211227A1 Wall Bushing For Air Conditioner 失效
标题翻译：空调墙壁衬套
公开(公告)号：US20080211227A1
公开(公告)日：2008-09-04
申请号：US11911790
申请日：2006-04-13
申请人： Boyang Ni , Zhigang Wang , Deyong Fang
发明人： Boyang Ni , Zhigang Wang , Deyong Fang
IPC分类号： F16L5/00
CPC分类号： F24F1/025 , F16L5/00 , F24F2007/001 , Y10S285/901
摘要： A wall-penetrating sleeve of air conditioner comprises external pipe and internal pipe. The cross section of the external pipe is “sports ground” shape, and an inner circular wall of the external pipe is tangential to an outer circular wall of the internal pipe. An end of the internal pipe is connected to an air outlet port of the air conditioner, and an end of the external pipe is connected to an air inlet port. This invention prevents an air outlet pipe of a mobile air conditioner from sliding off the wall body.
摘要翻译：空调墙壁穿透套管包括外管和内管。外管的横截面是“运动场”形状，外管的内圆壁与内管的外圆壁相切。内管的一端连接到空调的出风口，外管的一端与进气口连接。本发明防止移动空调的出气管从墙体滑出。

56. 发明授权

US07414281B1 Flash memory with high-K dielectric material between substrate and gate 有权
标题翻译：闪存与衬底和栅极之间的高K电介质材料
公开(公告)号：US07414281B1
公开(公告)日：2008-08-19
申请号：US10658936
申请日：2003-09-09
申请人： Richard M. Fastow , Yue-Song He , Zhigang Wang
发明人： Richard M. Fastow , Yue-Song He , Zhigang Wang
IPC分类号： H01L29/76
CPC分类号： H01L29/513 , H01L29/7881
摘要： A flash memory cell and a method of forming the same are described. The flash memory cell may include a substrate having a source and a drain, a gate element, and a dielectric layer between the substrate and the gate element. The dielectric layer includes a dielectric material having a dielectric constant that is greater than that of silicon dioxide.
摘要翻译：描述闪存单元及其形成方法。闪速存储单元可以包括在衬底和栅极元件之间具有源极和漏极的衬底，栅极元件和介电层。电介质层包括介电常数大于二氧化硅的电介质材料。

57. 发明申请

US20080194672A1 MACROCYCLIC GHRELIN RECEPTOR MODULATORS AND METHODS OF USING THE SAME 有权
标题翻译：大分子GHRELIN受体调节剂及其使用方法
公开(公告)号：US20080194672A1
公开(公告)日：2008-08-14
申请号：US12028611
申请日：2008-02-08
申请人： Hamid Hoveyda , Graeme L. Fraser , Kamel Benakli , Sophie Beauchemin , Martin Brassard , David Drutz , Eric Marsault , Luc Ouellet , Mark L. Peterson , Zhigang Wang
发明人： Hamid Hoveyda , Graeme L. Fraser , Kamel Benakli , Sophie Beauchemin , Martin Brassard , David Drutz , Eric Marsault , Luc Ouellet , Mark L. Peterson , Zhigang Wang
IPC分类号： A61K31/395 , C07D267/00 , A61P3/00 , A61P9/00 , A61P25/00 , A61P35/04 , A61P19/00 , A61P29/00 , A61P1/00 , A61P5/00 , C07C43/205
CPC分类号： A61K31/395 , C07C215/42 , C07C215/54 , C07C271/16 , C07C2601/14 , C07D273/00 , C07D413/06 , C07D498/04 , C07D498/16
摘要： The present invention provides novel conformationally-defined macrocyclic compounds that can function as selective modulators of the ghrelin receptor (growth hormone secretagogue receptor, GHS-R1a and subtypes, isoforms and variants thereof). Methods of synthesizing the novel compounds are also described herein. These compounds are useful as agonists of the ghrelin receptor and as medicaments for treatment and prevention of a range of medical conditions including, but not limited to, metabolic and/or endocrine disorders, gastrointestinal disorders, cardiovascular disorders, obesity and obesity-associated disorders, central nervous system disorders, bone disorders, genetic disorders, hyperproliferative disorders and inflammatory disorders.
摘要翻译：本发明提供新的构象定义的大环化合物，其可以作为生长素释放肽受体（生长激素促分泌素受体，GHS-R1a和亚型，同种型及其变体）的选择性调节剂。本文还描述了合成新化合物的方法。这些化合物可用作生长素释放肽受体的激动剂，并且用作治疗和预防一系列医学病症的药物，包括但不限于代谢和/或内分泌疾病，胃肠道疾病，心血管疾病，肥胖症和肥胖相关疾病，中枢神经系统疾病，骨骼疾病，遗传疾病，过度增殖性疾病和炎症性疾病。

58. 发明申请

US20070037371A1 Method of forming gate electrode structures 审中-公开
标题翻译：形成栅电极结构的方法
公开(公告)号：US20070037371A1
公开(公告)日：2007-02-15
申请号：US11201042
申请日：2005-08-10
申请人： Zhigang Wang , Nian Yang , Shenqing Fang
发明人： Zhigang Wang , Nian Yang , Shenqing Fang
IPC分类号： H01L21/3205
CPC分类号： H01L21/32139 , H01L21/28123
摘要： In one example, the method includes forming a patterned hard mask feature above a layer of gate electrode material, the hard mask feature having a photoresist feature formed thereabove and the hard mask feature having a critical dimension. The method further includes performing an etching process on the patterned hard mask feature to produce a reduced hard mask feature having a critical dimension that is less than the critical dimension of the patterned hard mask feature and performing an anisotropic etching process on the layer of gate electrode material using the reduced hard mask feature as a mask to define a gate electrode.
摘要翻译：在一个示例中，该方法包括在栅电极材料层之上形成图案化的硬掩模特征，硬掩模特征具有形成在其上的光致抗蚀剂特征以及具有临界尺寸的硬掩模特征。该方法还包括对图案化的硬掩模特征进行蚀刻处理以产生具有小于图案化硬掩模特征的临界尺寸的临界尺寸并且在栅电极层上执行各向异性蚀刻工艺的减小的硬掩模特征使用减少的硬掩模特征作为掩模的材料来限定栅电极。

59. 发明申请

US20060035431A1 Memory cell with reduced DIBL and Vss resistance 有权
标题翻译：具有降低的DIBL和Vss电阻的存储单元
公开(公告)号：US20060035431A1
公开(公告)日：2006-02-16
申请号：US10915771
申请日：2004-08-11
申请人： Shenqing Fang , Kuo-Tung Chang , Pavel Fastenko , Zhigang Wang
发明人： Shenqing Fang , Kuo-Tung Chang , Pavel Fastenko , Zhigang Wang
IPC分类号： H01L21/336
CPC分类号： H01L29/66825
摘要： According to one exemplary embodiment, a method for fabricating a floating gate memory cell on substrate comprises a step of forming a spacer adjacent to a source sidewall of a stacked gate structure, where the stacked gate structure is situated over a channel region in substrate. The method further comprises forming a high energy implant doped region adjacent to the spacer in the source region of substrate. The method further comprises forming a recess in a source region of the substrate, where the recess has a sidewall, a bottom, and a depth, and where the sidewall of the recess is situated adjacent to a source of the floating gate memory cell. According to this exemplary embodiment, the spacer causes the source to have a reduced lateral straggle and diffusion in the channel region, which causes a reduction in drain induced barrier lowering (DIBL) in the floating gate memory cell.
摘要翻译：根据一个示例性实施例，用于在衬底上制造浮动栅极存储器单元的方法包括形成与层叠栅极结构的源极侧壁相邻的间隔物的步骤，其中堆叠的栅极结构位于衬底中的沟道区域之上。该方法还包括在衬底的源区中形成与间隔物相邻的高能注入掺杂区。该方法还包括在衬底的源极区域中形成凹部，其中凹部具有侧壁，底部和深度，并且凹部的侧壁位于与浮动栅极存储单元的源极相邻的位置。根据该示例性实施例，间隔件导致源极在通道区域中具有减小的横向偏移和扩散，这导致浮动栅极存储单元中的漏极感应势垒降低（DIBL）的减小。

60. 发明授权

US06991987B1 Method for producing a low defect homogeneous oxynitride 有权
标题翻译：低缺陷均匀氮氧化物的制造方法
公开(公告)号：US06991987B1
公开(公告)日：2006-01-31
申请号：US10306382
申请日：2002-11-27
申请人： Xin Guo , Nian Yang , Zhigang Wang
发明人： Xin Guo , Nian Yang , Zhigang Wang
IPC分类号： H01L21/8247
CPC分类号： H01L21/28273 , C23C16/0218 , C23C16/0227 , C23C16/308 , H01L21/3144
摘要： A process technology effectuates production of low defect homogeneous oxynitride, which can be applied in tunneling dielectrics with high dielectric constants and low barrier heights for flash memory devices, and as gate oxide for ultra-thin logic devices. The process technology involves varying the oxygen content in a the homogeneous oxynitride film comprising a part of the flash memory device, which effectively increases the dielectric constant of the oxynitride film and lowers its barrier height. In one such process, a controlled co-flow of N2O is introduced into a CVD deposition process. This process effectuates production of a oxynitride film with uniform distributions of nitrogen and oxygen throughout.
摘要翻译：一种工艺技术可以实现低缺陷均匀氮氧化物的生产，其可以应用于具有高介电常数的隧道电介质和用于闪存器件的低屏障高度，以及用作超薄逻辑器件的栅极氧化物。该工艺技术涉及改变包括闪存器件的一部分的均匀氮氧化物膜中的氧含量，其有效地增加氧氮化物膜的介电常数并降低其势垒高度。在一种这样的方法中，将N 2 O 2的受控共流引入到CVD沉积工艺中。该方法实现了氮气和氧气的均匀分布的氮氧化物膜的生产。

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