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51. 发明授权

US06653684B2 Integrated circuit including high-voltage and logic transistors and EPROM cells 有权
标题翻译：集成电路包括高压和逻辑晶体管和EPROM单元
公开(公告)号：US06653684B2
公开(公告)日：2003-11-25
申请号：US09748711
申请日：2000-12-22
申请人： Richard Fournel , Eric Mazaleyrat
发明人： Richard Fournel , Eric Mazaleyrat
IPC分类号： H01L29788
CPC分类号： H01L27/105 , H01L27/1052
摘要： An integrated circuit including logic MOS transistors, EPROM cells, and high-voltage MOS transistors. Each EPROM cell includes a floating gate formed from a first polysilicon level above a tunnel oxide and a control gate formed from a second polysilicon level. Each logic MOS transistor includes a gate formed from a portion of the second polysilicon level above a very thin oxide. Each high-voltage transistor includes a gate corresponding to a portion of the first polysilicon level above a layer of said tunnel oxide, the gate being covered with a portion of the second polysilicon layer, except at locations where a contact is desired to be made with the gate. The uncovered portion of the first polysilicon layer in the high-voltage MOS transistors is coated with a silicon nitride layer.
摘要翻译：包括逻辑MOS晶体管，EPROM单元和高压MOS晶体管的集成电路。每个EPROM单元包括由隧道氧化物上方的第一多晶硅级形成的浮置栅极和由第二多晶硅层级形成的控制栅极。每个逻辑MOS晶体管包括由非常薄的氧化物上的第二多晶硅层的一部分形成的栅极。每个高电压晶体管包括对应于所述隧道氧化物层之上的第一多晶硅层的一部分的栅极，栅极被第二多晶硅层的一部分覆盖，除了期望接触的位置处，大门。高压MOS晶体管中的第一多晶硅层的未覆盖部分涂覆有氮化硅层。

52. 发明授权

US06480040B2 Device for the detection of a high voltage greater than a supply voltage 有权
标题翻译：用于检测高于电源电压的高电压的装置
公开(公告)号：US06480040B2
公开(公告)日：2002-11-12
申请号：US09727299
申请日：2000-11-30
申请人： Richard Fournel
发明人： Richard Fournel
IPC分类号： H03K522
CPC分类号： G05F3/247 , G01R19/16519 , G11C5/147
摘要： A device for detecting the application of a high voltage signal to an internal node of an integrated circuit includes a high-voltage divider circuit and a threshold detection circuit. The threshold detection circuit receives a signal given by the output of the divider circuit, and provides a threshold crossing detection signal at an output thereof based upon the signal crossing a threshold. The detection circuit is connected between the logic supply voltage and ground, and further includes a negative feedback loop. The negative feedback loop is connected to the output of the divider circuit to limit the voltage build-up of the high voltage signal at the output thereof after the crossing of the detection threshold by the signal.
摘要翻译：用于检测向集成电路的内部节点施加高电压信号的装置包括高压分压器电路和阈值检测电路。阈值检测电路接收由分频电路的输出给出的信号，并且基于信号穿过阈值在其输出端提供阈值交叉检测信号。检测电路连接在逻辑电源电压和地之间，并且还包括负反馈回路。负反馈回路连接到除法器电路的输出端，以在检测阈值与信号交叉之后限制其输出处的高电压信号的电压积分。

53. 发明授权

US06239651B1 Negative load pump device 有权
标题翻译：负负载泵装置
公开(公告)号：US06239651B1
公开(公告)日：2001-05-29
申请号：US09221224
申请日：1998-12-23
申请人： Richard Fournel
发明人： Richard Fournel
IPC分类号： G05F110
CPC分类号： H02M3/073 , G11C5/145 , G11C16/30
摘要： A negative load pump circuit includes switching MOS transistors and capacitors. Each switching transistor is formed in a well on an integrated circuit, and each transistor has its well contact or body connected to its gate and to its source to receive a phase signal. The device advantageously includes a circuit for the regulation of the negative load pump circuit. This maintains the negative load pump circuit in stopped conditions corresponding to minimum power consumption, and enables a speedy supply of a negative low level expected at the output of the negative load pump circuit for an intended application. This is based upon activation by an external command.
摘要翻译：负负载泵电路包括开关MOS晶体管和电容器。每个开关晶体管形成在集成电路中的阱中，并且每个晶体管具有其良好的接触或主体连接到其栅极和其源以接收相位信号。该装置有利地包括用于调节负负载泵电路的电路。这将负载泵电路维持在对应于最小功耗的停止条件下，并且能够在预期的应用中快速地向负负载泵电路的输出端提供负的低电平。这是基于外部命令的激活。

54. 发明授权

US06225679B1 Method and apparatus for protecting a device against voltage surges 有权
标题翻译：用于保护器件免受电压浪涌的方法和装置
公开(公告)号：US06225679B1
公开(公告)日：2001-05-01
申请号：US09363231
申请日：1999-07-21
申请人： Richard Fournel , Fabrice Marinet
发明人： Richard Fournel , Fabrice Marinet
IPC分类号： H01L2900
CPC分类号： H01L27/0259
摘要： A structure for the protection of a high-voltage pad includes a lateral bipolar transistor, an N-type diffusion of which, connected to the pad to be protected, is made in an N-type tub with a zone that extends laterally outside the tub in the base. A P-type implantation is made on the entire substrate outside the N-type tub except in the region in which the zone extends.
摘要翻译：用于保护高压焊盘的结构包括横向双极晶体管，其N型扩散连接到待保护焊盘的N型扩散件制成在具有横向外延伸到槽体的区域的N型槽中在基地。除了区域延伸的区域外，在N型桶外的整个基板上进行P型注入。

55. 发明授权

US5970348A Read-only memory and corresponding method of manufacturing by MOS technology 失效
标题翻译：只读存储器和相应的MOS技术制造方法
公开(公告)号：US5970348A
公开(公告)日：1999-10-19
申请号：US962398
申请日：1997-10-31
申请人： Philippe Boivin , Richard Fournel
发明人： Philippe Boivin , Richard Fournel
IPC分类号： H01L21/8246 , H01L27/112 , H01L24/8246
CPC分类号： H01L27/11266 , H01L27/112
摘要： In a method for the manufacture of cells of a read-only memory, each cell comprises a MOS transistor formed by a first diffusion and a second diffusion of impurities of a first type in a semiconductor substrate with impurities of a second type. These two diffusions are separated by a channel surmounted by a gate. A thick oxide zone is made in the zone designed for the first diffusion, so that the making of the diffusions leads to a first diffusion in two parts separated by this thick oxide zone, a first part adjoining the channel and a second part on the periphery of the transistor. A particular encoding step makes it possible, by means of a mask, to eliminate the thick oxide in certain cells so that these encoded cells have a first continuous diffusion.
摘要翻译：在制造只读存储器的单元的方法中，每个单元包括通过第一扩散形成的MOS晶体管和在半导体衬底中的第一类型的杂质与第二类杂质的第二扩散。这两个扩散通过由栅极上的通道分开。在设计用于第一扩散的区域中制造厚的氧化物区域，使得扩散的制造导致在由该厚氧化物区域分离的两个部分中的第一扩散，邻接通道的第一部分和周边上的第二部分的晶体管。特定的编码步骤可以通过掩模去除某些细胞中的厚氧化物，使得这些编码的细胞具有第一连续扩散。

56. 发明授权

US5500601A Device for detecting the logic state of a memory cell 失效
标题翻译：用于检测存储器单元的逻辑状态的装置
公开(公告)号：US5500601A
公开(公告)日：1996-03-19
申请号：US839618
申请日：1992-02-21
申请人： Mathieu Lisart , Richard Fournel
发明人： Mathieu Lisart , Richard Fournel
IPC分类号： G01D5/16 , G01D5/18 , G06F1/00 , G06F21/55 , G11C16/28 , G01R27/08 , G01R31/26 , G11C29/00
CPC分类号： G06F21/558 , G01D5/16 , G01D5/18 , G11C16/28 , G06F2207/7219
摘要： The invention is a device to detect the logic state of a component whose impedance depends on this state, the device including means to generate a current and a measurement voltage so that the current consumption remains constant during cell detection regardless of the state detected, the device also including means to detect the logic state of the component.
摘要翻译：本发明是一种用于检测其阻抗取决于该状态的部件的逻辑状态的装置，该装置包括产生电流和测量电压的装置，使得在小区检测期间电流消耗保持恒定，而与检测到的状态无关，该装置还包括检测组件的逻辑状态的方法。

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