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51. 发明授权

US06709887B2 Method of forming a chalcogenide comprising device 有权
标题翻译：形成含硫族元素的装置的方法
公开(公告)号：US06709887B2
公开(公告)日：2004-03-23
申请号：US09999883
申请日：2001-10-31
申请人： John T. Moore , Terry L. Gilton
发明人： John T. Moore , Terry L. Gilton
IPC分类号： H01L2100
CPC分类号： H01L45/04 , H01L27/101 , H01L28/24 , H01L45/085 , H01L45/1233 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1658 , H01L45/1675
摘要： A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices. In one implementation, a non-volatile resistance variable device in a highest resistance state for a given ambient temperature and -pressure includes a resistance variable chalcogenide material having metal ions diffused therein. Opposing first and second electrodes are received operatively proximate the resistance variable chalcogenide material. At least one of the electrodes has a conductive projection extending into the resistance variable chalcogenide material.
摘要翻译：金属掺杂硫族化物材料的方法包括在衬底上形成金属。在金属上形成硫族化物材料。通过硫属化物材料对金属进行辐射，有效地在金属和硫族化物材料的界面处破坏硫族化物材料的硫族化物键，并将至少一些金属向外扩散到硫族化物材料中。金属掺杂硫族化物材料的方法包括用硫族化物材料包围突出的金属块的暴露的外表面。通过硫族化物材料将辐射照射到突出金属质量块上，有效地在突出的金属质量外表面的界面处破坏硫族化物材料的硫族化物键，并将至少一些突出的金属块向外扩散到硫族化物材料中。在某些方面，上述实施方式被并入形成非易失性电阻可变器件的方法中。在一个实施方案中，对于给定的环境温度和压力，处于最高电阻状态的非易失性电阻可变器件包括在其中扩散有金属离子的电阻变化硫族化物材料。反向的第一和第二电极在电阻可变硫属化物材料上可操作地接收。至少一个电极具有延伸到电阻可变硫族化物材料中的导电突起。

52. 发明授权

US06646902B2 Method of retaining memory state in a programmable conductor RAM 有权
标题翻译：在可编程导体RAM中保持存储器状态的方法
公开(公告)号：US06646902B2
公开(公告)日：2003-11-11
申请号：US09941648
申请日：2001-08-30
申请人： Terry L. Gilton , Kristy A. Campbell
发明人： Terry L. Gilton , Kristy A. Campbell
IPC分类号： G11C1700
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0011 , G11C2013/009
摘要： A non-volatile memory device, such as a Programmable Conductor Random Access Memory (PCRAM) device, having an exemplary memory stored state retention characteristic is disclosed. There is provided a method for retaining stored states in a random access memory device generally comprising the steps of programming a memory cell or an array of memory cells by applying a first voltage to the cells and stabilizing the cells by applying a second voltage to the cells, which is less than the first voltage. The second voltage, which acts as a stabilizing voltage, may be a read-out voltage. The second voltage may also be continuously applied to the cells. The second voltage may also be provided as a sweep voltage, a pulse voltage, or a step voltage.
摘要翻译：公开了具有示例性存储器存储状态保持特性的非易失性存储器件，例如可编程导体随机存取存储器（PCRAM）装置。提供了一种用于将随机存取存储器件中的存储状态保持的方法，通常包括以下步骤：通过向单元施加第一电压来对存储单元或存储单元阵列进行编程，并通过向单元施加第二电压来稳定单元，小于第一电压。作为稳定电压的第二电压可以是读出电压。第二电压也可以连续施加到电池。也可以将第二电压设置为扫描电压，脉冲电压或阶跃电压。

53. 发明授权

US06426234B2 Method of making field emitters using porous silicon 失效
标题翻译：使用多孔硅制造场致发射体的方法
公开(公告)号：US06426234B2
公开(公告)日：2002-07-30
申请号：US09782396
申请日：2001-02-13
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L2100
CPC分类号： H01J9/025 , H01J2201/30403 , H01J2209/0226
摘要： A process is provided for forming sharp asperities useful as field emitters. The process comprises patterning and doping a silicon substrate. The doped silicon substrate is anodized. The anodized area is then use for field emission tips. The process of the present invention is also useful for low temperature sharpening of tips fabricated by other methods. The tips are anodized, and then exposed to radiant energy and the resulting oxide is removed.
摘要翻译：提供了用于形成用作场致发射体的尖锐凹凸的工艺。该工艺包括图案化和掺杂硅衬底。掺杂硅衬底被阳极氧化。然后阳极氧化区域用于场发射尖端。本发明的方法也可用于通过其它方法制造的尖端的低温磨削。尖端被阳极氧化，然后暴露于辐射能，并且所得到的氧化物被去除。

54. 发明授权

US06348365B1 PCRAM cell manufacturing 有权
公开(公告)号：US06348365B1
公开(公告)日：2002-02-19
申请号：US09797792
申请日：2001-03-02
申请人： John T. Moore , Terry L. Gilton
发明人： John T. Moore , Terry L. Gilton
IPC分类号： H01L2182
CPC分类号： G11C13/0011 , H01L45/085 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/1658 , H01L45/1683
摘要： An exemplary embodiment of the present invention includes a method for forming a programmable cell by forming an opening in a dielectric material to expose a portion of an underlying first conductive electrode, forming a recessed chalcogenide-metal ion material in the opening and forming a second conductive electrode overlying the dielectric material and the chalcogenide-metal ion material. A method for forming a recessed chalcogenide-metal ion material comprises forming a glass material to be recessed approximately 50% or less, in the opening in the dielectric material, forming a metal material on the glass material within the opening and diffusing metal ions from the metal material into the glass material by using ultraviolet light or ultraviolet light in combination with a heat treatment, to cause a resultant metal ion concentration in the glass material.

55. 发明授权

US06258729B1 Oxide etching method and structures resulting from same 有权
公开(公告)号：US06258729B1
公开(公告)日：2001-07-10
申请号：US09388685
申请日：1999-09-02
申请人： Scott J. DeBoer , Terry L. Gilton , Ceredig Roberts
发明人： Scott J. DeBoer , Terry L. Gilton , Ceredig Roberts
IPC分类号： H01L21461
CPC分类号： H01L21/76897 , H01L21/31116 , H01L21/76802 , H01L21/76877 , H01L28/40 , H01L28/90
摘要： An etching method includes providing a first insulating material layer on a substrate assembly surface and a second insulating material layer on the first insulating material layer. The first insulating material layer has an etch rate that is greater than the etch rate of the second insulating material layer when exposed to an etch composition. Portions of the first insulating material layer and the second insulating material layer are removed using at least the etch composition. Various types of structures (e.g., contacts, capacitors) are formed with use of the method.

56. 发明授权

US5151168A Process for metallizing integrated circuits with electrolytically-deposited copper 失效
标题翻译：用电沉积铜金属化集成电路的工艺
公开(公告)号：US5151168A
公开(公告)日：1992-09-29
申请号：US587302
申请日：1990-09-24
申请人： Terry L. Gilton , Mark E. Tuttle , David A Cathey
发明人： Terry L. Gilton , Mark E. Tuttle , David A Cathey
IPC分类号： H01L21/288 , H01L21/768
CPC分类号： H01L21/76885 , H01L21/2885 , H01L21/76879
摘要： A masked, conformal electrodeposition process for copper metallization of integrated circuits. The process is considerably less complex than other metallization processes utilizing electrodeposition, and provides excellent step coverage for sub-micron contact openings. Full-step coverage has been obtained with the process for contact openings as small as 0.5 microns in diameter. The process begins with the blanket sputter or LPCVD deposition of a thin conductive barrier layer of a material such as titanium nitride, titanium-tungsten or nitrided titanium-tungsten. A photoresist reverse image of the maskwork that normally would be used to etch the metallization pattern on the circuitry is created on the wafer on top of the barrier layer. As an option, the reverse image of the desired metallization pattern may be created by etching a dielectric material layer such as silicon dioxide or silicon nitride, using a photoresist reverse image as a template. The wafer is then transferred to an electrolytic bath, preferably with a pH of 13.5, in which copper is complexed with EDTA molecules. Metallic copper is deposited on the barrier layer where it is not covered by photoresist. At current densities of less than 1 milliamp/cm.sup.2, the process will automatically fill contact/via openings to a uniform thickness which is independent of the depth of the opening. Following electrodeposition of the metallization layer to the desired thickness, the wafer is removed from the bath, and the photoresist or dielectric material reverse-pattern mask is stripped. At this point, an optional corrosion-resistant metal layer may be galvanically plated on the surface of the copper layer. Finally, portions of the barrier layer that were exposed by removal of the resist are then removed with either a wet or a dry etch.
摘要翻译：用于集成电路铜金属化的掩蔽的共形电沉积工艺。该方法比使用电沉积的其它金属化方法复杂得多，并且为亚微米接触开口提供优异的台阶覆盖。通过直径为0.5微米的接触开口的过程已经获得了全面的覆盖。该过程开始于覆盖溅射或LPCVD沉积诸如氮化钛，钛 - 钨或氮化钛 - 钨的材料的薄导电阻挡层。通常将用于蚀刻电路上的金属化图案的掩模的光致抗蚀剂反转图像在阻挡层顶部上的晶片上产生。作为选择，可以通过使用光致抗蚀剂反向图像作为模板通过蚀刻诸如二氧化硅或氮化硅的介电材料层来产生所需金属化图案的反向图像。然后将晶片转移到电解浴中，优选pH为13.5，其中铜与EDTA分子络合。金属铜沉积在阻挡层上，未被光致抗蚀剂覆盖。在小于1毫安/ cm2的电流密度下，该过程将自动地将接触/通孔开口填充到与开口深度无关的均匀厚度。在将金属化层电沉积到所需厚度之后，将晶片从浴中移除，并且剥离光致抗蚀剂或介电材料反向图案掩模。此时，可选的耐腐蚀金属层可以电镀在铜层的表面上。最后，用湿法或干法蚀刻除去通过去除抗蚀剂而暴露的部分阻挡层。

57. 发明申请

US20100262791A1 SOFTWARE REFRESHED MEMORY DEVICE AND METHOD 有权
标题翻译：软件刷新存储器件和方法
公开(公告)号：US20100262791A1
公开(公告)日：2010-10-14
申请号：US12824931
申请日：2010-06-28
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： G06F12/00
CPC分类号： G11C5/005 , G11C11/406 , G11C11/40603 , G11C11/40622 , G11C13/0004 , G11C13/0011 , G11C13/0033 , G11C13/0069 , G11C16/3431
摘要： A software refreshed memory device comprises a plurality of memory cells that must be periodically refreshed to avoid losing data. Preferably, the memory cells can avoid losing data even though the time interval between successive memory refresh operations is relatively long, as compared to the time interval between successive memory refresh operations in a conventional volatile memory device, such as a DRAM. A processor can perform periodic memory refresh operations by executing a set of memory refresh instructions implemented in software, rather than in hardware. Accordingly, the memory device can advantageously be simplified, because the need for memory refresh circuitry and for a unique refresh control signal are advantageously eliminated. Moreover, the processor executing the memory refresh instructions can typically perform more sophisticated algorithms, as compared to memory refresh circuitry implemented in hardware, for determining when to perform a memory refresh operation. For example, the processor can determine whether each individual memory cell needs to be refreshed, thereby advantageously avoiding performing unnecessary refresh operations on memory cells that do not need to be refreshed.
摘要翻译：软件刷新的存储器件包括必须定期刷新以避免丢失数据的多个存储器单元。优选地，与常规易失性存储器件（例如DRAM）中的连续存储器刷新操作之间的时间间隔相比，即使连续存储器刷新操作之间的时间间隔相对较长，存储器单元也可避免丢失数据。处理器可以通过执行以软件实现的一组存储器刷新指令而不是硬件来执行周期性的存储器刷新操作。因此，有利地可以简化存储器件，因为有利地消除了对存储器刷新电路和唯一刷新控制信号的需要。此外，与硬件实现的存储器刷新电路相比，执行存储器刷新指令的处理器通常可以执行更复杂的算法，用于确定何时执行存储器刷新操作。例如，处理器可以确定每个单独的存储器单元是否需要刷新，从而有利地避免对不需要刷新的存储器单元执行不必要的刷新操作。

58. 发明授权

US07727786B2 Photon-based memory device 失效
标题翻译：基于光子的存储器件
公开(公告)号：US07727786B2
公开(公告)日：2010-06-01
申请号：US12027661
申请日：2008-02-07
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L21/70
CPC分类号： B82Y10/00 , G11C13/025 , G11C13/04 , G11C13/041 , Y10S977/734 , Y10S977/814 , Y10S977/943 , Y10S977/95
摘要： An optical memory cell having a material layer associated with a pixel capable of emitting and receiving light. The material layer has phosphorescent material formed therein for storing data as light received from and emitted to the pixel.
摘要翻译：具有与能够发射和接收光的像素相关联的材料层的光学存储单元。材料层中形成有磷光材料，用于将数据作为从像素接收和发射的光存储。

59. 发明授权

US07518212B2 Graded GexSe100-x concentration in PCRAM 有权
标题翻译：在PCRAM中分级GexSe100-x浓度
公开(公告)号：US07518212B2
公开(公告)日：2009-04-14
申请号：US11195642
申请日：2005-08-03
申请人： John T. Moore , Terry L. Gilton , Kristy A. Campbell
发明人： John T. Moore , Terry L. Gilton , Kristy A. Campbell
IPC分类号： H01L29/00
CPC分类号： H01L45/1683 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1658
摘要： The present invention provides a design for a PCRAM element which incorporates multiple metal-containing germanium-selenide glass layers of diverse stoichiometries. The present invention also provides a method of fabricating the disclosed PCRAM structure.
摘要翻译：本发明提供了一种PCRAM元件的设计，其结合了多种不同化学计量的含金属的硒化锗玻璃层。本发明还提供了制造所公开的PCRAM结构的方法。

60. 发明授权

US07498231B2 Multiple data state memory cell 有权
标题翻译：多个数据状态存储单元
公开(公告)号：US07498231B2
公开(公告)日：2009-03-03
申请号：US11700086
申请日：2007-01-31
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L21/20 , H01L29/76
CPC分类号： G11C13/0004 , G11C11/56 , G11C11/5678 , G11C17/14 , H01L45/085 , H01L45/142 , H01L45/143 , H01L45/144
摘要： A programmable multiple data state memory cell including a first electrode layer formed from a first conductive material, a second electrode layer formed from a second conductive material, and a first layer of a metal-doped chalcogenide material disposed between the first and second electrode layers. The first layer providing a medium in which a conductive growth can be formed to electrically couple together the first and second electrode layers. The memory cell further includes a third electrode layer formed from a third conductive material, and a second layer of a metal-doped chalcogenide material disposed between the second and third electrode layers, the second layer providing a medium in which a conductive growth can be formed to electrically couple together the second and third electrode layers.
摘要翻译：一种可编程多数据状态存储单元，包括由第一导电材料形成的第一电极层，由第二导电材料形成的第二电极层，以及设置在第一和第二电极层之间的金属掺杂的硫族化物材料的第一层。第一层提供其中可以形成导电生长以将第一和第二电极层电耦合在一起的介质。存储单元还包括由第三导电材料形成的第三电极层和设置在第二和第三电极层之间的金属掺杂硫族化物材料的第二层，第二层提供可形成导电生长的介质以将第二和第三电极层电耦合在一起。

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