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51. 发明授权

US06849891B1 RRAM memory cell electrodes 有权
标题翻译： RRAM存储单元电极
公开(公告)号：US06849891B1
公开(公告)日：2005-02-01
申请号：US10730584
申请日：2003-12-08
申请人： Sheng Teng Hsu , Wei Pan , Fengyan Zhang , Wei-Wei Zhuang , Tingkai Li
发明人： Sheng Teng Hsu , Wei Pan , Fengyan Zhang , Wei-Wei Zhuang , Tingkai Li
IPC分类号： H01L21/28 , G11C13/00 , G11C16/02 , H01L21/8246 , H01L27/105 , H01L27/108 , H01L27/115 , H01L27/22 , H01L29/68 , H01L39/00 , H01L43/08 , H01L45/00 , H01L29/94
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/77 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/147 , H01L45/1675
摘要： A RRAM memory cell is formed on a silicon substrate having a operative junction therein and a metal plug formed thereon, includes a first oxidation resistive layer; a first refractory metal layer; a CMR layer; a second refractory metal layer; and a second oxidation resistive layer. A method of fabricating a multi-layer electrode RRAM memory cell includes preparing a silicon substrate; forming a junction in the substrate taken from the group of junctions consisting of N+ junctions and P+ junctions; depositing a metal plug on the junction; depositing a first oxidation resistant layer on the metal plug; depositing a first refractory metal layer on the first oxidation resistant layer; depositing a CMR layer on the first refractory metal layer; depositing a second refractory metal layer on the CMR layer; depositing a second oxidation resistant layer on the second refractory metal layer; and completing the RRAM memory cell.
摘要翻译：在其上具有工作结的硅衬底上形成有一个RRAM存储单元和形成在其上的金属插塞，包括第一氧化电阻层; 第一难熔金属层; 一个CMR层; 第二难熔金属层; 和第二氧化电阻层。制造多层电极RRAM存储单元的方法包括制备硅衬底; 从由N +结和P +结组成的接头组中形成在衬底中的结; 在接头上沉积金属塞; 在金属插塞上沉积第一抗氧化层; 在第一耐氧化层上沉积第一难熔金属层; 在第一难熔金属层上沉积CMR层; 在CMR层上沉积第二难熔金属层; 在所述第二难熔金属层上沉积第二抗氧化层; 并完成RRAM存储单元。

52. 发明授权

US06849467B1 MOCVD of TiO2 thin film for use as FeRAM H2 passivation layer 失效
标题翻译：用于FeRAM H2钝化层的TiO2薄膜的MOCVD
公开(公告)号：US06849467B1
公开(公告)日：2005-02-01
申请号：US10621863
申请日：2003-07-16
申请人： Tingkai Li , Wei Pan , Robert A. Barrowcliff , David R. Evans , Sheng Teng Hsu
发明人： Tingkai Li , Wei Pan , Robert A. Barrowcliff , David R. Evans , Sheng Teng Hsu
IPC分类号： H01L21/00 , H01L21/02 , H01L21/28 , H01L21/316 , H01L21/336 , H01L21/8242 , H01L21/8246 , H01L27/115
CPC分类号： H01L27/11502 , H01L21/28291 , H01L21/31604 , H01L27/11585 , H01L27/1159 , H01L28/57 , H01L29/6684
摘要： A method of forming an H2 passivation layer in an FeRAM includes preparing a silicon substrate; depositing a layer of TiOx thin film, where 0
摘要翻译：在FeRAM中形成H 2钝化层的方法包括制备硅衬底; 在大马士革结构上沉积一层TiOx薄膜，其中0

53. 发明授权

US06590243B2 Ferroelastic lead germanate thin film and deposition method 失效
公开(公告)号：US06590243B2
公开(公告)日：2003-07-08
申请号：US09301434
申请日：1999-04-28
申请人： Tingkai Li , Fengyan Zhang , Yoshi Ono , Sheng Teng Hsu
发明人： Tingkai Li , Fengyan Zhang , Yoshi Ono , Sheng Teng Hsu
IPC分类号： H01L2976
CPC分类号： H01L21/02197 , C23C16/40 , H01L21/02271 , H01L21/31604 , H01L21/31691
摘要： A Pb3GeO5 phase PGO thin film is provided. This film has ferroelastic properties that make it ideal for many microelectromechanical applications or as decoupling capacitors in high speed multichip modules. This PGO film is uniquely formed in a MOCVD process that permits a thin film, less than 1 mm, of material to be deposited. The process mixes Pd and germanium in a solvent. The solution is heated to form a precursor vapor which is decomposed. The method provides deposition temperatures and pressures. The as-deposited film is also annealed to enhanced the film's ferroelastic characteristics. A ferroelastic capacitor made from the present invention PGO film is also provided.

54. 发明授权

US06531325B1 Memory transistor and method of fabricating same 失效
标题翻译：存储晶体管及其制造方法
公开(公告)号：US06531325B1
公开(公告)日：2003-03-11
申请号：US10164785
申请日：2002-06-04
申请人： Sheng Teng Hsu , Fengyan Zhang , Tingkai Li
发明人： Sheng Teng Hsu , Fengyan Zhang , Tingkai Li
IPC分类号： H01L2100
CPC分类号： G11C11/22 , H01L21/28291 , H01L21/31641 , H01L21/31645 , H01L21/31691 , H01L27/11502 , H01L29/78391
摘要： A ferroelectric memory transistor includes a substrate having active regions therein; a gate stack, including: a high-k insulator element, including a high-k cup and a high-k cap; a ferroelectric element, wherein said ferroelectric element is encapsulated within said high-k insulator element; and a top electrode located on a top portion of said high-k insulator; a passivation oxide layer located over the substrate and gate stack; and metalizations to form contacts to the active regions and the gate stack. A method of forming a ferroelectric memory transistor includes preparing a substrate, including forming active regions and an oxide device isolation region; forming a gate placeholder structure in a gate region; removing the gate placeholder structure forming a gate void in the gate region; depositing a high-k insulator layer over the structure and in the gate void to from a high-k cup; filling the high-k cup with a ferroelectric material to form a ferroelectric element; depositing a high-k upper insulator layer and removing excess high-k material to form a high-k cap over the ferroelectric element; depositing a top electrode over the high-k cap to form a gate electrode and gate stack; depositing a layer of passivation oxide over the structure; etching the passivation oxide to from contact vias to the active regions and the gate stack; and metallizing the structure to complete the ferroelectric memory transistor.
摘要翻译：铁电存储晶体管包括其中具有有源区的衬底; 包括：高k绝缘体元件，包括高k杯和高k帽; 铁电元件，其中所述铁电元件封装在所述高k绝缘体元件内; 以及位于所述高k绝缘体的顶部上的顶电极; 位于衬底和栅极叠层上方的钝化氧化物层; 以及金属化以形成与有源区和栅叠层的接触。形成铁电存储晶体管的方法包括：制备基片，包括形成有源区和氧化物器件隔离区; 在栅极区域形成栅极占位符结构; 去除在栅极区域中形成栅极空隙的栅极占位符结构; 在结构上和栅极空隙中沉积高k绝缘体层以从高k杯沉积; 用铁电材料填充高k杯以形成铁电元件; 沉积高k上绝缘体层并去除多余的高k材料以在铁电元件上形成高k帽; 在顶部电极上沉积高k帽以形成栅电极和栅叠层; 在结构上沉积一层钝化氧化物; 将钝化氧化物从接触孔蚀刻到有源区和栅叠层; 并且对结构进行金属化以完成铁电存储晶体管。

55. 发明授权

US06503314B1 MOCVD ferroelectric and dielectric thin films depositions using mixed solvents 失效
标题翻译： MOCVD铁电和电介质薄膜沉积使用混合溶剂
公开(公告)号：US06503314B1
公开(公告)日：2003-01-07
申请号：US09649381
申请日：2000-08-28
申请人： Tingkai Li , Wei Wei Zhuang , Sheng Teng Hsu
发明人： Tingkai Li , Wei Wei Zhuang , Sheng Teng Hsu
IPC分类号： C23L1412
CPC分类号： C23C16/40 , C23C16/409
摘要： A ferroelectric and dielectric source solution for use in chemical vapor deposition processes includes a ferroelectric/dielectric chemical vapor deposition precursor; and a solvent for carrying the ferroelectric/dielectric chemical vapor deposition precursor taken from the group of solvents consisting essentially of type A solvents, including tetraglyme, triglyme, triethylenetetramine, N,N,N′,N′-tetramethylethylenediamine; N,N,N′,N′,N″,N″-pentamethyldiethylenetriamine; and 2,2′-bipyridine; type B solvents including tetrahydrofuran, butyl ethyl ether, tert-butyl ethyl ether, butyl ether, and pentyl ether; and type C solvents including iso-propanol, 2-butanol, 2-ethyl-1-hexanol, 2-pentanol, toluene, xylene and butyl acetate; and mixtures of solvent types A, B and C.
摘要翻译：用于化学气相沉积工艺的铁电和电介质源解决方案包括铁电/电介质化学气相沉积前体; 以及用于承载从基本上由A型溶剂组成的溶剂组中的铁电/电介质化学气相沉积前体的溶剂，包括四甘醇二甲醚，三甘醇二甲醚，三亚乙基四胺，N，N，N'，N'-四甲基乙二胺; N，N，N'，N'，N“，N” - 五甲基二亚乙基三胺; 和2,2'-联吡啶; B型溶剂包括四氢呋喃，丁基乙基醚，叔丁基乙基醚，丁基醚和戊基醚; 和C型溶剂，包括异丙醇，2-丁醇，2-乙基-1-己醇，2-戊醇，甲苯，二甲苯和乙酸丁酯; 和溶剂类型A，B和C的混合物。

56. 发明授权

US06457479B1 Method of metal oxide thin film cleaning 失效
标题翻译：金属氧化物薄膜清洗方法
公开(公告)号：US06457479B1
公开(公告)日：2002-10-01
申请号：US09965581
申请日：2001-09-26
申请人： Wei-Wei Zhuang , Fengyan Zhang , Sheng Teng Hsu , Tingkai Li
发明人： Wei-Wei Zhuang , Fengyan Zhang , Sheng Teng Hsu , Tingkai Li
IPC分类号： B08B600
CPC分类号： H01L21/02071 , B08B3/12 , Y10S134/902
摘要： A method of cleaning a metal oxide thin film on a silicon wafer, includes dipping the wafer in an organic solvent; drying the wafer in a nitrogen atmosphere; and stripping any photoresist from the wafer in an oxygen atmosphere under partial vacuum at a temperature of about 200° C. The wafer may also be cleaned by dipping in a polar organic solvent and subjecting the wafer to ultrasound while immersed in the solvent.
摘要翻译：一种在硅晶片上清洗金属氧化物薄膜的方法，包括将晶片浸入有机溶剂中; 在氮气气氛中干燥晶片; 并且在约200℃的温度下，在部分真空下，在氧气氛中从晶片上剥离任何光致抗蚀剂。也可以通过浸渍在极性有机溶剂中并将晶片浸入溶剂中使其超声波清洗晶片。

57. 发明授权

US06420740B1 Lead germanate ferroelectric structure with multi-layered electrode 失效
标题翻译：具有多层电极的锗酸铁锂结构
公开(公告)号：US06420740B1
公开(公告)日：2002-07-16
申请号：US09317780
申请日：1999-05-24
申请人： Fengyan Zhang , Tingkai Li , Sheng Teng Hsu
发明人： Fengyan Zhang , Tingkai Li , Sheng Teng Hsu
IPC分类号： H01L2976
CPC分类号： H01L28/56 , H01L21/31604 , H01L21/31691 , H01L28/75
摘要： The ferroelectric structure including a Pt/Ir layered electrode used in conjunction with a lead germanate (Pb5Ge3O11) thin film is provided. The electrode exhibits good adhesion to the substrate, and barrier properties resistant to oxygen and lead. Ferroelectric properties are improved, without detriment to the leakage current, by using a thin IrO2 layer formed in situ, during the MOCVD lead germanate (Pb5Ge3O11) thin film process. By using a Pt/Ir electrode, a relatively low MOCVD processing temperature is required to achieve c-axis oriented lead germanate (Pb5Ge3O11) thin film. The temperature range of MOCVD caxis oriented lead germanate (Pb5Ge3O11) thin film on top of Pt/Ir is 400-500° C. Further, a relatively large nucleation density is obtained, as compared to using single-layer iridium electrode. Therefore, the lead germanate (Pb5Ge3O11) thin film has a smooth surface, a homogeneous microstructure, and homogeneous ferroelectric properties. A method of forming the above-mentioned multi-layered electrode ferroelectric structure is also provided.
摘要翻译：提供了包括与锗酸铅（Pb5Ge3O11）薄膜结合使用的Pt / Ir层叠电极的铁电体结构。该电极对基材表现出良好的粘合性，并且对氧和铅具有阻挡性能。在MOCVD锗酸铅（Pb5Ge3O11）薄膜工艺中，通过使用在原位形成的薄的IrO 2层，铁电性能得到改善，而不损害漏电流。通过使用Pt / Ir电极，需要相对低的MOCVD处理温度来实现c轴取向的锗酸铅（Pb5Ge3O11）薄膜。 Pt / Ir顶部的MOCVD caxis取向铅酸铅（Pb5Ge3O11）薄膜的温度范围为400-500℃。与使用单层铱电极相比，获得了较大的成核密度。因此，锗酸铅（Pb5Ge3O11）薄膜表面光滑，微观组织均匀，铁电性能均匀。还提供了形成上述多层电极铁电体结构体的方法。

58. 发明授权

US06303502B1 MOCVD metal oxide for one transistor memory 失效
标题翻译： MOCVD金属氧化物用于一个晶体管存储器
公开(公告)号：US06303502B1
公开(公告)日：2001-10-16
申请号：US09588940
申请日：2000-06-06
申请人： Sheng Teng Hsu , David R. Evans , Tingkai Li , Jer-shen Maa , Wei-Wei Zhuang
发明人： Sheng Teng Hsu , David R. Evans , Tingkai Li , Jer-shen Maa , Wei-Wei Zhuang
IPC分类号： H01L2144
CPC分类号： H01L21/28291 , H01L29/78391
摘要： A method of fabricating a one-transistor memory includes, on a single crystal silicon substrate, depositing a bottom electrode structure on a gate oxide layer; implanting ions to form a source region and a drain region and activating the implanted ions spin coating the structure with a first ferroelectric layer; depositing a second ferroelectric layer; and annealing the structure to provide a c-axis ferroelectric orientation.
摘要翻译：制造单晶体管存储器的方法包括在单晶硅衬底上，在栅氧化层上沉积底电极结构; 注入离子以形成源极区域和漏极区域并激活注入的离子旋转涂覆第一铁电层的结构; 沉积第二铁电层; 并退火该结构以提供c轴铁电取向。

59. 发明授权

US06281022B1 Multi-phase lead germanate film deposition method 有权
标题翻译：多相锗酸铅成膜法
公开(公告)号：US06281022B1
公开(公告)日：2001-08-28
申请号：US09704496
申请日：2000-11-01
申请人： Tingkai Li , Fengyan Zhang , Sheng Teng Hsu
发明人： Tingkai Li , Fengyan Zhang , Sheng Teng Hsu
IPC分类号： H01L2100
CPC分类号： H01L21/31691 , C23C16/40 , C23C16/56 , H01L21/31604 , H01L28/55
摘要： A MOCVD deposition process has been provided for the deposition of an improved PGO ferroelectric film. The inclusion of a second phase of Pb3GeO5, along with the first phase of Pb5Ge3O11, provides the film with some ferroelastic properties which direct correspond to improved ferroelectric characteristics. The inclusion of the second phase regulates to first phase crystal grain size and promotes the preferred c-axis orientation of the grains. The degree of second phase Pb3GeO5 is regulated by controlling the amount of lead in the precursor, and with additional lead added to the reactor along the oxygen used to oxidize the lead-germanium film. Critical post-deposition annealing process are also described which optimize the ferroelectric properties of the PGO film. A multi-phase PGO film and capacitor structure including multi-phase PGO film of the present invention are provided by means of the invention.
摘要翻译：已经提供了用于沉积改进的PGO铁电体膜的MOCVD沉积工艺。包含Pb3GeO5的第二相以及Pb5Ge3O11的第一相为膜提供一些直接对应于改进的铁电特性的铁弹性质。第二相的包含调节到第一相晶粒尺寸并且促进晶粒的优选的c轴取向。第二相Pb3GeO5的程度是通过控制前体中的铅的量来调节的，并且沿着用于氧化铅 - 锗膜的氧加入到反应器中的另外的铅被调节。还描述了优化PGO膜的铁电性能的关键后沉积退火工艺。本发明提供了包括本发明多相PGO膜的多相PGO膜和电容器结构。

60. 发明授权

US07598108B2 Gallium nitride-on-silicon interface using multiple aluminum compound buffer layers 失效
公开(公告)号：US07598108B2
公开(公告)日：2009-10-06
申请号：US11825427
申请日：2007-07-06
申请人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
发明人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L29/155 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L21/02647 , H01L29/2003 , H01L29/205
摘要： A thermal expansion interface between silicon (Si) and gallium nitride (GaN) films using multiple buffer layers of aluminum compounds has been provided, along with an associated fabrication method. The method provides a (111) Si substrate and deposits a first layer of AlN overlying the substrate by heating the substrate to a relatively high temperature of 1000 to 1200° C. A second layer of AlN is deposited overlying the first layer of AlN at a lower temperature of 500 to 800° C. A third layer of AlN is deposited overlying the second layer of AlN by heating the substrate to the higher temperature range. Then, a grading Al1-XGaXN layer is formed overlying the third layer of AlN, where 0

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