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51. 发明授权

US5691661A Pulse generating circuit and a semiconductor memory device provided with the same 失效
标题翻译：脉冲发生电路和具有该脉冲发生电路的半导体存储器件
公开(公告)号：US5691661A
公开(公告)日：1997-11-25
申请号：US458775
申请日：1995-06-02
申请人： Tatsuya Fukuda , Shigeru Mori , Masanori Hayashikoshi , Seiji Sawada
发明人： Tatsuya Fukuda , Shigeru Mori , Masanori Hayashikoshi , Seiji Sawada
IPC分类号： G11C5/14 , G11C7/22 , G11C11/406 , H03K3/03 , H03K3/354 , H03L1/02 , G11C11/34
CPC分类号： G11C11/40626 , G11C11/406 , G11C5/147 , G11C7/22 , H03K3/0315
摘要： A pulse signal generating circuit includes a ring oscillator and an internal voltage generating circuit. The internal voltage generating circuit generates an internal voltage depending on an operation temperature. The internal voltage is low at a normal temperature, and is high at a high temperature. Each inverter in the ring oscillator is driven by the internal voltage supplied from the internal voltage generating circuit. Thereby, a period of a pulse signal increases at a normal temperature, and decreases at a high temperature.
摘要翻译：脉冲信号发生电路包括环形振荡器和内部电压产生电路。内部电压产生电路根据操作温度产生内部电压。内部电压在正常温度下为低电平，在高温下为高电平。环形振荡器中的每个反相器由内部电压产生电路提供的内部电压驱动。因此，脉冲信号的周期在正常温度下增加，并且在高温下降低。

52. 再颁专利

USRE35613E Dynamic random access memory with isolated well structure 失效
标题翻译：具有隔离井结构的动态随机存取存储器
公开(公告)号：USRE35613E
公开(公告)日：1997-09-23
申请号：US496569
申请日：1995-06-29
申请人： Kenichi Yasuda , Makoto Suwa , Shigeru Mori
发明人： Kenichi Yasuda , Makoto Suwa , Shigeru Mori
IPC分类号： H01L27/02 , H01L27/105 , H01L27/108
CPC分类号： H01L27/10805 , H01L27/0218 , H01L27/105
摘要： A semiconductor memory device includes a first conductivity type well in a first conductivity type semiconductor substrate surrounded by a second conductivity type well, one of a memory cell and an external input circuit arranged on the first conductivity type well and the other disposed outside the second conductivity type well. A predetermined power supply voltage is applied to the second conductivity type well and the first conductivity type well is connected to ground. In the structure, charge carriers injected from the external input circuit are absorbed in the second conductivity type well. As a result, the charge carriers are prevented from reaching the memory cell and destroying data stored therein. Therefore, it is possible to miniaturize transistors and increase integration density of dynamic random access memory devices without degrading the source to drain dielectric strength.
摘要翻译：半导体存储器件包括第一导电类型的半导体衬底中的第一导电类型的阱，该第一导电类型的半导体衬底由第二导电类型阱围绕，存储单元和布置在第一导电类型阱上的外部输入电路之一，另一个位于第二导电类型类型很好。对第二导电类型阱施加预定的电源电压，并且将第一导电类型阱连接到地。在该结构中，从外部输入电路注入的电荷载流子被吸收在第二导电型阱中。结果，防止电荷载体到达存储单元并破坏其中存储的数据。因此，可以使晶体管小型化并提高动态随机存取存储器件的集成密度，而不会使源极降低介电强度。

53. 发明授权

US5659424A Projecting lens and image display device 失效
标题翻译：投影镜头和图像显示装置
公开(公告)号：US5659424A
公开(公告)日：1997-08-19
申请号：US241633
申请日：1994-05-12
申请人： Atsuo Osawa , Hiroki Yoshikawa , Shigeru Mori , Naoyuki Ogura
发明人： Atsuo Osawa , Hiroki Yoshikawa , Shigeru Mori , Naoyuki Ogura
IPC分类号： G02B9/60 , G02B13/18 , G02B13/24 , G02B3/00
CPC分类号： G02B9/60 , G02B13/18 , G02B13/24
摘要： An image display device which is compact on the whole and low in cost, and which uses a plurality of projection lens systems each of which is constituted by five lens groups including a first aspherical lens group, a second aspherical lens group, a third biconvex lens group, a fourth aspherical lens group and a fifth aspherical lens group which are arranged in this order successively from a screen side, the third lens group having refractive power of not lower than 70% of the total power of the projection lens system, the respective peripheral shapes of the first and second aspherical lens groups being set to have a predetermined relation, a low-dispersion high-index glass material being used for a convex lens of a green projection lens system, a high-dispersion high-index glass material being used for convex lenses of blue and red projection lens systems.
摘要翻译：一种整体紧凑且成本低的图像显示装置，其使用多个投影透镜系统，每个投影透镜系统由包括第一非球面透镜组，第二非球面透镜组，第三双凸透镜的五个透镜组构成组，第四非球面透镜组和第五非球面透镜组，其从屏幕侧依次排列，第三透镜组的折射力不小于投影透镜系统的总功率的70％，折射率不小于投影透镜系统的总功率的70％第一非球面透镜组和第二非球面透镜组的周边形状被设定为具有预定关系，低分散高折射率玻璃材料用于绿色投影透镜系统的凸透镜，高分散高折射率玻璃材料为用于蓝色和红色投影透镜系统的凸透镜。

54. 发明授权

US5654924A Semiconductor memory device capable of operating with potentials of adjacent bit lines inverted during multi-bit test 失效
标题翻译：能够在多位测试期间反相的相邻位线的电位进行操作的半导体存储器件
公开(公告)号：US5654924A
公开(公告)日：1997-08-05
申请号：US640639
申请日：1996-05-01
申请人： Tomio Suzuki , Motoko Hara , Shigeru Mori
发明人： Tomio Suzuki , Motoko Hara , Shigeru Mori
IPC分类号： G11C29/00 , G11C29/06 , G11C29/28 , G11C29/36 , G11C29/50 , G11C7/00
CPC分类号： G11C29/50 , G11C29/28 , G11C29/36
摘要： A semiconductor memory device is provided which can apply a voltage stress to every adjacent bit lines even when data is written using a data bit compression function in a burn-in test mode. More specifically, when data is written using the data bit compression function in the test mode, an input buffer circuit is brought to a state in which it receives a signal corresponding to a signal dq0 applied to a specific input/output terminal by a switch circuit controlled by a test mode specify signal TE in common. When an inversion designate signal INV is in an active state, a complementary signal corresponding to a signal obtained by inversion of signal dq0 by an inverting circuit is output to internal data buses IO0, ZIO0, and IO2, ZIO2. On the other hand, a complementary signal corresponding to signal dq0 is output to internal data buses IO1, ZIO1, and IO3, ZIO3.
摘要翻译：提供了一种半导体存储器件，即使在老化测试模式下使用数据位压缩功能写数据时，也可以向每个相邻位线施加电压应力。更具体地，当在测试模式中使用数据位压缩功能写入数据时，输入缓冲器电路进入其中通过开关电路接收与施加到特定输入/输出端子的信号dq0相对应的信号的状态由测试模式控制，共同指定信号TE。当反转指示信号INV处于活动状态时，与通过反相电路的信号dq0的反相获得的信号相对应的互补信号被输出到内部数据总线IO0，ZIO0和IO2，ZIO2。另一方面，对应于信号dq0的互补信号被输出到内部数据总线IO1，ZIO1和IO3，ZIO3。

55. 发明授权

US5608682A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US5608682A
公开(公告)日：1997-03-04
申请号：US554503
申请日：1995-11-07
申请人： Shinichi Jinbo , Shigeru Mori
发明人： Shinichi Jinbo , Shigeru Mori
IPC分类号： G11C11/406 , G11C7/00
CPC分类号： G11C11/406
摘要： An address generating circuit and an address switching circuit of a DRAM output address signals A0 to A11 according to a refresh cycle time set by the user being less than a predetermined value, and output address signals A0 to A10 according to the refresh cycle time being the predetermined value or more. A row decoder selects one word line in response to the signals A0 to A11, and selects two word lines in response to the signals A0 to A10. Since refresh is carried out by selecting two word lines when the refresh cycle time is at the predetermined value or more, disappearance of data can be prevented.
摘要翻译：根据由用户设定的刷新周期时间，DRAM输出地址信号A0〜A11的地址生成电路和地址切换电路，根据刷新周期时间，输出地址信号A0〜A10为预定值以上。行解码器响应于信号A0至A11选择一个字线，并响应于信号A0至A10选择两个字线。由于当刷新周期时间在预定值以上时通过选择两条字线进行刷新，所以可以防止数据的消失。

56. 发明授权

US5600496A Device for controlling a zoom lens 失效
标题翻译：用于控制变焦镜头的装置
公开(公告)号：US5600496A
公开(公告)日：1997-02-04
申请号：US397647
申请日：1995-03-02
申请人： Shigeru Mori
发明人： Shigeru Mori
IPC分类号： G03B13/36 , G02B7/02 , G02B7/08 , G02B7/28 , G02B15/14 , G02B15/16 , H04N5/232
CPC分类号： G02B15/14
摘要： A zoom lens device includes an imaging device for converting light from an object to an electrical signal, a zoom lens and a focusing lens disposed between the object and the imaging device, a zooming adjusting circuit for adjusting a movement of the zoom lens, focus adjusting circuits for adjusting movements of the focusing lens, correcting circuits for outputting an adjustment value in response to adjustment of the zoom lens, a temperature detecting circuit for detecting a temperature around the object, and a coefficient circuit for correcting a correction value of the correcting circuit based on an output signal of the temperature detecting circuit.
摘要翻译：变焦透镜装置包括：用于将来自物体的光转换成电信号的成像装置，设置在物体和成像装置之间的变焦透镜和聚焦透镜;变焦调整电路，用于调节变焦透镜的移动;聚焦调节用于调整聚焦透镜的运动的电路，响应于变焦透镜的调节而输出调节值的校正电路，用于检测物体周围温度的温度检测电路，以及用于校正校正电路的校正值的系数电路基于温度检测电路的输出信号。

57. 发明授权

US5549851A Conductive polymer composition 失效
标题翻译：导电聚合物组成
公开(公告)号：US5549851A
公开(公告)日：1996-08-27
申请号：US377342
申请日：1995-01-24
申请人： Motoo Fukushima , Mikio Aramata , Shigeru Mori
发明人： Motoo Fukushima , Mikio Aramata , Shigeru Mori
IPC分类号： H01B1/12 , H01B1/20 , H01B1/04 , H01B1/24
CPC分类号： H01B1/12
摘要： A silicon containing polymer such as a polysilane, poly(disilanylenephenylene), and poly(disilanyleneethynylene) is admixed with an amine compound and then doped with an oxidizing dopant, typically iodine and ferric chloride, to produce a highly conductive polymer composition having improved shapability. The composition is easily applicable, as by spin coating, to form a highly conductive film or coating.
摘要翻译：将含硅聚合物如聚硅烷，聚（二苯基亚乙基亚苯基）和聚（二亚乙基亚乙炔基）与胺化合物混合，然后掺杂氧化掺杂剂，通常为碘和氯化铁，以产生具有改进的成型性的高导电性聚合物组合物。通过旋涂可以容易地应用该组合物以形成高导电性膜或涂层。

58. 发明授权

US5537171A Liquid crystal projection display 失效
标题翻译：液晶投影显示
公开(公告)号：US5537171A
公开(公告)日：1996-07-16
申请号：US320313
申请日：1994-10-11
申请人： Masanori Ogino , Yoshiaki Iwahara , Takeo Yamada , Shigeru Mori , Fumio Inoue , Akio Yamamoto
发明人： Masanori Ogino , Yoshiaki Iwahara , Takeo Yamada , Shigeru Mori , Fumio Inoue , Akio Yamamoto
IPC分类号： G03B21/14 , G03B21/62 , H04N9/31 , G03B21/00
CPC分类号： H04N9/3108 , G03B21/006 , G03B21/14 , G03B21/208 , G03B21/625 , H04N9/3155 , H04N9/3194
摘要： A liquid crystal projection display capable of functioning at a high light capturing efficiency and a high relative corner illuminance comprises a light source means including a light source, a liquid crystal panel means, a projection lens means and a screen means. A liquid lens formed by sealing a liquid in a space between opposite transparent members is disposed near the light source or the real image of the light source to enhance the relative corner illuminance without reducing the light capturing efficiency by multiplying the angle of divergence of light rays emitted by the light source by the reciprocal of the refractive index of the liquid. A first optical system disposed on the entrance side of the liquid crystal panel is provided with a relative corner illuminance enhancing means comprising a first light converging means disposed relatively near to the light source means, and a second light converging means disposed relatively remote from the light source means. The first light converging means enhances the relative corner illuminance on the entrance surface of the second light converging means.
摘要翻译：能够以高的光捕获效率和高的相对角照度起作用的液晶投影显示器包括光源装置，其包括光源，液晶面板装置，投影透镜装置和屏幕装置。通过在相对的透明构件之间的空间中密封液体而形成的液体透镜设置在光源附近或光源的实像附近，以通过将光线的发散角相乘来降低光捕获效率，从而提高相对的角度照度由光源发射的液体的折射率的倒数。设置在液晶面板的入口侧的第一光学系统设置有相对角照明增强装置，其包括相对靠近光源装置设置的第一聚光装置和相对远离光的第二聚光装置源意味着。第一聚光装置增强第二聚光装置的入射面上的相对角照度。

59. 发明授权

US5407987A Polycyclic aromatic group - pendant polysilanes and conductive polymers derived therefrom 失效
标题翻译：多环芳基 - 侧基聚硅烷和由其衍生的导电聚合物
公开(公告)号：US5407987A
公开(公告)日：1995-04-18
申请号：US202627
申请日：1994-02-28
申请人： Motoo Fukushima , Eiichi Tabei , Shigeru Mori
发明人： Motoo Fukushima , Eiichi Tabei , Shigeru Mori
IPC分类号： C08G77/60 , H01B1/12 , C08K5/06
CPC分类号： C08G77/60 , H01B1/12
摘要： Polycyclic aromatic group-pendant polysilanes of the following general formula are described.[(R.sup.1 R.sup.2 Si).sub.k (R.sup.3 R.sup.4 Si).sub.m ].sub.nwherein R.sup.1, R.sup.2, R.sup.3, and R.sup.4 are, respectively, a hydrogen atom or a monovalent hydrocarbon group provided that at least one of R.sup.3 and R.sup.4 is a monovalent hydrocarbon group having a polycyclic aromatic group or a biphenyl group. When the polysilane is doped with an oxidative dopant, the polymer is rendered electrically conductive and has thus wide utility in various fields of photoconductive and electrically conductive materials without involving degradation of the polysilane.
摘要翻译：描述了以下通式的多环芳基 - 侧基聚硅烷。 [（R 1 R 2 Si）k（R 3 R 4 Si）m] n其中R 1，R 2，R 3和R 4分别为氢原子或一价烃基，条件是R 3和R 4中的至少一个为具有多环芳香族的一价烃基组或联苯基。当聚硅烷掺杂有氧化掺杂剂时，聚合物变得具有导电性，因此在光导和导电材料的各个领域中具有广泛的用途，而不涉及聚硅烷的降解。

60. 发明授权

US5357478A Semiconductor integrated circuit device including a plurality of cell array blocks 失效
标题翻译：包括多个单元阵列块的半导体集成电路装置
公开(公告)号：US5357478A
公开(公告)日：1994-10-18
申请号：US767332
申请日：1991-09-30
申请人： Shigeru Kikuda , Shigeru Mori , Yoshikazu Morooka , Hiroshi Miyamoto , Makoto Suwa , Mitsuya Kinoshita
发明人： Shigeru Kikuda , Shigeru Mori , Yoshikazu Morooka , Hiroshi Miyamoto , Makoto Suwa , Mitsuya Kinoshita
IPC分类号： H01L21/822 , G11C5/02 , G11C11/401 , H01L27/04 , H01L27/10 , G11C8/00
CPC分类号： G11C5/025
摘要： A plurality of sub chips are formed on a chip. An input/output buffer region is arranged around the plurality of sub chips. Each sub chip includes a sub chip control circuit region and a plurality of memory cell array blocks. Each memory cell array block includes a memory cell array region, a row decoder and control circuit region, a sense amplifier region and an input/output latch region.
摘要翻译：在芯片上形成多个子芯片。输入/输出缓冲区布置在多个子芯片周围。每个子芯片包括子芯片控制电路区域和多个存储单元阵列块。每个存储单元阵列块包括存储单元阵列区域，行解码器和控制电路区域，读出放大器区域和输入/输出锁存区域。

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