会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 51. 发明授权
    • Ultra-thin high-quality germanium on silicon by low-temperature epitaxy and insulator-capped annealing
    • 通过低温外延和绝缘体封端退火在硅上超薄的高品质锗
    • US07968438B2
    • 2011-06-28
    • US11835855
    • 2007-08-08
    • Sang M. HanQiming Li
    • Sang M. HanQiming Li
    • H01L21/20H01L21/36
    • H01L21/02664H01L21/02381H01L21/0245H01L21/02532H01L21/02546H01L21/02667
    • Exemplary embodiments provide semiconductor devices with a high-quality semiconductor material on a lattice mismatched substrate and methods for their manufacturing using low temperature growth techniques followed by an insulator-capped annealing process. The semiconductor material can have high-quality with a sufficiently low threading dislocation (TD) density, and can be effectively used for integrated circuit applications such as an integration of optically-active materials (e.g., Group III-V materials) with silicon circuitry. In an exemplary embodiment, the high-quality semiconductor material can include one or more ultra-thin high-quality semiconductor epitaxial layers/films/materials having a desired thickness on the lattice mismatched substrate. Each ultra-thin high-quality semiconductor epitaxial layer can be formed by capping a low-temperature grown initial ultra-thin semiconductor material, annealing the capped initial ultra-thin semiconductor material, and removing the capping layer.
    • 示例性实施例在晶格不匹配的衬底上提供具有高质量半导体材料的半导体器件,以及使用低温生长技术接着进行绝缘体封端退火工艺的制造方法。 半导体材料可以具有足够低的穿透位错(TD)密度的高质量,并且可以有效地用于集成电路应用,例如光学活性材料(例如III-V族材料)与硅电路的集成。 在示例性实施例中,高质量半导体材料可以包括在晶格失配衬底上具有期望厚度的一个或多个超薄高品质半导体外延层/薄膜/材料。 每个超薄的高质量半导体外延层可以通过封装低温生长的初始超薄半导体材料,退火封装的初始超薄半导体材料和去除覆盖层来形成。
    • 53. 发明授权
    • Methods and systems for resistivity anisotropy formation analysis
    • 电阻率各向异性形成分析的方法和系统
    • US06950748B2
    • 2005-09-27
    • US10604492
    • 2003-07-25
    • Cheng Bing LiuQiming LiFrank P. ShrayJacques Tabanou
    • Cheng Bing LiuQiming LiFrank P. ShrayJacques Tabanou
    • G01V3/20G01V3/38
    • G01V3/20
    • Techniques for determining a formation property by simplifying various two-geological-layer or multi-geological-layer models into a multi-electrical-layer model. A volume fraction of a layer in a multi-electrical-layer model is determined for an anisotropic region (sliding window) of the formation. The multi-electrical-layer electrical model includes a relative-lower-resistivity layer and a relative-higher-resistivity layer. A high-resolution resistivity measurement is used in the determination and resistivities for the relative-lower-resistivity layer and for the relative-higher-resistivity layer based on the volume fraction and bulk resistivity measure ments of the anisotropic region are determined. The formation property is based on the volume fraction, the resistivity of the relative-lower-resistivity layer, the resistivity of the relative-higher-resistivity layer, a total porosity of the anisotropic region, and bulk resistivity measurements of the region.
    • 通过将各种地质层或多地质层模型简化为多电层模型来确定地层特性的技术。 针对地层的各向异性区域(滑动窗口)确定多电层模型中的层的体积分数。 多电层电气模型包括相对低电阻率层和相对较高电阻率的层。 在相对较低电阻率层的确定和电阻率中使用高分辨率电阻率测量,并且基于各向异性区域的体积分数和体电阻率测量确定相对较高电阻率层。 形成性质基于体积分数,相对低电阻率层的电阻率,相对高电阻率层的电阻率,各向异性区域的总孔隙率和该区域的体电阻率测量值。