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    • 52. 发明授权
    • Integrated circuit memory devices having internal command generators therein that support extended command sets using independent and dependent commands
    • 其中具有内部命令发生器的集成电路存储器件支持使用独立和相关命令的扩展命令集
    • US07817494B2
    • 2010-10-19
    • US12236978
    • 2008-09-24
    • Young-soo SohnKwang-Il ParkSeung-Jun Bae
    • Young-soo SohnKwang-Il ParkSeung-Jun Bae
    • G11C11/00
    • G11C11/4076G11C7/1006G11C7/1072G11C7/22G11C8/18
    • Integrated circuit memory devices include an internal command generator and a memory control circuit responsive to an internal command generated by the internal command generator. The internal command generator is configured to generate an internal command in response to a combination of an independent command and at least one dependent command received in sequence by the memory device. For example, the internal command generator may be configured to require the independent command to follow the at least one dependent command in the sequence when generating the internal command from the combination of the independent and dependent commands. Alternatively, the internal command generator may be configured to require the independent command to precede the at least one dependent command in the sequence before generating the internal command from the combination of the independent and dependent commands. These independent and dependent commands may be received by the memory device as respective multi-bit external command signals.
    • 集成电路存储器件包括响应于由内部命令发生器产生的内部命令的内部命令发生器和存储器控制电路。 内部命令生成器被配置为响应于独立命令和由存储器装置依次接收的至少一个依赖命令的组合来生成内部命令。 例如,内部命令生成器可以被配置为在从独立命令和从属命令的组合生成内部命令时,要求独立命令遵循序列中的至少一个从属命令。 或者,内部命令生成器可以被配置为在从独立命令和从属命令的组合生成内部命令之前,要求独立命令在序列中的至少一个从属命令之前。 这些独立和依赖的命令可以被存储器装置接收为相应的多位外部命令信号。
    • 53. 发明授权
    • Side illumination lens and luminescent device using the same
    • 侧面照明镜头及使用其的发光装置
    • US07748873B2
    • 2010-07-06
    • US11576882
    • 2005-10-07
    • Do-Hyung KimChung-Hoon LeeKeon-Young LeeKwang-Il Park
    • Do-Hyung KimChung-Hoon LeeKeon-Young LeeKwang-Il Park
    • F21V5/00
    • G02B19/0071G02B19/0028G02B19/0061H01L33/54H01L2224/48091H01L2224/48247H01L2924/19107H01L2924/00014
    • The present invention relates to a side illumination lens and a luminescent device using the same, and provides a body, a total reflection surface with a total reflection slope with respect to a central axis of the body, and a linear and/or curved refractive surface(s) formed to extend from a periphery of the total reflection surface; and a luminescent device including the lens. According to the present invention, a lens with total internal reflection surfaces with different slopes, and a linear and/or curved refractive surface(s) allows light emitted forward from a luminescent chip to be guided to a side of the lens. Further, a linear surface(s) formed in a direction perpendicular or parallel to a central axis of a lens and a curved surface are formed on an edge of the lens so that a process of fabricating the lens is facilitated, thereby reducing a defective rate and fabrication costs of the lens.
    • 本发明涉及一种侧面照明透镜及其使用该发光装置的发光装置,其特征在于,具有相对于所述主体的中心轴线具有全反射斜率的全身反射面以及直线和/或弯曲的折射面 形成为从全反射表面的周边延伸; 以及包括该透镜的发光装置。 根据本发明,具有具有不同斜率的全内反射表面以及线性和/或弯曲折射表面的透镜允许从发光芯片向前发射的光被引导到透镜的一侧。 此外,在透镜的边缘上形成在垂直于或平行于透镜的中心轴线的方向上形成的线性表面,从而便于制造透镜的工艺,从而降低了缺陷率 和镜头的制造成本。
    • 54. 发明授权
    • Circuit and method for detecting phase
    • 电路和相位检测方法
    • US07183810B2
    • 2007-02-27
    • US11188952
    • 2005-07-25
    • Kwang-Il Park
    • Kwang-Il Park
    • H03L7/08
    • G01R25/005H03D13/003
    • A circuit for detecting phase includes a first inverter, a second inverter, a differential amplifier, an output load latch and an output latch. The first and second inverters receive an input signal and an inverted input signal to generate first and second differential input signals in response to a clock signal and first and second control signals, respectively, and shut off transmissions of the input signal and the inverted input signal. The differential amplifier differentially amplifies the first and second differential input signals in response to the clock signal to provide first and second differential output signals as the first and second control signals. The output load latch latches the first and second differential output signals to generate the first and second latch output signals. The output latch latches the first and second latch output signals to output a phase detection signal.
    • 用于检测相位的电路包括第一反相器,第二反相器,差分放大器,输出负载锁存器和输出锁存器。 第一和第二反相器接收输入信号和反相输入信号,以分别响应于时钟信号和第一和第二控制信号产生第一和第二差分输入信号,并切断输入信号和反相输入信号的传输 。 差分放大器响应于时钟信号差分放大第一和第二差分输入信号,以提供第一和第二差分输出信号作为第一和第二控制信号。 输出负载锁存器锁存第一和第二差分输出信号以产生第一和第二锁存器输出信号。 输出锁存器锁存第一和第二锁存器输出信号以输出相位检测信号。
    • 55. 发明申请
    • Semiconductor device, semiconductor memory device and data strobe method
    • 半导体器件,半导体存储器件和数据选通方法
    • US20060203573A1
    • 2006-09-14
    • US11371831
    • 2006-03-09
    • Joung-Yeal KimKwang-Il ParkSung-Hoon Kim
    • Joung-Yeal KimKwang-Il ParkSung-Hoon Kim
    • G11C7/00
    • G11C7/1051G11C7/1066
    • Semiconductor devices having an interface of an open drain or a pseudo-open drain type are provided, and the semiconductor devices include a data strobe (DQS) control signal generating circuit, a DQS control circuit and an output unit. The generating circuit generates a first DQS control signal and a second DQS control signal, and the control circuit controls a data strobe signal by sequentially changing a state of a following section next to a postamble section of the data strobe signal in response to a clock signal; the first and second DQS control signals, from a first logical state of the postamble section to a second logical state, and then from the second logical state to a high impedance state after a first predetermined time. Operations at a high frequency may be possible by controlling a data strobe signal. Related controlling methods are provided.
    • 提供具有开漏或伪开漏型接口的半导体器件,并且半导体器件包括数据选通(DQS)控制信号发生电路,DQS控制电路和输出单元。 发生电路产生第一DQS控制信号和第二DQS控制信号,并且控制电路通过响应于时钟信号顺序地改变数据选通信号的后同步部分的后续部分的状态来控制数据选通信号 ; 第一和第二DQS控制信号,从后同步码段的第一逻辑状态到第二逻辑状态,然后从第二逻辑状态到第一预定时间之后的高阻抗状态。 通过控制数据选通信号可以实现高频操作。 提供了相关的控制方法。
    • 57. 发明授权
    • Forced downshift control method for automatic transmission
    • 强制换挡控制方式自动变速箱
    • US06287238B1
    • 2001-09-11
    • US09469542
    • 1999-12-22
    • Kwang-Il Park
    • Kwang-Il Park
    • F16H6108
    • F16H61/0437F16H59/46F16H61/08F16H2061/0444Y10T477/6937Y10T477/69373Y10T477/693762Y10T477/693964
    • A forced downshift control method for automatic transmissions, wherein, if shift signals of a forced 4-2 downshift are input, a first shift control solenoid valve (SCSV-A) is controlled to OFF; a second shift control solenoid valve SCSV-B is maintained in an OFF state for a predetermined period of time (t1) then controlled to ON; a third shift control solenoid valve (SCSV-C) is continuously maintained in an ON state, then is immediately controlled to OFF and first and second pressure control solenoid valves (PCSV-A) and (PCSV-B) are duty controlled. The method further includes performing a first duty control operation to complete shifting through control of the first pressure control solenoid valve (PCSV-A); performing a second duty control operation to complete shifting by performing a second open-loop duty control operation; performing a third duty control operation to complete shifting through control of the second pressure control solenoid vale (PCSV-A); performing a fourth duty control operation to complete shifting by performing a fourth open-loop duty control operation; performing a fifth duty control operation to complete shifting by performing a fifth open-loop duty control operation; and performing a sixth open-loop duty control operation, regardless of variations in power conditions, to complete shifting.
    • 一种用于自动变速器的强制换挡控制方法,其中,如果输入了强制4-2降档的换挡信号,则将第一变速控制电磁阀(SCSV-A)控制为OFF; 第二换档控制电磁阀SCSV-B在预定时间段(t1)保持在OFF状态,然后控制为ON; 第三变速控制电磁阀(SCSV-C)被连续地保持在接通状态,然后被立即控制为断开,第一和第二压力控制电磁阀(PCSV-A)和(PCSV-B)被占空控制。 该方法还包括执行第一占空比控制操作以完成通过第一压力控制电磁阀(PCSV-A)的控制的切换; 通过执行第二开环占空比控制操作来执行第二占空比控制操作以完成移位; 执行第三占空比控制操作以完成通过第二压力控制电磁阀(PCSV-A)的控制的切换; 执行第四占空比控制操作以通过执行第四开环占空比控制操作来完成移位; 执行第五占空比控制操作以通过执行第五开环占空比控制操作来完成移位; 并且执行第六开环占空比控制操作,而不管功率条件的变化如何,完成移位。
    • 60. 发明授权
    • Temperature sensing circuit of semiconductor device
    • 半导体器件温度检测电路
    • US08342747B2
    • 2013-01-01
    • US12694624
    • 2010-01-27
    • Si-Hong KimKwang-Il ParkHyun-Joong Kim
    • Si-Hong KimKwang-Il ParkHyun-Joong Kim
    • G01K7/14
    • G01K1/02G01K7/32G01K2219/00
    • A temperature sensing circuit of a semiconductor device includes a code signal generator, a comparator, a reference clock generator and a final temperature code signal generator. The code signal generator is configured to output a first count signal having an increase rate that varies according to a change in temperature. The comparator is configured to receive the first count signal and a control signal, compare the first count signal with the control signal and output a comparison signal. The reference clock generator is configured to generate a reference clock having a uniform period regardless of the change in temperature during an activation period of the comparison signal. The final temperature code signal generator is configured to count pulses of the reference clock, generate a second count signal, modify the second count signal using an offset value, and output the modified second count signal as a final temperature code signal.
    • 半导体器件的温度检测电路包括代码信号发生器,比较器,参考时钟发生器和最终温度代码信号发生器。 代码信号发生器被配置为输出具有根据温度变化而变化的增加率的第一计数信号。 比较器被配置为接收第一计数信号和控制信号,将第一计数信号与控制信号进行比较并输出比较信号。 参考时钟发生器被配置为在比较信号的激活周期期间生成具有均匀周期的参考时钟,而不管温度变化。 最终温度代码信号发生器被配置为对参考时钟的脉冲进行计数,产生第二计数信号,使用偏移值修改第二计数信号,并输出修改的第二计数信号作为最终温度代码信号。