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51. 发明授权

US5754133A Register circuit having a plurality of thresholding circuits 失效
标题翻译：具有多个阈值电路的寄存器电路
公开(公告)号：US5754133A
公开(公告)日：1998-05-19
申请号：US513657
申请日：1995-08-11
申请人： Guoliang Shou , Makoto Yamamoto , Sunao Takatori
发明人： Guoliang Shou , Makoto Yamamoto , Sunao Takatori
IPC分类号： G06J1/00 , H03M1/42 , H03M1/34
CPC分类号： H03M1/42 , G06J1/00
摘要： A register circuit for holding an analog input voltage includes a plurality of thresholding circuits of stepwise thresholds, an integrating circuit for integrating outputs of the thresholding circuits and a switching circuit for alternatively inputting an output of the integrating circuit or the analog input voltage to the thresholding circuits as the input voltage of the capacitive coupling.
摘要翻译：用于保持模拟输入电压的寄存器电路包括多个阶跃阈值阈值电路，用于积分阈值电路的输出的积分电路和用于交替地将积分电路的输出或模拟输入电压输入到阈值的开关电路电路作为电容耦合的输入电压。

52. 发明授权

US5686861A Filter circuit 失效
标题翻译：滤波电路
公开(公告)号：US5686861A
公开(公告)日：1997-11-11
申请号：US630505
申请日：1996-04-10
申请人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
IPC分类号： H03H11/04 , H03K5/00 , H04B1/10
CPC分类号： H03H11/04
摘要： A filter circuit that consumes very little electric power. The active filter is a linear inverter constructed by 1) an inverting amplifying portion composed of an odd number of MOS inverters serially connected, 2) a grounded capacitance connected between an output of the inverting amplifying portion and ground, 3) a balancing resistance having a pair of resistances for connecting an output of one of the MOS inverters, other than the last MOS inverter, to the supply voltage and the ground, respectively, and 4) a feedback impedance for connecting the output and input of the inverting amplifying portion. A coupling capacitance is connected to the input of the linear inverter and a plurality of filter circuits are connected to an input of the coupling capacitance.
摘要翻译：一种消耗很少电力的滤波电路。有源滤波器是一种线性反相器，由1）由串联连接的奇数个MOS反相器组成的反相放大部分，2）连接在反相放大部分的输出端和地之间的接地电容，3）平衡电阻，具有一对电阻分别用于将MOS逆变器之一以外的输出连接到电源电压和接地，以及4）用于连接反相放大部分的输出和输入的反馈阻抗。耦合电容连接到线性反相器的输入，并且多个滤波电路连接到耦合电容的输入。

53. 发明授权

US5650752A Amplifier circuit with parallel connected amplifiers 失效
标题翻译：具有并联放大器的放大器电路
公开(公告)号：US5650752A
公开(公告)日：1997-07-22
申请号：US458179
申请日：1995-06-02
申请人： Guoliang Shou , Makoto Yamamoto , Sunao Takatori
发明人： Guoliang Shou , Makoto Yamamoto , Sunao Takatori
IPC分类号： H03F3/68 , H03F1/34 , H03F1/48 , H03F3/193
CPC分类号： H03F3/193 , H03F1/483
摘要： An amplifier circuit has a wide frequency range which is broader than the frequency range expected from its circuit parameters. The amplifier circuit comprises a plurality of unit amplifier circuits connected in parallel. Each unit amplifier circuit contains an odd number of inverters serially connected from the first stage to the last stage, an input capacitance connected to the input terminal of the first stage, and a feedback capacitance connecting the output terminal of the inverter of the last stage to the input terminal of the inverter of the first stage. Thus, the amplifier circuit operates in a wide frequency range with little decrease in gain at high frequencies.
摘要翻译：放大器电路具有比从其电路参数预期的频率范围宽的宽的频率范围。放大器电路包括并联连接的多个单元放大器电路。每个单位放大器电路包括从第一级到最后级串联连接的奇数个反相器，连接到第一级的输入端的输入电容和将最后级的反相器的输出端连接到第一级逆变器的输入端。因此，放大器电路在宽频率范围内工作，在高频下的增益几乎没有降低。

54. 发明授权

US5604458A Scaler circuit 失效
标题翻译：整流电路
公开(公告)号：US5604458A
公开(公告)日：1997-02-18
申请号：US457445
申请日：1995-06-01
申请人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
IPC分类号： G06G7/12 , G06J1/00 , H03G1/00 , G06F7/44
CPC分类号： G06J1/00 , G06G7/12 , H03G1/0094
摘要： A scalar circuit includes serially connected inverters connected to one another via a plurality of connecting lines. A plurality of input lines are provided to the input of a first inverter in the serially connected inverters. A plurality of feedback lines are provided between the input and output of each inverter. A capacitance and a switch is provided in each connecting line, input line and feedback line. The switch connects a terminal of the capacitance to ground while simultaneously disconnecting the ends of that line from one another. The switches are cooperatively actuated so that the effective composite capacitance in the feedback lines and the connecting lines are substantially equal. In addition, the composite capacitance of in the input lines and the connecting lines are substantially equal.
摘要翻译：标量电路包括通过多条连接线彼此连接的串联逆变器。多个输入线被提供给串联逆变器中的第一反相器的输入端。在每个逆变器的输入和输出之间提供多条反馈线。每个连接线，输入线和反馈线都提供电容和开关。开关将电容的端子连接到地，同时断开该线的端部。这些开关被协同地致动，使得反馈线和连接线中的有效复合电容基本相等。此外，输入线和连接线中的复合电容基本相等。

55. 发明授权

US5579411A High-speed circuit for performing pattern matching of image data and the like suitable for large scale integration implementation 失效
标题翻译：用于执行适合于大规模集成实现的图像数据等的图案匹配的高速电路
公开(公告)号：US5579411A
公开(公告)日：1996-11-26
申请号：US426587
申请日：1995-04-21
申请人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
IPC分类号： G06T1/00 , G06F17/15 , G06K9/64 , G06T7/00 , G06K9/62
CPC分类号： G06K9/6202 , G06F17/153
摘要： A pattern matching system includes a circuit that matches an input image with a template based on a correlation function. The circuit has a structure which makes it particularly suitable for implementation in Large Scale Integration (LSI) technologies. A pattern matching circuit according to this invention sets up a threshold value of a correlation coefficient and evaluates the following formula,E=N.sup.2 {.SIGMA.(f.sub.i -f.sub.m) (g.sub.i -g.sub.m)}.sup.2 -p.sub.th.sup.2 N.sup.2 .sigma..sub.f.sup.2 .sigma..sub.g.sup.2where N is a number of input data points. f.sub.1 is an input data point. f.sub.m is a mean value of input data points. g.sub.1 is a template data point. g.sub.m is a mean value of template data points. .sigma..sub.f is a standard deviation of input data points and .sigma..sub.g is a standard deviation of template data points in a range over a threshold value.
摘要翻译：模式匹配系统包括基于相关函数将输入图像与模板匹配的电路。该电路具有特别适用于大规模集成（LSI）技术实现的结构。根据本发明的模式匹配电路建立相关系数的阈值，并且评估下列公式：E = N2 {SIGMA（fi-fm）（gi-gm）} 2-pth2N2 sigma f2 sigma g2其中N是输入数据点数。 f1是输入数据点。 fm是输入数据点的平均值。 g1是模板数据点。 gm是模板数据点的平均值。西格玛f是输入数据点的标准偏差，σg是在超过阈值的范围内的模板数据点的标准偏差。

56. 发明授权

US5490099A Method of multiplying an analog value by a digital value 失效
标题翻译：将模拟值乘以数字值的方法
公开(公告)号：US5490099A
公开(公告)日：1996-02-06
申请号：US304475
申请日：1994-09-12
申请人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
IPC分类号： G06G7/16 , G06J1/00 , H03M1/80
CPC分类号： G06J1/00 , H03M1/804
摘要： A method for directly multiplying an analog and a digital data without converting from analog-to-digital or digital-to-analog. An analog input voltage is provided to a plurality of switches. A digital input voltage including bits b.sub.0 to b.sub.7 which are provided as control signals to the switches. The switch output is integrated giving weights by means of a capacitive coupling, and a sign bit is added by a capacitive coupling CP with a double weight of the most significant bit ("MSB") of the digital input.
摘要翻译：一种用于直接将模拟和数字数字相乘而不从模数转换为数模或数模转换的方法。模拟输入电压被提供给多个开关。包括作为开关的控制信号提供的位b0至b7的数字输入电压。开关输出通过电容耦合进行积分给出权重，并且通过具有数字输入的最高有效位（“MSB”）的双重权重的电容耦合CP添加符号位。

57. 发明授权

US5471161A Circuit for calculating the minimum value 失效
标题翻译：用于计算最小值的电路
公开(公告)号：US5471161A
公开(公告)日：1995-11-28
申请号：US322407
申请日：1994-10-12
申请人： Guoliang Shou , Weikang Yang , Wiwat Wongwarawipat , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Weikang Yang , Wiwat Wongwarawipat , Sunao Takatori , Makoto Yamamoto
IPC分类号： H03K5/08 , G01R19/00 , H03K19/0944 , H03K5/153
CPC分类号： G01R19/0038
摘要： A circuit calculating the minimum value comprising a plural number of pMOS, wherein source of the plural pMOS are connected to a power source with lower voltage than a drain, the drain is grounded through high resistance, in input voltage is connected to each pMOS, and a common output is connected to a drain of each pMOS.
摘要翻译：计算包含多个pMOS的最小值的电路，其中多个pMOS的源极连接到电压低于漏极的电源，漏极通过高电阻接地，输入电压连接到每个pMOS，以及一个共同的输出连接到每个pMOS的漏极。

58. 发明授权

US5467376A Incrementing and decrementing counter circuits 失效
标题翻译：递增递减计数器电路
公开(公告)号：US5467376A
公开(公告)日：1995-11-14
申请号：US308460
申请日：1994-09-19
申请人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
IPC分类号： G06F7/50 , G06F7/505 , H03K25/00
CPC分类号： G06F7/5055
摘要： A counter circuit converts a full count to a zero count and a zero count to a full count. An incrementing counter circuit according to the present invention has a plurality of threshold circuits with stepwise thresholds. An output of the highest threshold circuit is used as a cut off signal for other threshold circuits. A decrementing counter circuit according to the present invention has a plurality of threshold circuits from the lowest threshold to the highest thresholds. An output of the lowest threshold circuit is used as a closing signal for other threshold circuits.
摘要翻译：计数器电路将完全计数转换为零计数，将零计数转换为完全计数。根据本发明的递增计数器电路具有多个具有逐步阈值的阈值电路。最高阈值电路的输出用作其他阈值电路的截止信号。根据本发明的递减计数器电路具有从最低阈值到最高阈值的多个阈值电路。最低阈值电路的输出用作其他阈值电路的闭合信号。

59. 发明授权

US5455581A Digital-to-analog converter employing a common trigger and reference signal 失效
标题翻译：采用公共触发和参考信号的数模转换器
公开(公告)号：US5455581A
公开(公告)日：1995-10-03
申请号：US154519
申请日：1993-11-19
申请人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
IPC分类号： H03M1/84 , H03M1/82
CPC分类号： H03M1/82
摘要： The D/A converter comprises: a digital counter receiving a reference clock pluses and a reference voltage as a start signal so as to output a stop signal when the digital counter counts the reference clock pulses until a predetermined number; and a number is reached, and an RC circuit having a resister and a capacitor receiving the reference voltage so as to be charged by a predetermined time constant until the stop signal is inputted to the RC circuit, whereby the RC circuit is charged up to a voltage corresponding to a time distance between the start signal and the stop signal.
摘要翻译： D / A转换器包括：数字计数器接收参考时钟脉冲和参考电压作为起始信号，以便当数字计数器对参考时钟脉冲进行计数直到预定数量时输出停止信号; 并且到达一个数字，以及RC电路，具有接收参考电压的电阻和电容器，以便以预定的时间常数充电直到停止信号被输入到RC电路，由此将RC电路充电到对应于起始信号和停止信号之间的时间距离的电压。

60. 发明授权

US5450023A Interface circuit using a limited number of pins in LSI applications 失效
标题翻译：接口电路在LSI应用中使用有限数量的引脚
公开(公告)号：US5450023A
公开(公告)日：1995-09-12
申请号：US228903
申请日：1994-04-18
申请人： Weikang Yang , Guoliang Shou , Sunao Takatori , Makoto Yamamoto
发明人： Weikang Yang , Guoliang Shou , Sunao Takatori , Makoto Yamamoto
IPC分类号： H03M5/20 , H03K19/094
CPC分类号： H03M5/20
摘要： An interface circuit for reducing the number of data pins in an LSI circuit. The interface circuit, converts a multivalue input signal of a predetermined level into a binary value or converts a binary output signal into a multivalue of signal a predetermined level and is used as an interface for transferring data in LSI applications.
摘要翻译：一种用于减少LSI电路中的数据引脚数的接口电路。接口电路将预定电平的多值输入信号转换为二进制值，或者将二进制输出信号转换为预定电平的信号多值，并用作在LSI应用中传送数据的接口。

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