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51. 发明申请

US20050110019A1 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20050110019A1
公开(公告)日：2005-05-26
申请号：US10915958
申请日：2004-08-11
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

52. 发明授权

US09401118B2 Display apparatus having reduced vertical flickering lines 有权
标题翻译：具有减少的垂直闪烁线的显示装置
公开(公告)号：US09401118B2
公开(公告)日：2016-07-26
申请号：US12604692
申请日：2009-10-23
申请人： Sung-Man Kim , Hong-Woo Lee , Jong-Hwan Lee , Hyeon-Hwan Kim , Jong-Hyuk Lee
发明人： Sung-Man Kim , Hong-Woo Lee , Jong-Hwan Lee , Hyeon-Hwan Kim , Jong-Hyuk Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3614 , G09G3/3648 , G09G3/3677 , G09G3/3696 , G09G2300/0426 , G09G2300/0443 , G09G2300/0465 , G09G2300/0809 , G09G2310/0202 , G09G2320/0233 , G09G2320/0247 , G09G2320/0666
摘要： A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.
摘要翻译：显示装置包括：多个像素块，所述多个像素块中的每个像素块包括连接到第一开关元件的第一像素电极和连接到第二开关元件的第二像素电极; 栅极线，沿着第一方向延伸并且包括连接到第一开关元件的第一栅极线和连接到第二开关元件的第二栅极线; 以及沿着与第一方向相交的第二方向延伸的数据线。栅极电压施加到第二栅极线之前的第一栅极线，并且每个像素块的第一像素电极显示相同的颜色。

53. 发明授权

US08803865B2 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US08803865B2
公开(公告)日：2014-08-12
申请号：US13422109
申请日：2012-03-16
申请人： Sung-Hoon Lim , Man Hong Na , Young-Je Cho , Sung-Man Kim , Min-Chul Song , Soo Jung Chae , Eu Gene Lee
发明人： Sung-Hoon Lim , Man Hong Na , Young-Je Cho , Sung-Man Kim , Min-Chul Song , Soo Jung Chae , Eu Gene Lee
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G02F1/13454 , G02F1/1339 , G02F1/1345 , G09G3/3688 , G09G3/3696 , G09G5/18 , G09G2300/0408 , G09G2300/08 , H01L21/77
摘要： A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.
摘要翻译：液晶显示器包括基板，多条信号线，栅极驱动器和密封剂。基板包括显示区域和显示区域外的周边区域。信号线与衬底集成并且包括时钟信号线。栅极驱动器包括位于时钟信号线和显示区域之间的级。该台与衬底集成，并被配置为向显示区域施加栅极电压。密封剂分布在周边区域的一部分上。密封剂分配的密封区域包括密封线，并且时钟信号线位于密封线内。时钟信号线比其他信号线更远离舞台。

54. 发明授权

US08624820B2 Liquid crystal display with plural gate lines and pairs of pixels 有权
标题翻译：具有多个栅极线和像素对的液晶显示器
公开(公告)号：US08624820B2
公开(公告)日：2014-01-07
申请号：US11588495
申请日：2006-10-28
申请人： Sung-Man Kim , Bong-Jun Lee , Shin-Tack Kang
发明人： Sung-Man Kim , Bong-Jun Lee , Shin-Tack Kang
IPC分类号： G09G3/36 , G02F1/1343 , G02F1/1345
CPC分类号： G09G3/3659 , G02F1/134336 , G02F1/136286 , G09G3/3614 , G09G3/3677 , G09G2300/0426 , G09G2310/0218 , G09G2320/0219 , G09G2320/0247
摘要： A liquid crystal display (LCD) includes a substrate; first and second pixel rows formed on the substrate and including a plurality of pixels; a first gate line extending in a row direction on the substrate and connected with the first pixel row; a second gate line extending in the row direction on the substrate, connected with the first pixel row; a third gate line extending in the row direction on the substrate, connected with the second pixel row, and adjacent to the second gate line; a fourth gate line extending in the row direction on the substrate, connected with the second pixel row; a plurality of data lines extending in a column direction on the substrate, wherein each of the data lines are disposed every two of the pixels; a first gate driver connected with the first and fourth gate lines and applying gate signals to the first and fourth gate lines; and a second gate driver connected with the second and third gate lines and applying gate signals to the second and third gate lines.
摘要翻译：液晶显示器（LCD）包括基板; 第一和第二像素行，形成在基板上并且包括多个像素; 在所述基板上沿行方向延伸并与所述第一像素行连接的第一栅极线; 与所述第一像素列连接的在所述基板上的行方向上延伸的第二栅极线; 在所述基板上沿所述行方向延伸的第三栅极线，与所述第二像素行连接并且与所述第二栅极线相邻; 与所述第二像素列连接的在所述基板上沿行方向延伸的第四栅极线; 在基板上沿列方向延伸的多条数据线，其中，每两条像素都配置有数据线; 与第一和第四栅极线连接并将栅极信号施加到第一和第四栅极线的第一栅极驱动器; 以及与第二和第三栅极线连接并将栅极信号施加到第二和第三栅极线的第二栅极驱动器。

55. 发明授权

US08619070B2 Gate drive circuit and display apparatus having the same 有权
标题翻译：栅极驱动电路和具有该栅极驱动电路的显示装置
公开(公告)号：US08619070B2
公开(公告)日：2013-12-31
申请号：US12970787
申请日：2010-12-16
申请人： Hong-Woo Lee , Eung-Gyu Lee , Jong-Hwan Lee , Sung-Man Kim
发明人： Hong-Woo Lee , Eung-Gyu Lee , Jong-Hwan Lee , Sung-Man Kim
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G2310/0286 , G09G2340/0492
摘要： An n-th stage (wherein, n is an integer) of the stages of a gate driving circuit includes a pull-up part, a first variable mode part and a second variable mode part. At least one of the first and second variable mode parts includes a variable element. The variable element comprises a first thin-film transistor (TFT) turned on in response to a first level voltage of the first or second direction signal, a second TFT applying the first or second direction signal to a control part of the pull-up part in response to an output signal of a previous stage or an output signal of a next stage, and a third TFT connected to the second TFT through the first TFT.
摘要翻译：栅极驱动电路的级的第n级（其中，n是整数）包括上拉部分，第一可变模式部分和第二可变模式部分。第一和第二可变模式部件中的至少一个包括可变元件。可变元件包括响应于第一或第二方向信号的第一电平电压而导通的第一薄膜晶体管（TFT），将第一或第二方向信号施加到上拉部分的控制部分的第二TFT 响应于前一级的输出信号或下一级的输出信号，以及通过第一TFT连接到第二TFT的第三TFT。

56. 发明申请

US20130113772A1 DISPLAY PANEL 有权
标题翻译：显示面板
公开(公告)号：US20130113772A1
公开(公告)日：2013-05-09
申请号：US13429871
申请日：2012-03-26
申请人： Shin Tack KANG , Kyung-Hee KIM , Beom Jun KIM , Sung Man KIM , Jong Hwan LEE , Hong Woo LEE , Hye Rhee HAN , Ji Hye HEO
发明人： Shin Tack KANG , Kyung-Hee KIM , Beom Jun KIM , Sung Man KIM , Jong Hwan LEE , Hong Woo LEE , Hye Rhee HAN , Ji Hye HEO
IPC分类号： G09G5/00
CPC分类号： G09G3/3674 , G09G3/20 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G09G2310/0289 , G09G2310/0291 , G09G2320/045
摘要： A display panel includes a gate driver connected to a gate line, where the gate driver includes a plurality of stages, where each of the stages includes at least one dual gate thin film transistor having a first control terminal and a second control terminal, and where each of the stages receives a clock signal, a first low voltage, a second low voltage, at least one transmission signal of previous stages, at least two transmission signals of subsequent stages and an output control signal from one of the stages to output a gate voltage including a gate-on voltage and a gate-off voltage.
摘要翻译：显示面板包括连接到栅极线的栅极驱动器，其中栅极驱动器包括多个级，其中每个级包括至少一个双栅极薄膜晶体管，其具有第一控制端子和第二控制端子，并且其中每个级接收时钟信号，第一低电压，第二低电压，先前级的至少一个传输信号，后续级的至少两个传输信号和来自一个级的输出控制信号以输出门电压包括栅极导通电压和栅极截止电压。

57. 发明申请

US20130076716A1 LIQUID CRYSTAL DISPLAY 有权
标题翻译：液晶显示器
公开(公告)号：US20130076716A1
公开(公告)日：2013-03-28
申请号：US13422109
申请日：2012-03-16
申请人： Sung-Hoon LIM , Man Hong NA , Young-Je CHO , Sung-Man KIM , Min-Chul SONG , Soo Jung CHAE , Eu Gene LEE
发明人： Sung-Hoon LIM , Man Hong NA , Young-Je CHO , Sung-Man KIM , Min-Chul SONG , Soo Jung CHAE , Eu Gene LEE
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G02F1/13454 , G02F1/1339 , G02F1/1345 , G09G3/3688 , G09G3/3696 , G09G5/18 , G09G2300/0408 , G09G2300/08 , H01L21/77
摘要： A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.
摘要翻译：液晶显示器包括基板，多条信号线，栅极驱动器和密封剂。基板包括显示区域和显示区域外的周边区域。信号线与衬底集成并且包括时钟信号线。栅极驱动器包括位于时钟信号线和显示区域之间的级。该台与衬底集成，并被配置为向显示区域施加栅极电压。密封剂分布在周边区域的一部分上。密封剂分配的密封区域包括密封线，并且时钟信号线位于密封线内。时钟信号线比其他信号线更远离舞台。

58. 发明授权

US08400412B2 Sensitivity touch display panel and manufacturing method of the same 有权
标题翻译：灵敏度触摸显示面板及其制造方法相同
公开(公告)号：US08400412B2
公开(公告)日：2013-03-19
申请号：US12614377
申请日：2009-11-06
申请人： Sun-Kyu Joo , Ju-Hyeon Baek , Ji-Young Jeong , Sung-Man Kim , Myung-Sub Lee
发明人： Sun-Kyu Joo , Ju-Hyeon Baek , Ji-Young Jeong , Sung-Man Kim , Myung-Sub Lee
IPC分类号： G06F3/041
CPC分类号： G06F3/0418 , G02F1/13338 , G02F1/13394 , G02F1/136259 , G02F2001/13396 , G02F2201/508 , G06F3/0412 , Y10T29/49105
摘要： Provided are a display panel which can detect a touch position derived from a user's touch and can prevent erroneous touch position data from being generated even when an erroneous connection to a position sensing line is present due a processing deviation or a cell gap deviation, and a manufacturing method of the same. The display panel includes a first substrate, a first sensor pad that is formed on the first substrate, a second sensor pad that is spaced apart from the first sensor pad, a second substrate that is disposed to face the first substrate, a first sensor spacer that is formed on the second substrate to overlap the first sensor pad and protrudes toward the first substrate, a second sensor spacer that is formed on the second substrate to overlap the second sensor pad and protrudes toward the first substrate, and a sensor electrode that is formed on the first sensor spacer and the second sensor spacer to overlap the first sensor pad and the second sensor pad, wherein the second sensor spacer protrudes toward the first substrate more than the first sensor spacer does.
摘要翻译：提供了一种显示面板，其可以检测从用户的触摸导出的触摸位置，并且即使当由于处理偏差或单元格间隙偏差而存在与位置感测线的错误连接时也可以防止错误的触摸位置数据，并且制造方法相同。显示面板包括第一基板，形成在第一基板上的第一传感器垫，与第一传感器垫间隔开的第二传感器垫，与第一基板相对设置的第二基板，第一传感器间隔件形成在所述第二基板上以与所述第一传感器焊盘重叠并朝向所述第一基板突出的第二传感器间隔件，形成在所述第二基板上以与所述第二传感器焊盘重叠并朝向所述第一基板突出的第二传感器间隔件，形成在所述第一传感器间隔物和所述第二传感器间隔物上以与所述第一传感器垫和所述第二传感器垫重叠，其中所述第二传感器间隔物比所述第一传感器间隔物更向第一基底突出。

59. 发明授权

US08306177B2 Method of driving a gate line and gate drive circuit for performing the method 有权
标题翻译：驱动用于执行该方法的栅极线和栅极驱动电路的方法
公开(公告)号：US08306177B2
公开(公告)日：2012-11-06
申请号：US12575895
申请日：2009-10-08
申请人： Hong-Woo Lee , Sung-Man Kim , Jong-Hyuk Lee , Jong-Hwan Lee , Hyeon-Hwan Kim , Sang-Moon Moh , Jeong-Il Kim , Yeon-Kyu Moon
发明人： Hong-Woo Lee , Sung-Man Kim , Jong-Hyuk Lee , Jong-Hwan Lee , Hyeon-Hwan Kim , Sang-Moon Moh , Jeong-Il Kim , Yeon-Kyu Moon
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G3/3677 , G09G2300/0408
摘要： A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.
摘要翻译：上拉驱动部分通过响应于前一级或垂直启动信号之一接收导通电压而将第一节点的信号保持在高电平。上拉部分响应于第一节点的信号通过输出端子输出时钟信号。当第一节点的信号分别为低或高时，第一保持部件将第二节点的信号保持在高电平或低电平。第二保持部分响应于第二节点的信号或延迟和反相的时钟信号，将第一节点的信号和输出端的信号保持在接地电压。

60. 发明申请

US20120217514A1 ARRAY SUBSTRATE, A DISPLAY PANEL HAVING THE ARRAY SUBSTRATE AND A METHOD OF MANUFACTURING THE ARRAY SUBSTRATE 有权
标题翻译：阵列基板，具有阵列基板的显示面板和制造阵列基板的方法
公开(公告)号：US20120217514A1
公开(公告)日：2012-08-30
申请号：US13344268
申请日：2012-01-05
申请人： Sun-Kyu Joo , Ho-Kyoon Kwon , Sung-Man Kim
发明人： Sun-Kyu Joo , Ho-Kyoon Kwon , Sung-Man Kim
IPC分类号： H01L33/08 , H01L33/36
CPC分类号： G02F1/13394 , G02F1/136213 , G02F2001/134345 , H01L29/41733
摘要： A substrate includes a storage line, first and second gate lines and first and second pixel electrodes. The storage line extends along a first direction on the substrate. The first and second gate lines are substantially parallel with the storage line. The first pixel electrode is formed between the first gate line and the storage line. The second pixel electrode is formed between the second gate line and the storage line.
摘要翻译：衬底包括存储线，第一和第二栅极线以及第一和第二像素电极。存储线沿衬底上的第一方向延伸。第一和第二栅极线基本上与存储线平行。第一像素电极形成在第一栅极线和存储线之间。第二像素电极形成在第二栅极线和存储线之间。

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