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1. 发明授权

US07655952B2 Thin films transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US07655952B2
公开(公告)日：2010-02-02
申请号：US11770012
申请日：2007-06-28
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L33/00
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge, placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并且具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

2. 发明授权

US07190000B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07190000B2
公开(公告)日：2007-03-13
申请号：US10915958
申请日：2004-08-11
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L29/04
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

3. 发明授权

US07955908B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07955908B2
公开(公告)日：2011-06-07
申请号：US11674457
申请日：2007-02-13
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L21/00
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

4. 发明申请

US20080012139A1 THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20080012139A1
公开(公告)日：2008-01-17
申请号：US11770012
申请日：2007-06-28
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L23/48
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge, placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并且具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

5. 发明申请

US20070134858A1 Thin Film Transistor Array Panel and Manufacturing Method Thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20070134858A1
公开(公告)日：2007-06-14
申请号：US11674457
申请日：2007-02-13
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L21/84
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

6. 发明申请

US20050110019A1 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20050110019A1
公开(公告)日：2005-05-26
申请号：US10915958
申请日：2004-08-11
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

7. 发明申请

US20060054889A1 Thin film transistor array panel 审中-公开
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US20060054889A1
公开(公告)日：2006-03-16
申请号：US10942039
申请日：2004-09-16
申请人： Jang-Soo Kim , Hyang-Shik Kong , Hye-Young Ryu , Sung-Man Kim
发明人： Jang-Soo Kim , Hyang-Shik Kong , Hye-Young Ryu , Sung-Man Kim
IPC分类号： H01L29/04
CPC分类号： H01L27/124 , G02F1/136213 , G02F1/136259 , G02F2001/13629 , H01L27/1255 , H01L27/1288
摘要： A thin film transistor array panel comprising: an insulating substrate; a plurality of gate lines formed on the insulating substrate and including a plurality of gate electrodes and end portions; a plurality of storage electrode lines formed on the insulating substrate; a gate insulating layer formed on the gate lines and storage electrode lines; a semiconductor layer formed on the gate insulating layer; a ohmic contact layer formed on the semiconductor layer; a plurality of data lines formed on the gate insulating layer, intersecting the gate lines to define a display area, and having source electrodes and end portions; a plurality of drain electrodes facing the source electrodes; a passivation layer formed on the data lines and drain electrodes and having contact holes; a plurality of pixel electrodes formed on the passivation layer and connected to the drain electrodes through the contact holes; a storage line connecting bar connecting the storage electrode lines; and a redundant connecting line connecting the storage electrode lines is provided.
摘要翻译： 1.一种薄膜晶体管阵列面板，包括：绝缘基板; 多个栅极线，形成在所述绝缘基板上并且包括多个栅电极和端部; 形成在所述绝缘基板上的多个存储电极线; 形成在栅极线和存储电极线上的栅极绝缘层; 形成在所述栅极绝缘层上的半导体层; 形成在所述半导体层上的欧姆接触层; 形成在所述栅极绝缘层上的多条数据线，与所述栅极线交叉以限定显示区域，并具有源电极和端部; 面对所述源电极的多个漏电极; 形成在数据线和漏电极上并具有接触孔的钝化层; 多个像素电极，形成在钝化层上并通过接触孔连接到漏电极; 连接存储电极线的存储线连接条; 并且提供连接存储电极线的冗余连接线。

8. 发明申请

US20070058125A1 LIQUID CRYSTAL DISPLAY APPARATUS AND METHOD OF FORMING THE SAME 失效
标题翻译：液晶显示装置及其形成方法
公开(公告)号：US20070058125A1
公开(公告)日：2007-03-15
申请号：US11556468
申请日：2006-11-03
申请人： Young-Hoon Yoo , Jang-Soo Kim , Hye-Young Ryu
发明人： Young-Hoon Yoo , Jang-Soo Kim , Hye-Young Ryu
IPC分类号： G02F1/1345
CPC分类号： G02F1/1339 , G02F1/133516 , G02F1/1345
摘要： A liquid crystal display device including a first substrate, a common electode formed over the first substrate, and a second substrate disposed opposite the first substrate. A common voltage-applying member applies a common voltage to the common electrode and maintains a cell gap between the first substrate and the second substrate. The common voltage-applying member includes an insulator and a conductor formed over the insulator.
摘要翻译：一种液晶显示装置，包括第一基板，在第一基板上形成的公共电极以及与第一基板相对设置的第二基板。公共电压施加部件向公共电极施加公共电压，并且在第一基板和第二基板之间保持单元间隙。公共电压施加构件包括绝缘体和形成在绝缘体上的导体。

9. 发明授权

US07777858B2 Liquid crystal display apparatus and method of forming the same 失效
标题翻译：液晶显示装置及其形成方法
公开(公告)号：US07777858B2
公开(公告)日：2010-08-17
申请号：US11556468
申请日：2006-11-03
申请人： Young-Hoon Yoo , Jang-Soo Kim , Hye-Young Ryu
发明人： Young-Hoon Yoo , Jang-Soo Kim , Hye-Young Ryu
IPC分类号： G02F1/1339
CPC分类号： G02F1/1339 , G02F1/133516 , G02F1/1345
摘要： A liquid crystal display device including a first substrate, a common electrode formed over the first substrate, and a second substrate disposed opposite the first substrate. A common voltage-applying member applies a common voltage to the common electrode and maintains a cell gap between the first substrate and the second substrate. The common voltage-applying member includes an insulator and a conductor formed over the insulator.
摘要翻译：一种液晶显示装置，包括第一基板，形成在第一基板上的公共电极以及与第一基板相对设置的第二基板。公共电压施加部件向公共电极施加公共电压，并且在第一基板和第二基板之间保持单元间隙。公共电压施加构件包括绝缘体和形成在绝缘体上的导体。

10. 发明授权

US07405798B2 Liquid crystal display apparatus and method of forming the same 失效
标题翻译：液晶显示装置及其形成方法
公开(公告)号：US07405798B2
公开(公告)日：2008-07-29
申请号：US10768333
申请日：2004-01-30
申请人： Young-Hoon Yoo , Jang-Soo Kim , Hye-Young Ryu
发明人： Young-Hoon Yoo , Jang-Soo Kim , Hye-Young Ryu
IPC分类号： G02F1/1339 , G02F1/1345
CPC分类号： G02F1/1339 , G02F1/133516 , G02F1/1345
摘要： A liquid crystal display device including a first substrate, a common electrode formed over the first substrate, and a second substrate disposed opposite the first substrate. A common voltage-applying member applies a common voltage to the common electrode and maintains a cell gap between the first substrate and the second substrate. The common voltage-applying member includes an insulator and a conductor formed over the insulator.
摘要翻译：一种液晶显示装置，包括第一基板，形成在第一基板上的公共电极以及与第一基板相对设置的第二基板。公共电压施加部件向公共电极施加公共电压，并且在第一基板和第二基板之间保持单元间隙。公共电压施加构件包括绝缘体和形成在绝缘体上的导体。

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