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51. 发明申请

US20060092682A1 Semiconductor memory device and a method for arranging signal lines thereof 有权
标题翻译：半导体存储器件及其信号线的布置方法
公开(公告)号：US20060092682A1
公开(公告)日：2006-05-04
申请号：US11262530
申请日：2005-10-28
申请人： Young-Chul Cho , Sung-Hoon Kim , Joung-Yeal Kim
发明人： Young-Chul Cho , Sung-Hoon Kim , Joung-Yeal Kim
IPC分类号： G11C5/06
CPC分类号： G11C5/063
摘要： The present invention discloses a semiconductor memory device and a method for arranging signal lines thereof. The semiconductor memory device including a first memory cell array, an IO control circuit and a second memory cell array arranged between the first memory cell array and the IO control circuit, includes: first IO signal lines for transmitting data between the first memory cell array and the IO control circuit, wherein the first IO signal lines are connected to first data loading locations of the first memory cell array and extend in a straight line to the IO control circuit; and second IO signal lines for transmitting data between the second memory cell array and the IO control circuit, wherein the second IO signal lines are connected to first data loading locations of the second memory cell array and extend to the IO control circuit, wherein lengths of the first IO signal lines starting from the first data loading locations of the first memory cell array to the IO control circuit are identical to lengths of the second IO signal lines starting from the first data loading locations of the second memory cell array to the IO control circuit.
摘要翻译：本发明公开了半导体存储器件及其信号线的布置方法。包括第一存储单元阵列，IO控制电路和布置在第一存储单元阵列和IO控制电路之间的第二存储单元阵列的半导体存储器件包括：第一IO信号线，用于在第一存储单元阵列与第 IO控制电路，其中第一IO信号线连接到第一存储单元阵列的第一数据加载位置并且以直线延伸到IO控制电路; 以及第二IO信号线，用于在第二存储单元阵列和IO控制电路之间传输数据，其中第二IO信号线连接到第二存储单元阵列的第一数据加载位置并延伸到IO控制电路，其中，从第一存储单元阵列的第一数据加载位置开始到IO控制电路的第一IO信号线与从第二存储单元阵列的第一数据加载位置到IO控制开始的第二IO信号线的长度相同电路。

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