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41. 发明授权

US5614427A Method of making an array of TFTs having reduced parasitic capacitance 失效
标题翻译：制造具有降低的寄生电容的TFT阵列的方法
公开(公告)号：US5614427A
公开(公告)日：1997-03-25
申请号：US375658
申请日：1995-01-20
申请人： Willem den Boer , Mohshi Yang
发明人： Willem den Boer , Mohshi Yang
IPC分类号： G02F1/1368 , H01L27/12 , H01L29/423 , H01L29/786 , H01L21/265
CPC分类号： H01L29/78696 , G02F1/1368 , H01L27/12 , H01L29/42384
摘要： A thin film transistor (TFT) array in an active matrix liquid crystal display (AMLCD) including a centrally located round source electrode completely surrounded by a substantially annular or circular shaped drain electrode. The geometric design of the TFT of this invention provides for a thin film transistor having a reduced parasitic capacitance and decreased photosensitivity. The TFTs of this invention are located at the intersections of gate and drain lines of an active matrix LCD array thereby increasing the size of the pixel display openings of the matrix array.
摘要翻译：有源矩阵液晶显示器（AMLCD）中的薄膜晶体管（TFT）阵列，其包括由基本上环形或圆形的漏极电极完全包围的居中定位的圆形源电极。本发明的TFT的几何设计提供了具有降低的寄生电容和降低的光敏性的薄膜晶体管。本发明的TFT位于有源矩阵LCD阵列的栅极和漏极线的交点处，从而增加矩阵阵列的像素显示开口的尺寸。

42. 发明授权

US5414283A TFT with reduced parasitic capacitance 失效
标题翻译：降低寄生电容的TFT
公开(公告)号：US5414283A
公开(公告)日：1995-05-09
申请号：US154713
申请日：1993-11-19
申请人： Willem den Boer , Mohshi Yang
发明人： Willem den Boer , Mohshi Yang
IPC分类号： G02F1/1368 , H01L27/12 , H01L29/423 , H01L29/786 , H01L27/01 , H01L27/13 , H01L29/78
CPC分类号： H01L29/78696 , G02F1/1368 , H01L27/12 , H01L29/42384
摘要： A thin film transistor (TFT) array in an active matrix liquid crystal display (AMLCD) including a centrally located round source electrode substantially completely surrounded by a substantially annular or circular shaped drain electrode. The geometric design of the TFT of this invention provides for a thin film transistor having a reduced parasitic capacitance and decreased photosensitivity. The TFTs of this invention are located at the intersections of gate and drain lines of an active matrix LCD array thereby increasing the size of the pixel display openings of the matrix array.
摘要翻译：一种有源矩阵液晶显示器（AMLCD）中的薄膜晶体管（TFT）阵列，其包括基本上完全被基本上环形或圆形的漏极电极包围的居中定位的圆形源电极。本发明的TFT的几何设计提供了具有降低的寄生电容和降低的光敏性的薄膜晶体管。本发明的TFT位于有源矩阵LCD阵列的栅极和漏极线的交点处，从而增加矩阵阵列的像素显示开口的尺寸。

43. 发明授权

US07104111B2 Formation of metal nanowires for use as variable-range hydrogen sensors 有权
标题翻译：用作可变范围氢传感器的金属纳米线的形成
公开(公告)号：US07104111B2
公开(公告)日：2006-09-12
申请号：US10909797
申请日：2004-07-30
申请人： Greg Monty , Kwok Ng , Mohshi Yang
发明人： Greg Monty , Kwok Ng , Mohshi Yang
IPC分类号： G01N7/00
CPC分类号： G01N27/127 , G01N33/005
摘要： The present invention provides for variable-range hydrogen sensors and methods for making same. Such variable-range hydrogen sensors comprise a series of fabricated Pd—Ag (palladium-silver) nanowires—each wire of the series having a different Ag to Pd ratio—with nanobreakjunctions in them and wherein the nanowires have predefined dimensions and orientation. When the nanowires are exposed to H2, their lattace swells when the H2 concentration reaches a threshold value (unique to that particular ratio of Pd to Ag). This causes the nanobreakjunctions to close leading to a 6–8 orders of magnitude decrease in the resistance along the length of the wire and providing a sensing mechanism for a range of hydrogen concentrations.
摘要翻译：本发明提供可变范围氢传感器及其制造方法。这种可变范围氢传感器包括一系列制备的Pd-Ag（钯 - 银）纳米线 - 该系列中的每根线具有不同的Ag与Pd的比例，并且其中纳米区域结合在一起，并且其中纳米线具有预定义的尺寸和取向。当纳米线暴露于H 2 O 2时，当H 2 O 2浓度达到阈值（对于特定的Pd与Ag的比率是唯一的）时，它们的晶格膨胀。这导致纳米划痕结合，导致沿导线长度的电阻降低6-8个数量级，并为一定范围的氢浓度提供感测机制。

44. 发明申请

US20050005675A1 Formation of metal nanowires for use as variable-range hydrogen sensors 有权
公开(公告)号：US20050005675A1
公开(公告)日：2005-01-13
申请号：US10909797
申请日：2004-07-30
申请人： Greg Monty , Kwok Ng , Mohshi Yang
发明人： Greg Monty , Kwok Ng , Mohshi Yang
IPC分类号： G01N27/04 , B82B1/00 , B82B3/00 , G01N27/12 , G01N27/22 , G01N33/00 , G01N7/00
CPC分类号： G01N27/127 , G01N33/005
摘要： The present invention provides for variable-range hydrogen sensors and methods for making same. Such variable-range hydrogen sensors comprise a series of fabricated Pd—Ag (palladium-silver) nanowires—each wire of the series having a different Ag to Pd ratio—with nanobreakjunctions in them and wherein the nanowires have predefined dimensions and orientation. When the nanowires are exposed to H2, their lattace swells when the H2 concentration reaches a threshold value (unique to that particular ratio of Pd to Ag). This causes the nanobreakjunctions to close leading to a 6-8 orders of magnitude decrease in the resistance along the length of the wire and providing a sensing mechanism for a range of hydrogen concentrations.

45. 发明授权

US4654295A Method of making short channel thin film field effect transistor 失效
标题翻译：制造短沟道薄膜场效应晶体管的方法
公开(公告)号：US4654295A
公开(公告)日：1987-03-31
申请号：US557773
申请日：1983-12-05
申请人： Mohshi Yang , David Vesey
发明人： Mohshi Yang , David Vesey
IPC分类号： H01L29/78 , H01L21/033 , H01L21/306 , H01L21/336 , H01L27/12 , H01L29/786 , G03F7/16 , G03F7/26
CPC分类号： H01L29/78696 , H01L21/0338 , H01L29/66757 , H01L29/66765 , H01L29/78663 , H01L29/78684
摘要： Methods for producing field effect transistors having short current-conduction channels and reduced parasitic capacitance are disclosed. The methods allow the channel length to be substantially less than the minimum feature size of the photolithographic mask if desired, thereby enabling very short channel length transistors to be formed using conventional ten micron photolithography. An exemplary method involves: (a) depositing a thick film of photoresist over a multilayered sandwich structure forming part of the transistor, said structure having a bottom gate electrode, an insulator layer thereover, followed by a layer of deposited semiconductor material and a thin film of etchable conductive material thereover; (b) exposing the photoresist through a mask; (c) wetting the photoresist to cause it to swell before development to create an overhang, if desired; (d) etching the etchable material to undercut a portion of the photoresist, and (e) shadow depositing material on top of the uncovered semiconductor layer beyond the shadow of the undercut and overhanging photoresist, thereby locating said channel, and one of the two current-carrying electrodes of the transistor.
摘要翻译：公开了用于制造具有短电流传导通道和减小的寄生电容的场效应晶体管的方法。如果需要，这些方法允许通道长度显着小于光刻掩模的最小特征尺寸，从而使得能够使用传统的10微米光刻形成非常短的沟道长度的晶体管。示例性方法包括：（a）在形成晶体管的一部分的多层夹层结构上沉积厚膜的光致抗蚀剂，所述结构具有底栅极电极，绝缘体层，之后是沉积的半导体材料层和薄膜的可蚀刻导电材料; （b）通过掩模曝光光致抗蚀剂; （c）润湿光致抗蚀剂，使其在显影之前膨胀以产生悬垂，如果需要的话; （d）蚀刻可蚀刻材料以切割一部分光致抗蚀剂，和（e）在未覆盖的半导体层的顶部上的阴影沉积材料超过底切和悬垂的光致抗蚀剂的阴影，从而定位所述通道，并且将两个电流之一 - 晶体管的电极。

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