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41. 发明申请

US20130119344A1 NONVOLATILE STORAGE ELEMENT AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非易失存储元件及其制造方法
公开(公告)号：US20130119344A1
公开(公告)日：2013-05-16
申请号：US13810800
申请日：2011-10-06
申请人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima , Shinichi Yoneda
发明人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima , Shinichi Yoneda
IPC分类号： H01L45/00
CPC分类号： H01L45/145 , H01L27/101 , H01L45/08 , H01L45/146 , H01L45/1608 , H01L45/1625
摘要： A variable resistance nonvolatile storage element includes: a first electrode; a second electrode; and a variable resistance layer having a resistance value that reversibly changes based on an electrical signal applied between the electrodes, wherein the variable resistance layer has a structure formed by stacking a first transition metal oxide layer, a second transition metal oxide layer, and a third transition metal oxide layer in this order, the first transition metal oxide layer having a composition expressed as MOx (where M is a transition metal and O is oxygen), the second transition metal oxide layer having a composition expressed as MOy (where x>y), and the third transition metal oxide layer having a composition expressed as MOz (where y>z).
摘要翻译：可变电阻非易失性存储元件包括：第一电极; 第二电极; 以及可变电阻层，其具有基于施加在所述电极之间的电信号而可逆地变化的电阻值，其中所述可变电阻层具有通过堆叠第一过渡金属氧化物层，第二过渡金属氧化物层和第三过渡金属氧化物层而形成的结构过渡金属氧化物层，第一过渡金属氧化物层具有以MOx表示的组成（其中M是过渡金属，O是氧），第二过渡金属氧化物层具有以MOy表示的组成（其中x> y ）和具有表示为MOz（其中y> z）的组成的第三过渡金属氧化物层。

42. 发明申请

US20110233511A1 NONVOLATILE MEMORY ELEMENT AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性存储元件及其制造方法
公开(公告)号：US20110233511A1
公开(公告)日：2011-09-29
申请号：US13132822
申请日：2009-12-04
申请人： Yoshio Kawashima , Takumi Mikawa , Zhiqiang Wei , Atsushi Himeno
发明人： Yoshio Kawashima , Takumi Mikawa , Zhiqiang Wei , Atsushi Himeno
IPC分类号： H01L47/00 , H01L21/02
CPC分类号： H01L27/0688 , H01L27/101 , H01L27/2409 , H01L27/2418 , H01L27/2436 , H01L27/2472 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1608
摘要： A nonvolatile memory element (10) of the present invention comprises a substrate (11); a lower electrode layer (15) and a resistive layer (16) sequentially formed on the substrate (11); a resistance variable layer (31) formed on the resistive layer (16); a wire layer (20) formed above the lower electrode layer (15); an interlayer insulating layer (17) disposed between the substrate (11) and the wire layer (20) and covering at least the lower electrode layer (15) and the resistive layer (16), the interlayer insulating layer being provided with a contact hole (26) extending from the wire layer (20) to the resistance variable layer (31); and an upper electrode layer (19) formed inside the contact hole (26) such that the upper electrode layer is connected to the resistance variable layer (31) and to the wire layer (20); resistance values of the resistance variable layer (31) changing reversibly in response to electric pulses applied between the lower electrode layer (15) and the upper electrode layer (19).
摘要翻译：本发明的非易失性存储元件（10）包括衬底（11）; 依次形成在所述基板（11）上的下电极层（15）和电阻层（16）。形成在电阻层（16）上的电阻变化层（31）; 在所述下电极层（15）的上方形成的导线层（20）。设置在所述基板（11）和所述导线层（20）之间并且至少覆盖所述下电极层（15）和所述电阻层（16）的层间绝缘层（17），所述层间绝缘层设置有接触孔（26）从所述导线层（20）延伸到所述电阻变化层（31）; 以及形成在所述接触孔（26）内部的上电极层（19），使得所述上电极层连接到所述电阻变化层（31）和所述导线层（20）; 电阻变化层（31）的电阻值响应于施加在下电极层（15）和上电极层（19）之间的电脉冲而可逆地变化。

43. 发明申请

US20110114912A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20110114912A1
公开(公告)日：2011-05-19
申请号：US12867437
申请日：2009-02-09
申请人： Takumi Mikawa , Yoshio Kawashima , Koji Arita , Takeki Ninomiya
发明人： Takumi Mikawa , Yoshio Kawashima , Koji Arita , Takeki Ninomiya
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L27/101 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： A nonvolatile semiconductor memory device (100) comprises a substrate (102) provided with a transistor (101); a first interlayer insulating layer (103) formed over the substrate to cover the transistor; a first contact plug (104) formed in the first interlayer insulating layer and electrically connected to either of a drain electrode (101a) or a source electrode (101b) of the transistor, and a second contact plug (105) formed in the first interlayer insulating layer and electrically connected to the other of the drain electrode or the source electrode of the transistor; a resistance variable layer (106) formed to cover a portion of the first contact plug; a first wire (107) formed on the resistance variable layer; and a second wire (108) formed to cover a portion of the second contact plug; an end surface of the resistance variable layer being coplanar with an end surface of the first wire.
摘要翻译：非易失性半导体存储器件（100）包括设置有晶体管（101）的衬底（102）; 形成在所述衬底上以覆盖所述晶体管的第一层间绝缘层（103）形成在所述第一层间绝缘层中并电连接到所述晶体管的漏电极（101a）或源电极（101b）中的任一个的第一接触插塞（104）和形成在所述第一中间层绝缘层并与晶体管的漏电极或源电极中的另一个电连接; 形成为覆盖所述第一接触插塞的一部分的电阻变化层（106）形成在电阻变化层上的第一线（107）以及形成为覆盖所述第二接触插塞的一部分的第二线（108）所述电阻变化层的端面与所述第一线的端面共面。

44. 发明授权

US08921200B2 Nonvolatile storage element and method of manufacturing thereof 有权
标题翻译：非挥发性储存元件及其制造方法
公开(公告)号：US08921200B2
公开(公告)日：2014-12-30
申请号：US14110163
申请日：2012-04-11
申请人： Yoshio Kawashima , Takumi Mikawa , Shinichi Imai
发明人： Yoshio Kawashima , Takumi Mikawa , Shinichi Imai
IPC分类号： H01L21/20 , H01L45/00 , H01L27/24
CPC分类号： H01L45/1675 , H01L27/2436 , H01L45/04 , H01L45/08 , H01L45/1233 , H01L45/146
摘要： A method of manufacturing a variable resistance nonvolatile memory element includes: forming a lower electrode layer above a substrate; forming, on the lower electrode layer, a variable resistance layer including an oxygen-deficient transition metal oxide; forming an upper electrode layer on the variable resistance layer; and forming a patterned mask on the upper electrode layer and etching the upper electrode layer, the variable resistance layer, and the lower electrode layer using the patterned mask. In the etching, at least the variable resistance layer is etched using an etching gas containing bromine.
摘要翻译：一种制造可变电阻非易失性存储元件的方法包括：在衬底上形成下电极层; 在下电极层上形成包含缺氧过渡金属氧化物的可变电阻层; 在所述可变电阻层上形成上电极层; 并在上电极层上形成图案化掩模，并使用图案化掩模蚀刻上电极层，可变电阻层和下电极层。在蚀刻中，至少使用含有溴的蚀刻气体蚀刻可变电阻层。

45. 发明授权

US08610102B2 Nonvolatile memory device and manufacturing method thereof 有权
标题翻译：非易失存储器件及其制造方法
公开(公告)号：US08610102B2
公开(公告)日：2013-12-17
申请号：US13378570
申请日：2010-06-16
申请人： Yoshio Kawashima , Takumi Mikawa
发明人： Yoshio Kawashima , Takumi Mikawa
IPC分类号： H01L47/00 , H01L29/06 , H01L21/00 , H01L21/20 , G11C11/00
CPC分类号： H01L27/101 , H01L27/0688 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： A nonvolatile memory device (10A) comprises an upper electrode layer (2); a lower electrode layer (4); a resistance variable layer (3) sandwiched between the upper electrode layer (2) and the lower electrode layer (4); and a charge diffusion prevention mask (1A) formed on a portion of the upper electrode layer (2); wherein the resistance variable layer (3) includes a first film comprising oxygen-deficient transition metal oxide and a second film comprising oxygen-deficient transition metal oxide which is higher in oxygen content than the first film; at least one of the upper electrode layer (2) and the lower electrode layer (4) comprises a simple substance or alloy of a platinum group element; and the charge diffusion prevention mask (1A) is insulative, and is lower in etching rate of dry etching than the upper electrode layer (2) and the lower electrode layer (4).
摘要翻译：非易失性存储器件（10A）包括上电极层（2）; 下电极层（4）; 夹在上电极层（2）和下电极层（4）之间的电阻变化层（3）; 和形成在上电极层（2）的一部分上的电荷扩散防止掩模（1A）; 其中所述电阻变化层（3）包括包含缺氧过渡金属氧化物的第一膜和包含缺氧过渡金属氧化物的第二膜，其氧含量高于所述第一膜; 上电极层（2）和下电极层（4）中的至少一个包含铂族元素的单质或合金; 并且电荷扩散防止掩模（1A）是绝缘的，并且干蚀刻的蚀刻速率比上电极层（2）和下电极层（4）低。

46. 发明授权

US08574957B2 Method for manufacturing nonvolatile semiconductor memory element 有权
标题翻译：制造非易失性半导体存储元件的方法
公开(公告)号：US08574957B2
公开(公告)日：2013-11-05
申请号：US13502769
申请日：2011-11-10
申请人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima
发明人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima
IPC分类号： H01L21/00
CPC分类号： H01L27/101 , G11C13/0007 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： An object of the present invention is to provide a method for manufacturing a variable resistance nonvolatile semiconductor memory element which can operate at a low voltage and high speed when initial breakdown is caused, and inhibit oxidization of a contact plug. The method for manufacturing the variable resistance nonvolatile semiconductor memory element, which includes a bottom electrode, a variable resistance layer, and a top electrode which are formed above a contact plug, includes oxidizing to insulate an end portion of the variable resistance layer prior to forming a bottom electrode by patterning a first conductive film.
摘要翻译：本发明的目的是提供一种用于制造可变电阻非易失性半导体存储元件的方法，其可以在初始击穿时能够以低电压和高速工作，并且抑制接触插塞的氧化。制造可变电阻型非易失性半导体存储元件的方法，其包括形成在接触插塞上方的底电极，可变电阻层和顶电极，包括在形成之前进行氧化以使可变电阻层的端部绝缘通过图案化第一导电膜来形成底部电极。

47. 发明授权

US08437173B2 Nonvolatile memory element, manufacturing method thereof, design support method therefor, and nonvolatile memory device 有权
标题翻译：非易失性存储元件，其制造方法，设计支持方法和非易失性存储器件
公开(公告)号：US08437173B2
公开(公告)日：2013-05-07
申请号：US13320654
申请日：2011-03-16
申请人： Yukio Hayakawa , Takumi Mikawa , Yoshio Kawashima , Takeki Ninomiya
发明人： Yukio Hayakawa , Takumi Mikawa , Yoshio Kawashima , Takeki Ninomiya
IPC分类号： G11C11/00
CPC分类号： G11C13/004 , G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： A nonvolatile memory element which can be initialized at low voltage includes a variable resistance layer (116) located between a lower electrode (105) and an upper electrode (107) and having a resistance value that reversibly changes based on electrical signals applied between these electrodes. The variable resistance layer (116) includes at least two layers: a first variable resistance layer (1161) including a first transition metal oxide (116b); and a second variable resistance layer (1162) including a second transition metal oxide (116a) and a third transition metal oxide (116c). The second transition metal oxide (116a) has an oxygen deficiency higher than either oxygen deficiency of the first transition metal oxide (116b) or the third transition metal oxide (116c), and the second transition metal oxide (116a) and the third transition metal oxide (116c) are in contact with the first variable resistance layer (1161).
摘要翻译：可以以低电压初始化的非易失性存储元件包括位于下电极（105）和上电极（107）之间的可变电阻层（116），并且具有基于施加在这些电极之间的电信号而可逆地改变的电阻值。可变电阻层（116）包括至少两层：包括第一过渡金属氧化物（116b）的第一可变电阻层（1161）; 和包括第二过渡金属氧化物（116a）和第三过渡金属氧化物（116c）的第二可变电阻层（1162）。第二过渡金属氧化物（116a）的缺氧高于第一过渡金属氧化物（116b）或第三过渡金属氧化物（116c）的氧缺乏，第二过渡金属氧化物（116a）和第三过渡金属氧化物（116c）与第一可变电阻层（1161）接触。

48. 发明授权

US08426836B2 Nonvolatile memory device and manufacturing method thereof 有权
标题翻译：非易失存储器件及其制造方法
公开(公告)号：US08426836B2
公开(公告)日：2013-04-23
申请号：US13132544
申请日：2009-06-30
申请人： Takumi Mikawa , Yoshio Kawashima , Atsushi Himeno
发明人： Takumi Mikawa , Yoshio Kawashima , Atsushi Himeno
IPC分类号： H01L29/02
CPC分类号： H01L27/101 , H01L27/2409 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1683
摘要： There are provided a resistance variable nonvolatile memory device which changes its resistance stably at low voltages and is suitable for a miniaturized configuration, and a manufacturing method thereof. The nonvolatile memory device comprises: a substrate (100); a first electrode (101); an interlayer insulating layer (102); a memory cell hole (103) formed in the interlayer insulating layer; a first resistance variable layer (104a) formed in at least a bottom portion of the memory cell hole and connected to the first electrode; a second resistance variable layer (104b) formed inside the memory cell hole (103) and located on the first resistance variable layer (104a); and a second electrode (105); the first resistance variable layer (104a) and the second resistance variable layer (104b) respectively comprising metal oxides of the same kind; and the first resistance variable layer (104a) having a higher oxygen content than the second resistance variable layer (104b).
摘要翻译：提供了一种电阻可变非易失性存储器件，其在低电压下稳定地改变其电阻并且适合于小型化构造及其制造方法。非易失性存储器件包括：衬底（100）; 第一电极（101）; 层间绝缘层（102）; 形成在所述层间绝缘层中的记忆单元孔（103）形成在所述存储单元孔的至少底部并连接到所述第一电极的第一电阻变化层（104a）形成在所述存储单元孔内并位于所述第一电阻变化层上的第二电阻变化层，和第二电极（105）; 分别包含相同种类的金属氧化物的第一电阻变化层（104a）和第二电阻变化层（104b）和具有比第二电阻变化层（104b）高的氧含量的第一电阻变化层（104a）。

49. 发明申请

US20130015423A1 METHOD FOR MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT, AND NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT 有权
标题翻译：制造非易失性半导体存储元件的方法和非易失性半导体存储元件
公开(公告)号：US20130015423A1
公开(公告)日：2013-01-17
申请号：US13637465
申请日：2011-11-18
申请人： Takumi Mikawa , Yukio Hayakawa , Yoshio Kawashima , Takeki Ninomiya
发明人： Takumi Mikawa , Yukio Hayakawa , Yoshio Kawashima , Takeki Ninomiya
IPC分类号： H01L45/00 , H01L21/8239
CPC分类号： H01L45/1233 , H01L27/1021 , H01L27/2409 , H01L45/08 , H01L45/146 , H01L45/1675
摘要： Provided is a method for manufacturing a variable resistance nonvolatile semiconductor memory element, and a nonvolatile semiconductor memory element which make it possible to operate at a low voltage and high speed when initial breakdown is caused, and exhibit favorable diode element characteristics. The method for manufacturing the nonvolatile semiconductor memory element includes, after forming a top electrode of a variable resistance element and at least before forming a top electrode of an MSM diode element, oxidizing to insulate a portion of a variable resistance film in a region around an end face of a variable resistance layer.
摘要翻译：提供一种用于制造可变电阻非易失性半导体存储元件的方法，以及使得可以在初始击穿时以低电压和高速操作的可变电阻非易失性半导体存储元件，并且表现出良好的二极管元件特性。制造非易失性半导体存储元件的方法包括：在形成可变电阻元件的顶部电极之后，并且至少在形成MSM二极管元件的顶部电极之前，氧化以使可变电阻膜的一部分在一个周围的区域中绝缘可变电阻层的端面。

50. 发明申请

US20120252184A1 VARIABLE RESISTANCE ELEMENT AND MANUFACTURING METHOD THEREOF 有权
标题翻译：可变电阻元件及其制造方法
公开(公告)号：US20120252184A1
公开(公告)日：2012-10-04
申请号：US13515761
申请日：2010-12-14
申请人： Takeki Ninomiya , Yoshio Kawashima , Yukio Hayakawa , Takumi Mikawa
发明人： Takeki Ninomiya , Yoshio Kawashima , Yukio Hayakawa , Takumi Mikawa
IPC分类号： H01L21/8239
CPC分类号： C23C26/00 , C23C28/00 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1273 , H01L45/146 , H01L45/16 , H01L45/1675
摘要： A variable resistance element comprises, when M is a transition metal element, O is oxygen, and x and y are positive numbers satisfying y>x; a lower electrode; a first oxide layer formed on the lower electrode and comprising MOx when a content ratio of O with respect to M is x; a second oxide layer formed on the first oxide layer and comprising MOy when a content ratio of O with respect to M is y; an upper electrode formed on the second oxide layer; a protective layer formed on the upper electrode and comprising an electrically conductive material having a composition different from a composition of the upper electrode; an interlayer insulating layer formed to cover the protective layer; and an upper contact plug formed inside an upper contact hole penetrating the interlayer insulating layer.
摘要翻译：可变电阻元件包括当M是过渡金属元素时，O是氧，x和y是满足y> x的正数; 下电极当相对于M的含量比为O时，形成在下电极上并包含MOx的第一氧化物层; 当相对于M的含量比为O时，形成在第一氧化物层上并包含MOy的第二氧化物层; 形成在所述第二氧化物层上的上电极; 形成在上电极上并具有不同于上电极的组成的组成的导电材料的保护层; 形成为覆盖保护层的层间绝缘层; 以及形成在贯穿层间绝缘层的上接触孔内部的上接触插塞。

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