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41. 发明授权

US06880534B2 Evaporative fuel processing system 失效
标题翻译：蒸发燃料处理系统
公开(公告)号：US06880534B2
公开(公告)日：2005-04-19
申请号：US10870937
申请日：2004-06-21
申请人： Koichi Yoshiki , Kazuhiko Imamura , Ryuji Kohno , Mahito Shikama , Toshiichi Terakado , Kenichi Maeda , Masayuki Wakui
发明人： Koichi Yoshiki , Kazuhiko Imamura , Ryuji Kohno , Mahito Shikama , Toshiichi Terakado , Kenichi Maeda , Masayuki Wakui
IPC分类号： F02D41/00 , F02M25/08
CPC分类号： F02D41/0045 , F02D41/0032 , F02D41/187 , F02M25/08
摘要： An evaporative fuel processing system for processing evaporative fuel generated a fuel tank. A canister temporarily stores evaporative fuel generated in the fuel tank. A charge passage connects the fuel tank and the canister. A first purge passage connects the canister and an intake pipe of an internal combustion engine having a turbocharger. A purge control valve is provided in the first purge passage for adjusting a flow rate of gases flowing through the first purge passage. A second purge passage connects a downstream side of the purge control valve of the first purge passage and an upstream side of the turbocharger of the intake pipe. A jet pump is mounted on the second purge passage. A pressurized air supply passage supplies air pressurized by the turbocharger to the jet pump. The jet pump includes a nozzle for discharging the pressurized air supplied through the pressurized air supply passage.
摘要翻译：用于处理蒸发燃料的蒸发燃料处理系统产生燃料箱。罐临时存储在燃料箱中产生的蒸发燃料。充电通道连接燃料箱和罐。第一吹扫通道连接罐和具有涡轮增压器的内燃机的进气管。净化控制阀设置在第一吹扫通道中，用于调节流过第一吹扫通道的气体的流量。第二吹扫通道连接第一吹扫通道的净化控制阀的下游侧和进气管的涡轮增压器的上游侧。喷射泵安装在第二吹扫通道上。加压空气供应通道将由涡轮增压器加压的空气供应到喷射泵。喷射泵包括用于排出通过加压空气供应通道供应的加压空气的喷嘴。

42. 发明授权

US06851485B2 Circle structure of motor grader 失效
标题翻译：平地机的圆形结构
公开(公告)号：US06851485B2
公开(公告)日：2005-02-08
申请号：US10625081
申请日：2003-07-22
申请人： Kenichi Maeda , Kenji Misuda
发明人： Kenichi Maeda , Kenji Misuda
IPC分类号： E02F3/76 , E02F3/80
CPC分类号： E02F3/765 , E02F3/764 , E02F3/7645 , E02F3/7654
摘要： A circle structure of a motor grader excellent in durability at low maintenance cost. For this purpose, the circle structure includes a drawbar (105), at least one guide shoe (213) attached to the drawbar, an integrated ring-shaped circle gear (211) rotatably supported by the guide shoe, a plurality of circle gear mounting bolts (215) placed at equal pitches on a mounting pitch circle of the circle gear, and a circle (104) which is mounted to the circle gear by the circle gear mounting bolts and rotatable with respect to the drawbar.
摘要翻译：低维护成本的耐磨性优异的平地机的圆形结构。为此，圆形结构包括拉杆（105），附接到牵引杆的至少一个导靴（213），由导向板可旋转地支撑的集成环形圆形齿轮（211），多个圆形齿轮安装螺栓（215）以等间距放置在圆形齿轮的安装节圆上，以及圆（104），圆（104）通过圆形齿轮安装螺栓安装到圆形齿轮上并相对于牵引杆可旋转。

43. 发明授权

US06819020B2 Compact electric motor 有权
标题翻译：紧凑型电动机
公开(公告)号：US06819020B2
公开(公告)日：2004-11-16
申请号：US10415721
申请日：2003-08-28
申请人： Kazuo Toya , Shozo Sakon , Kenichi Maeda
发明人： Kazuo Toya , Shozo Sakon , Kenichi Maeda
IPC分类号： H02K500
CPC分类号： F04B17/03 , B60T8/4022 , F04B1/0443 , H02K5/10 , H02K5/148 , H02K5/15 , H02K5/161 , H02K5/1732
摘要： The present invention provides for its object a compact electric motor effective to provide a high reliability against the leakage of grease from a bearing on one side adjacent the output shaft or the ingress of oil from a counterpart machine. The compact electric motor 1 has a wall 14 having a predetermined gap around an output shaft 3 between a commutator 7 and a bearing 6, wherefore in the event of leakage of grease from the bearing 6 on an output side or ingress of oil from the counterpart machine, it is possible to prevent deposition on the commutator 3 and the brush 5 and, hence, to avoid an abnormal wear of the brush 5 and reduction in performance of the compact electric motor 1.
摘要翻译：本发明的目的是提供一种紧凑型电动机，其有效地提供高的可靠性，以防止润滑脂从邻近输出轴的一侧的轴承或来自对应机器的油的进入泄漏。紧凑型电动机1具有壁 14在换向器7和轴承6之间具有围绕输出轴3的预定间隙，因此在输出侧的轴承6或来自对应机器的油的入口处的润滑脂泄漏的情况下，可以防止沉积在换向器3和电刷5上，从而避免了电刷5的异常磨损和小型电动机1的性能下降。

44. 发明授权

US06421772B1 Parallel computer with improved access to adjacent processor and memory elements 失效
公开(公告)号：US06421772B1
公开(公告)日：2002-07-16
申请号：US09325046
申请日：1999-06-03
申请人： Kenichi Maeda , Nobuyuki Takeda , Yasukazu Okamoto
发明人： Kenichi Maeda , Nobuyuki Takeda , Yasukazu Okamoto
IPC分类号： G06F1576
CPC分类号： G06T1/60
摘要： A parallel computer of this invention includes a plurality of memory elements and a plurality of processing elements and each of the processing elements is connected to logically adjacent memory elements. For example, the processing elements which corresponds to a logical position (i, j) is connected to the memory elements which correspond to a plurality of logical positions (i, j), (i, j+1), (i+1, j) and (i+1, j+1). It is preferable if each of the memory elements can be accessed from the exterior. According to this invention, efficient memory access can be made and the parallel processing can be performed at high speed without increasing the hardware amount and making the control operation complicated. Further, the operation speed of the image processing can be enhanced by constructing an image memory by use of a plurality of memory elements and causing the processing element to effect the image processing in a distributed and cooperative manner.

45. 发明授权

US06198450B1 Dielectric resonator antenna for a mobile communication 有权
标题翻译：用于移动通信的介质谐振器天线
公开(公告)号：US06198450B1
公开(公告)日：2001-03-06
申请号：US09584789
申请日：2000-06-01
申请人： Naoki Adachi , Takashi Fukagawa , Suguru Fujita , Kenichi Maeda , Kazuaki Takahashi , Makoto Hasegawa , Morikazu Sagawa , Mitsuo Makimoto
发明人： Naoki Adachi , Takashi Fukagawa , Suguru Fujita , Kenichi Maeda , Kazuaki Takahashi , Makoto Hasegawa , Morikazu Sagawa , Mitsuo Makimoto
IPC分类号： H01Q138
CPC分类号： H01Q9/0485
摘要： A hemispherical dielectric resonator is arranged on a metal substrate to make a flat surface of the hemispherical dielectric resonator contact with the metal substrate, and a dielectric wave-guiding channel is connected with a curved side surface of the hemispherical dielectric resonator. Therefore, a dielectric resonance antenna in which the hemispherical dielectric resonator and the dielectric wave-guiding channel are placed on the same metal substrate is obtained. A signal transmitting through the dielectric wave-guiding channel is fed in the hemispherical dielectric resonator, the hemispherical dielectric resonator is resonated, and an electromagnetic wave is radiated. Therefore, the dielectric resonance antenna functions as a wave radiation device.
摘要翻译：半导体介质谐振器布置在金属基板上，以使半球形介质谐振器的平坦表面与金属基板接触，并且介电波导通道与半球形介质谐振器的弯曲侧表面连接。因此，获得了将半球形介质谐振器和介质波导路放置在同一金属基板上的介质谐振天线。通过介质波导通道传输的信号被馈送到半球形介质谐振器中，半球形介质谐振器谐振，并且电磁波被辐射。因此，介质谐振天线用作波浪辐射装置。

46. 发明授权

US6011341A DC motor having a brush holder provided with a terminal projection portion 失效
标题翻译：具有设置有端子突出部的电刷架的直流电动机
公开(公告)号：US6011341A
公开(公告)日：2000-01-04
申请号：US46367
申请日：1998-03-23
申请人： Kazuo Toya , Kenichi Maeda , Shozo Sakon
发明人： Kazuo Toya , Kenichi Maeda , Shozo Sakon
IPC分类号： B60T8/40 , H02K5/14 , H02K5/22 , H02K13/00 , H02K23/00 , H02K23/04 , H02K11/00
CPC分类号： B60T8/4022 , H02K5/148 , H02K5/225 , H02K2211/03
摘要： A DC motor has a projection which projects from the bottom surface of the brush-holder plate. The projection extends to outside in the axial direction of the motor. A terminal conductor is inserted into a perforated hole formed in the projection. One end of the terminal conductor is exposed to the outside of the motor from the tip of the projection, while another end of the terminal conductor is connected electrically to the brush. The projection functions as the built in type electrical connector to the motor, which when coupled to a power supply, powers the DC motor.
摘要翻译：直流电动机具有从电刷架板的底面突出的突起。突起在电机的轴向延伸到外侧。端子导体插入形成在突起中的穿孔中。端子导体的一端从突起的尖端暴露于电动机的外部，而端子导体的另一端电连接到电刷。投影功能用作电机的内置型电连接器，当连接到电源时，为直流电机供电。

47. 发明授权

US5987223A Image processing device 有权
公开(公告)号：US5987223A
公开(公告)日：1999-11-16
申请号：US145953
申请日：1998-09-03
申请人： Atsushi Narukawa , Fuminori Miyoshi , Kenichi Maeda , Hidenori Ohnishi
发明人： Atsushi Narukawa , Fuminori Miyoshi , Kenichi Maeda , Hidenori Ohnishi
IPC分类号： G03G15/00 , G06K15/00 , H04N1/00 , H04N1/32 , H04N1/40 , G06F15/00
CPC分类号： G06K15/00 , G06K15/18 , G06K15/1815 , H04N1/32561 , H04N1/40 , H04N1/00204 , H04N2201/0081 , H04N2201/0082 , H04N2201/0086
摘要： An image processing portion for conducting the specified processing of an image to be reproduced by an image forming portion based on the processed image data is constructed as a single control portion. Consequently, the development of a variety of digital copying machines requires preparation of specially designated control boards according to levels of the products. This makes machines expensive and requires users to pay a considerable initial cost. An image processing device of the present invention is provided with an image information inputting means for inputting image information as a first level image, a main image-processing board for conducting the specified processing of the input image information of the first revel image, a sub image-processing board for conducting the specified processing of the image information processed by the main image processing board and outputting the information as a second level image, and a means for reproducing an image according to the image information processed by the main image-processing board or the sub image-processing board. These boards are independent from each other in the circuit configuration.

48. 发明授权

US5627987A Memory management and protection system for virtual memory in computer system 失效
标题翻译：计算机系统虚拟内存的内存管理和保护系统
公开(公告)号：US5627987A
公开(公告)日：1997-05-06
申请号：US21098
申请日：1993-02-23
申请人： Hiroshi Nozue , Mitsuo Saito , Kenichi Maeda , Shigehiro Asano , Toshio Okamoto , Shin Sungho , Hideo Segawa
发明人： Hiroshi Nozue , Mitsuo Saito , Kenichi Maeda , Shigehiro Asano , Toshio Okamoto , Shin Sungho , Hideo Segawa
IPC分类号： G06F12/10 , G06F12/14 , G06F12/00
CPC分类号： G06F12/1458 , G06F12/109 , G06F12/1483 , G06F12/1491 , G06F2212/656
摘要： A memory management and protection system for realizing a high speed execution and a proper and flexible memory access control for multiple programs sharing an identical logical address space. In the system, the memory access is permitted according to a segment identifier identifying a segment in the logical address space, and a memory protection information for a region in each segment including a target right permission to indicate assigned rights to make a memory access from the region to each of the segments, and an execution permission to indicate a type of the memory access permitted by the right permission. Alternatively, a memory access can be permitted by using an access control list to be attached to each address table entry, which stores a plurality of program numbers identifying programs which are permitted to make accesses to the logical address stored in each address table entry, among which one that matches with the current program number is to be searched. Also, it is preferable to allocate a plurality of programs within a limit of available memory protection capacity to an identical logical address space, without any overlap between adjacently allocated address regions.
摘要翻译：一种用于实现高速执行的存储器管理和保护系统，以及用于共享相同逻辑地址空间的多个程序的适当且灵活的存储器访问控制。在系统中，根据标识逻辑地址空间中的段的段标识符，允许存储器访问，以及每个区段中的区域的存储器保护信息，包括目标权限，以指示从存储器访问的指定的权限区域，以及用于指示由权限许可允许的存储器访问的类型的执行许可。或者，可以通过使用附加到每个地址表条目的访问控制列表来允许存储器访问，每个地址表条目存储多个程序号，标识被允许访问存储在每个地址表条目中的逻辑地址的程序，将搜索与当前节目号匹配的那个。此外，优选地，在可用存储器保护容量的限制内将多个程序分配给相同的逻辑地址空间，而不会在相邻分配的地址区域之间发生任何重叠。

49. 发明授权

US09268706B2 Information processing device including host device and semiconductor memory device having plurality of address conversion information 有权
标题翻译：信息处理装置，包括具有多个地址转换信息的主机装置和半导体存储装置
公开(公告)号：US09268706B2
公开(公告)日：2016-02-23
申请号：US13561392
申请日：2012-07-30
申请人： Atsushi Kunimatsu , Kenichi Maeda
发明人： Atsushi Kunimatsu , Kenichi Maeda
IPC分类号： G06F12/00 , G06F12/10 , G06F11/14 , G06F12/02
CPC分类号： G06F3/061 , G06F3/0604 , G06F3/0638 , G06F3/064 , G06F3/0688 , G06F11/1458 , G06F12/0246 , G06F12/0253 , G06F12/0292 , G06F12/10 , G06F12/1027 , G06F12/1081 , G06F13/28 , G06F2212/7201 , G06F2212/7205
摘要： A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.
摘要翻译：一种装置包括主机，包括主存储器和包括非易失性半导体存储器，存储器单元和控制器的半导体存储器。非易失性半导体存储器存储首地址信息。存储单元存储第二地址信息作为第一地址信息的一部分。控制器基于第二地址信息访问非易失性半导体存储器。第三地址信息存储在主存储器中，并且是第一地址信息的一部分或全部。当访问非易失性半导体存储器时，如果地址信息未被存储在第二地址信息中，则控制器使用第三地址信息。

50. 发明授权

US08458436B2 Device and memory system for memory management using access frequency information 有权
标题翻译：用于存储器管理的设备和存储器系统使用访问频率信息
公开(公告)号：US08458436B2
公开(公告)日：2013-06-04
申请号：US13360903
申请日：2012-01-30
申请人： Atsushi Kunimatsu , Hiroto Nakai , Hiroyuki Sakamoto , Kenichi Maeda
发明人： Atsushi Kunimatsu , Hiroto Nakai , Hiroyuki Sakamoto , Kenichi Maeda
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/0804 , G06F2212/7201 , G06F2212/7211
摘要： An integrated memory management device according to an example of the invention comprises an acquiring unit acquiring a read destination logical address from a processor, an address conversion unit converting the read destination logical address into a read destination physical address of a non-volatile main memory, an access unit reading, from the non-volatile main memory, data that corresponds to the read destination physical address and has a size that is equal to a block size or an integer multiple of the page size of the non-volatile main memory, and transmission unit transferring the read data to a cache memory of the processor having a cache size that depends on the block size or the integer multiple of the page size of the non-volatile main memory.
摘要翻译：根据本发明的示例的集成存储器管理装置包括获取单元，其从处理器获取读取的目的地逻辑地址，地址转换单元将读取的目的地逻辑地址转换为非易失性主存储器的读取目的地物理地址，来自非易失性主存储器的访问单元读取与读取的目的地物理地址对应的数据，并且具有等于非易失性主存储器的页面大小的块大小或整数倍的大小，以及传输单元将读取的数据传送到具有取决于非易失性主存储器的页面大小的块大小或整数倍的高速缓存大小的处理器的高速缓存存储器。

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