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41. 发明授权

US07666047B2 Method for securing a metal noble tip to an electrode of a spark plug using a resistance and laser welding process 有权
标题翻译：一种使用电阻和激光焊接方法将金属高贵尖端固定到火花塞的电极的方法
公开(公告)号：US07666047B2
公开(公告)日：2010-02-23
申请号：US10565902
申请日：2004-11-18
申请人： Akira Suzuki , Tomoaki Kato , Kazuyoshi Torii , Akikazu Taido
发明人： Akira Suzuki , Tomoaki Kato , Kazuyoshi Torii , Akikazu Taido
IPC分类号： H01T1/22 , H01T21/00 , H01T21/02
CPC分类号： H01T21/02 , H01T13/20 , H01T13/39
摘要： There is provided a method for producing a spark plug in which welding strength between a noble metal tip and an electrode joined by laser welding can be restrained from becoming weak.A noble metal tip (90) to be joined to a center electrode (2) or ground electrode of a spark plug to form a spark discharge gap is resistance-welded to each electrode containing no noble metal and then laser-welded. In the noble metal tip (90) exposed under a severe environment involving spark discharge, a molten portion (80) formed in such a manner that a portion of the noble metal tip (90) and a portion of the electrode are melted by laser welding and a non-molten portion (95) on the noble metal tip (90) side are apt to be peeled from each other in a boundary surface (83) between the molten portion (80) and the non-molten portion (95). The noble metal content in the molten portion (80) however becomes higher because a flange portion is formed in a bottom portion by pressing force applied on the noble metal tip (90) at the time of resistance welding and then irradiated with a laser beam. Accordingly, peeling can be prevented from occurring in the boundary surface (83).
摘要翻译：提供一种用于制造火花塞的方法，其中可以抑制贵金属电极头和通过激光焊接接合的电极之间的焊接强度变弱。要连接到火花塞的中心电极（2）或接地电极以形成火花放电间隙的贵金属端头（90）被电阻焊接到不含贵金属的每个电极上，然后被激光焊接。在涉及火花放电的恶劣环境下露出的贵金属电极头（90）中，以使得贵金属电极头（90）的一部分和电极的一部分通过激光焊接而熔化的方式形成的熔融部（80）并且在熔融部分（80）和非熔融部分（95）之间的边界表面（83）中，在贵金属端头（90）侧上的非熔融部分（95）易于彼此剥离。然而，熔融部分（80）中的贵金属含量变高，因为通过在电阻焊接时施加在贵金属电极头（90）上的压力而在底部形成凸缘部分，然后用激光束照射。因此，能够防止在边界面（83）发生剥离。

42. 发明申请

US20080128833A1 High-Dielectric-Constant Film, Field-Effect Transistor and Semiconductor Integrated Circuit Device Using the Same, and Method for Producing High-Dielectric-Constant Film 审中-公开
标题翻译：高介电常数膜，场效应晶体管及其使用的半导体集成电路器件及其制造方法
公开(公告)号：US20080128833A1
公开(公告)日：2008-06-05
申请号：US11660925
申请日：2005-08-25
申请人： Takaaki Kawahara , Kazuyoshi Torii , Minoru Inoue , Satoshi Hasaka
发明人： Takaaki Kawahara , Kazuyoshi Torii , Minoru Inoue , Satoshi Hasaka
IPC分类号： H01L29/78 , C09D1/00 , H01L21/316
CPC分类号： H01L21/02181 , C23C16/308 , C23C16/40 , H01L21/02148 , H01L21/02178 , H01L21/02194 , H01L21/02205 , H01L21/02274 , H01L21/0228 , H01L21/28185 , H01L21/28194 , H01L21/3141 , H01L21/3145 , H01L21/31645 , H01L29/513 , H01L29/517 , H01L29/6659 , H01L29/7833
摘要： A high-dielectric-constant film including hafnium, wherein the above-mentioned high-dielectric-constant film includes deuterium at a ratio higher than the ratio of deuterium to hydrogen present in nature. In a field-effect transistor provided with the high-dielectric-constant film including hafnium, the interface state density at the interface between a silicon substrate and a gate dielectric film decreases and carrier mobility in the gate dielectric film increases. In the present invention, a high-dielectric-constant constant second dielectric film, which is a thin film including hafnium such as HfSiON or HfAlOx and including deuterium at a ratio higher than the ratio of deuterium to hydrogen present in nature, is used as the gate dielectric film of the field-effect transistor.
摘要翻译：包括铪的高介电常数膜，其中上述高介电常数膜包括比自然界中存在的氘与氢的比例高的氘。在设置有包含铪的高介电常数膜的场效应晶体管中，硅衬底和栅极电介质膜之间的界面处的界面态密度降低，并且栅极电介质膜中的载流子迁移率增加。在本发明中，高介电常数常数第二电介质膜是包括铪如HfSiON或HfAlO x x的薄膜，并且包含氘的比例高于氘与氢的比例本质上是用作场效应晶体管的栅极电介质膜。

43. 发明申请

US20070080618A1 Spark plug and method for producing spark plug 有权
标题翻译：火花塞和火花塞生产方法
公开(公告)号：US20070080618A1
公开(公告)日：2007-04-12
申请号：US11545490
申请日：2006-10-11
申请人： Kazuyoshi Torii , Kazumasa Yoshida , Wataru Matsutani
发明人： Kazuyoshi Torii , Kazumasa Yoshida , Wataru Matsutani
IPC分类号： H01T13/20
CPC分类号： H01T21/02 , H01T13/32
摘要： A spark plug comprising: a center electrode extending in a direction of an axis of said spark plug; a cylindrical insulator which has a shaft hole, and which holds said center electrode in said shaft hole in a state where a tip end of said center electrode is projected from a tip end face of said insulator; a metal shell which holds said insulator; and a ground electrode in which one end is joined to a tip end face of said metal shell, and which extends from said one end toward another end, wherein said ground electrode has an inner side face which faces said center electrode, and an outer side face which is a back face with respect to said inner side face, said outer side face is formed as an arcuately curved face when viewed from a side of said another end in an extending direction of said ground electrode, and a columnar noble metal tip is joined to said inner side face.
摘要翻译：一种火花塞，包括：沿所述火花塞的轴线方向延伸的中心电极; 圆柱形绝缘体，其具有轴孔，并且在所述中心电极的前端从所述绝缘体的前端面突出的状态下将所述中心电极保持在所述轴孔中; 保持所述绝缘体的金属外壳; 以及接地电极，其一端接合到所述金属壳的前端面，并且从所述一端向另一端延伸，其中所述接地电极具有面向所述中心电极的内侧面，外侧面是相对于所述内侧面的背面，当从所述另一端的侧面沿着所述接地电极的延伸方向观察时，所述外侧面形成为弧形弯曲面，柱状贵金属电极头为连接到所述内侧面。

44. 发明申请

US20060238092A1 Spark plug and method for manufacturing the spark plug 有权
标题翻译：火花塞和火花塞的制造方法
公开(公告)号：US20060238092A1
公开(公告)日：2006-10-26
申请号：US11451469
申请日：2006-06-13
申请人： Hideki Teramura , Tomoaki Kato , Kazuyoshi Torii
发明人： Hideki Teramura , Tomoaki Kato , Kazuyoshi Torii
IPC分类号： H01T13/20
CPC分类号： H01T13/32 , H01T21/02
摘要： A ground-electrode spark portion 32 is formed from a noble metal which contains Pt as a main component, and is joined to a main metal portion of the ground electrode 4 via an alloy layer which has a thickness ranging from 0.5 μm to 100 μm and in which the noble metal that constitutes the ground-electrode spark portion 32 and the metal that constitutes the main metal portion of the ground electrode 4 are alloyed with each other. The ground-electrode spark portion 32 is configured such that a distal end surface 32t facing a spark discharge gap g is smaller in diameter than a bottom surface 32u joined to the ground electrode 4; and the distal end surface 32t is protrusively located beyond the side surface 4s of the ground electrode 4. When the ground-electrode spark portion 32 is viewed in plane from the distal end surface 32t, a portion of the surface of the ground-electrode spark portion 32 is viewed as a peripheral exposed-region surface 32p which is exposed on the side surface 4s of the ground electrode 4 so as to surround the distal end surface 32t.
摘要翻译：接地电极火花部32由含有Pt作为主要成分的贵金属形成，并且通过厚度为0.5μm〜100μm的合金层与接地电极4的主金属部接合，其中构成接地电极火花部分32的贵金属和构成接地电极4的主金属部分的金属彼此合金化。接地电极火花部32构成为，面向火花放电间隙g的前端面32t的直径小于接合于接地电极4的底面32u的直径。并且远端表面32t突出地位于接地电极4的侧表面4s之外。当从前端面32t看平面处接地电极火花部32时，接地电极火花部32的一部分表面被看作暴露于侧面的周边暴露区域表面32p 接地电极4的表面4s，以围绕远端表面32t。

45. 发明授权

US07087495B2 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07087495B2
公开(公告)日：2006-08-08
申请号：US10796978
申请日：2004-03-11
申请人： Takaaki Kawahara , Kazuyoshi Torii
发明人： Takaaki Kawahara , Kazuyoshi Torii
IPC分类号： H01L21/336 , H01L21/8238
CPC分类号： H01L21/28194 , H01L21/28185 , H01L21/28202 , H01L21/3141 , H01L21/31604 , H01L21/31616 , H01L21/31645 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A method for manufacturing a semiconductor device includes forming a first insulating film on a substrate, forming a second insulating film on the first insulating film, and forming a gate electrode on the second insulating film. Forming the second insulating film includes supplying film-forming materials and adsorbing the film-forming materials on the first insulating film, purging the film-forming materials that have not been adsorbed, supplying oxidants to oxidize the adsorbed film-forming materials, and purging the oxidants that have not contributed to oxidization. Forming the second insulating film is repeated in cycles, continuously, and the purging time of the oxidants in an initial number of the cycles is longer than the purging time of the oxidants in cycles following the initial number of cycles.
摘要翻译：半导体器件的制造方法包括在基板上形成第一绝缘膜，在第一绝缘膜上形成第二绝缘膜，在第二绝缘膜上形成栅电极。形成第二绝缘膜包括供给成膜材料并将成膜材料吸附在第一绝缘膜上，清洗未被吸附的成膜材料，供给氧化剂以氧化吸附的成膜材料，以及清洗没有促进氧化的氧化剂。循环连续地重复形成第二绝缘膜，并且初始循环次数中的氧化剂的清洗时间比初始循环次数之后的氧化剂的清洗时间长。

46. 发明授权

US06822276B1 Memory structure with a ferroelectric capacitor 失效
标题翻译：具有铁电电容的存储器结构
公开(公告)号：US06822276B1
公开(公告)日：2004-11-23
申请号：US09391250
申请日：1999-09-07
申请人： Kazuyoshi Torii , Hiroshi Miki , Yoshihisa Fujisaki
发明人： Kazuyoshi Torii , Hiroshi Miki , Yoshihisa Fujisaki
IPC分类号： H01L27108
CPC分类号： H01L28/56 , H01L21/28568 , H01L27/10852 , H01L27/10855 , H01L28/55 , H01L28/75
摘要： It is an object of the present invention to provide a fine memory cell structure preventing a reaction between an interlayer insulating film and a ferroelectric film and suitable for high integration. According to the invention, there is provided a structure in which a reaction barrier film 43 is interposed between a ferroelectric film 71 and an interlayer insulating film 32 and side walls of a diffusion barrier film 51 are not brought into direct contact with the ferroelectric film 71. Thereby, the reaction between the interlayer insulating film 32 and the ferroelectric film 71 can be restrained and exfoliation of the ferroelectric film 71 can be prevented.
摘要翻译：本发明的目的是提供一种防止层间绝缘膜和铁电体膜之间的反应并且适合于高集成度的精细存储单元结构。根据本发明，提供一种结构，其中反应阻挡膜43介于铁电膜71和层间绝缘膜32之间，并且扩散阻挡膜51的侧壁不与铁电体膜71直接接触由此，能够抑制层间绝缘膜32与强电介质膜71的反应，能够防止铁电体膜71的剥离。

47. 发明授权

US06800889B2 Semiconductor device and fabrication method thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US06800889B2
公开(公告)日：2004-10-05
申请号：US10073240
申请日：2002-02-13
申请人： Shinichiro Takatani , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki , Kazuyoshi Torii
发明人： Shinichiro Takatani , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki , Kazuyoshi Torii
IPC分类号： H01L2976
CPC分类号： H01L28/55 , H01L28/60
摘要： A semiconductor device includes a capacitor having a lower electrode (102), a high-dielectric-constant or ferroelectric thin film (103), and an upper electrode (104) which are subsequently stacked. An impurity having an action of suppressing the catalytic activity of a metal or a conductive oxide constituting the electrode is added to the upper electrode (104). The addition of the impurity is effective to prevent inconveniences such as a reduction in capacitance, an insulation failure, and the peeling of the electrode due to hydrogen heat-treatment performed after formation of the upper electrode (104), and to improve the long-term reliability.
摘要翻译：半导体器件包括随后堆叠的具有下电极（102），高介电常数或铁电薄膜（103）和上电极（104）的电容器。具有抑制构成电极的金属或导电氧化物的催化活性的作用的杂质被添加到上电极（104）。杂质的添加对于防止在形成上电极（104）之后进行的氢热处理等电容的减少，绝缘失效以及电极的剥离等不良情况是有效的，长期可靠性。

48. 发明授权

US06667199B2 Semiconductor device having a replacement gate type field effect transistor and its manufacturing method 失效
标题翻译：具有替代栅极型场效应晶体管的半导体器件及其制造方法
公开(公告)号：US06667199B2
公开(公告)日：2003-12-23
申请号：US10081227
申请日：2002-02-25
申请人： Kazuyoshi Torii , Ryuta Tsuchiya , Masatada Horiuchi , Takahiro Onai
发明人： Kazuyoshi Torii , Ryuta Tsuchiya , Masatada Horiuchi , Takahiro Onai
IPC分类号： H01L21338
CPC分类号： H01L29/66545 , H01L21/823425 , H01L21/82345
摘要： The present invention provides a MISFET with a replacement gate electrode, which ensures large ON-current. A semiconductor device, in which on the substrate, first and second field effect transistors are formed, the first field effect transistor is a replacement gate type field effect transistor, and the length of the overlap between a gate electrode and a source/drain diffusion zone of the first field effect transistor correspond to that between a gate electrode and a source/drain diffusion zone of the second field effect transistor.
摘要翻译：本发明提供了具有替代栅电极的MISFET，其确保大的导通电流。一种其中在衬底上形成第一和第二场效应晶体管的半导体器件，第一场效应晶体管是替代栅极型场效应并且第一场效应晶体管的栅极电极和源极/漏极扩散区域之间的重叠的长度对应于第二场效应晶体管的栅极电极和源极/漏极扩散区域之间的重叠长度。

49. 发明授权

US06462368B2 Ferroelectric capacitor with a self-aligned diffusion barrier 失效
标题翻译：具有自对准扩散阻挡层的铁电电容器
公开(公告)号：US06462368B2
公开(公告)日：2002-10-08
申请号：US10059256
申请日：2002-01-31
申请人： Kazuyoshi Torii , Yasuhiro Shimamoto , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki
发明人： Kazuyoshi Torii , Yasuhiro Shimamoto , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki
IPC分类号： H01L2976
CPC分类号： H01L27/10855 , H01L21/76885 , H01L27/10894 , H01L28/91
摘要： A diffusion preventive layer extending between the bottom surface of a lower electrode and an interconnection connecting the lower electrode to one of the diffusion layer of a switching transistor is self-aligned. As a result, side trench is produced since a hole pattern is formed by using a dummy film, and even if a contact plug of a memory section is misaligned with the diffusion preventive layer, the contact plug is out of direct contact with a dielectric film having a high permittivity. Hence, a highly reliable device can be obtained.
摘要翻译：在下电极的底表面和将下电极连接到开关晶体管的扩散层之一的互连之间延伸的扩散防止层是自对准的。结果，由于通过使用虚拟膜形成孔图案，所以制造侧沟槽，并且即使存储部分的接触插塞与扩散防止层不对准，接触插塞也不与电介质膜直接接触具有很高的介电常数。因此，可以获得高度可靠的装置。

50. 发明授权

US06338994B1 Semiconductor device and method of fabricating thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06338994B1
公开(公告)日：2002-01-15
申请号：US09475033
申请日：1999-12-30
申请人： Kazuyoshi Torii , Hiroshi Kawakami , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki , Masahiro Moniwa
发明人： Kazuyoshi Torii , Hiroshi Kawakami , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki , Masahiro Moniwa
IPC分类号： H01L218242
CPC分类号： H01L28/55 , H01L27/10852
摘要： A semiconductor device having a bottom electrode, a ferroelectric film, and a top electrode formed on a semiconductor substrate, wherein the angle of each of the main cross sectional sides of the ferroelectric film relative to the main surface of the semiconductor substrate is less than 75 degrees. Forming the ferroelectric film into the trapezoid in cross section having such an angle provides a microscopic capacitor without electrical short-circuit between the top and bottom electrodes if the top electrode, the ferroelectric film, and the bottom electrode are etched with single photolithography process step. The novel technique implements a microscopic memory cell structure suitable for highly integrated memory devices.
摘要翻译：一种形成在半导体衬底上的具有底电极，铁电体膜和顶电极的半导体器件，其中，强电介质膜的每个主横截面相对于半导体衬底的主表面的角度小于75 度。如果用单一光刻工艺步骤蚀刻上电极，铁电体膜和底电极，则将铁电膜形成具有这种角度的横截面中的梯形，提供了在顶电极和底电极之间没有电短路的微电容器。该新技术实现了适用于高度集成的存储器件的微观存储单元结构。

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