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41. 发明授权

US06947803B1 Dispatch and/or disposition of material based upon an expected parameter result 失效
标题翻译：根据预期的参数结果调度和/或布置材料
公开(公告)号：US06947803B1
公开(公告)日：2005-09-20
申请号：US10259064
申请日：2002-09-27
申请人： Christopher A. Bode , Alexander J. Pasadyn
发明人： Christopher A. Bode , Alexander J. Pasadyn
IPC分类号： G06F19/00 , H01L21/00
CPC分类号： H01L21/67253
摘要： A method and an apparatus for affecting dispatch and/or disposition of a workpiece. A process step upon a workpiece is performed based upon a predetermined routing plan. An end-of-line parameter is modeled based upon the process performed upon the workpiece. A workpiece routing/disposition process is performed based upon modeling an end-of-line (EOL) parameter. The workpiece routing/disposition process includes using a controller to modify the routing plan.
摘要翻译：一种用于影响工件的调度和/或布置的方法和装置。基于预定的布线计划执行工件上的工艺步骤。根据在工件上执行的过程来对行尾参数进行建模。基于对行尾（EOL）参数的建模来执行工件路线/配置过程。工件路线/处理过程包括使用控制器修改路由计划。

42. 发明授权

US06823231B1 Tuning of a process control based upon layer dependencies 有权
标题翻译：基于层依赖关系调整过程控制
公开(公告)号：US06823231B1
公开(公告)日：2004-11-23
申请号：US10303307
申请日：2002-11-25
申请人： Christopher A. Bode , Alexander J. Pasadyn
发明人： Christopher A. Bode , Alexander J. Pasadyn
IPC分类号： G06F1900
CPC分类号： H01L22/12
摘要： A method and an apparatus for selectively processing a layer of a workpiece based upon dependencies with other layers in the workpiece. A process step upon the workpiece is performed. Metrology data relating to the workpiece is acquired. A process adjustment relating to a first layer on the workpiece is calculated based upon the metrology data. A determination whether an error on a second layer on the workpiece would occur in response to an implementation of the process adjustment performed on the first layer. A magnitude of the calculated process adjustment is reduced in response to a determination that the second layer would be affected in response to the implementation of the process adjustment.
摘要翻译：一种用于基于与工件中的其它层的依赖性选择性地处理工件层的方法和装置。执行工件上的工艺步骤。获取与工件有关的计量数据。基于测量数据计算与工件上的第一层有关的过程调整。响应于在第一层上执行的过程调整的实现，确定在工件上的第二层上是否发生错误。响应于响应于过程调整的实现而影响第二层的确定，所计算的过程调整的大小被减小。

43. 发明授权

US06738682B1 Method and apparatus for scheduling based on state estimation uncertainties 有权
标题翻译：基于状态估计不确定度的调度方法和装置
公开(公告)号：US06738682B1
公开(公告)日：2004-05-18
申请号：US10210753
申请日：2002-07-31
申请人： Alexander J. Pasadyn
发明人： Alexander J. Pasadyn
IPC分类号： G06F1900
CPC分类号： G05B19/41865 , G05B13/04 , G05B2219/32297 , G06Q10/06311 , Y02P80/114 , Y02P90/20
摘要： A method for scheduling activities in a manufacturing system includes defining a plurality of observed states associated with the manufacturing system. State estimates are generated for the observed states. Uncertainty values for the state estimates are generated. A plurality of candidate schedules for performing activities in the manufacturing system is identified. Changes to the uncertainty values are predicted based on the candidate schedules. One of the candidate schedules is selected based on the predicted changes to the uncertainty values.
摘要翻译：一种用于在制造系统中调度活动的方法包括定义与制造系统相关联的多个观察状态。对观察到的状态产生状态估计。生成状态估计的不确定性值。识别用于在制造系统中执行活动的多个候选时间表。根据候选人时间表预测不确定性值的变化。基于对不确定性值的预测变化来选择候选日程之一。

44. 发明授权

US06737208B1 Method and apparatus for controlling photolithography overlay registration incorporating feedforward overlay information 有权
标题翻译：用于控制包含前馈叠加信息的光刻重叠配准的方法和装置
公开(公告)号：US06737208B1
公开(公告)日：2004-05-18
申请号：US10022488
申请日：2001-12-17
申请人： Christopher A. Bode , Alexander J. Pasadyn
发明人： Christopher A. Bode , Alexander J. Pasadyn
IPC分类号： G03F900
CPC分类号： G03F7/70525
摘要： A method for controlling a photolithography process includes forming a first layer on a selected wafer. A first overlay error associated with the first layer is measured. At least one parameter in an operating recipe for performing a photolithography process on a second layer formed on the first wafer is determined based on at least the first overlay error measurement. A processing line includes a photolithography stepper, and overlay metrology tool, and a controller. The photolithography stepper is configured to process wafers in accordance with an operating recipe. The overlay metrology tool is configured to measure overlay errors associated with the processing of the wafers in the photolithography stepper. The controller is configured to receive a first overlay error measurement associated with the formation of a first layer on a selected wafer and determine at least one parameter in the operating recipe for performing a photolithography process on a second layer formed on the selected wafer based on at least the first overlay error measurement
摘要翻译：一种用于控制光刻工艺的方法包括在所选晶片上形成第一层。测量与第一层相关联的第一重叠错误。至少基于第一覆盖误差测量来确定用于在形成在第一晶片上的第二层上进行光刻工艺的操作配方中的至少一个参数。处理线包括光刻步进机，重叠计量工具和控制器。光刻步进器被配置为根据操作配方处理晶片。覆盖计量工具被配置为测量与光刻步进机中的晶片的处理相关联的重叠误差。控制器被配置为接收与所选择的晶片上形成第一层相关联的第一重叠误差测量，并确定操作配方中的至少一个参数，用于在形成于所选择的晶片上的第二层上进行光刻处理最少重叠错误测量

45. 发明授权

US06698009B1 Method and apparatus for modeling of batch dynamics based upon integrated metrology 有权
标题翻译：基于综合计量学的批量动力学建模方法和装置
公开(公告)号：US06698009B1
公开(公告)日：2004-02-24
申请号：US10085938
申请日：2002-02-28
申请人： Alexander J. Pasadyn , Christopher A. Bode
发明人： Alexander J. Pasadyn , Christopher A. Bode
IPC分类号： G06F1750
CPC分类号： H01L22/20 , H01L2223/54453
摘要： A method and an apparatus for performing modeling of batch dynamics in processing of semiconductor wafers. The method includes performing the process on the first semiconductor wafer in a lot, the process being controlled by a tool model, and acquiring integrated metrology data related to the process of the first semiconductor wafer using an integrated metrology tool. The method further includes performing a lot dynamic modeling process based upon an analysis of the integrated metrology data, the lot dynamic modeling process comprising adjusting the tool model based upon analysis of the integrated metrology data, and performing the process on a second semiconductor wafer in the lot based upon the adjusted tool model.
摘要翻译：一种用于在半导体晶片的处理中执行批量动力学建模的方法和装置。该方法包括在第一半导体晶片上进行大量的处理，该工艺由工具模型控制，以及使用集成计量工具获取与第一半导体晶片的工艺相关的集成度量数据。该方法还包括基于综合测量数据的分析来执行大量动态建模过程，批量动态建模过程包括基于集成测量数据的分析来调整工具模型，以及在第二半导体晶片上执行该过程基于调整后的工具模型。

46. 发明授权

US06665623B1 Method and apparatus for optimizing downstream uniformity 失效
标题翻译：优化下游均匀性的方法和装置
公开(公告)号：US06665623B1
公开(公告)日：2003-12-16
申请号：US10209789
申请日：2002-07-31
申请人： Alexander J. Pasadyn , Christopher A. Bode
发明人： Alexander J. Pasadyn , Christopher A. Bode
IPC分类号： G01R3126
CPC分类号： G01R31/2831
摘要： A method includes measuring a characteristic of a workpiece at a plurality of locations. A uniformity profile is generated based on the characteristic measurements. At least one acceptable region of the workpiece is identified based on the uniformity profile. At least one unacceptable region of the workpiece is identified based on the uniformity profile. The uniformity profile is filtered to remove at least a portion of the characteristic measurements associated with the second unacceptable region. At least one parameter of an operating recipe for performing a process on the workpiece is determined based on the filtered uniformity profile.
摘要翻译：一种方法包括在多个位置测量工件的特性。基于特征测量产生均匀性曲线。基于均匀性轮廓识别工件的至少一个可接受区域。基于均匀性轮廓来识别工件的至少一个不可接受的区域。过滤均匀性分布以去除与第二不可接受区域相关联的特征测量的至少一部分。基于滤波的均匀性轮廓来确定用于在工件上执行处理的操作配方的至少一个参数。

47. 发明授权

US06897075B2 Method and apparatus for controlling photolithography overlay registration incorporating feedforward overlay information 有权
标题翻译：用于控制包含前馈叠加信息的光刻重叠配准的方法和装置
公开(公告)号：US06897075B2
公开(公告)日：2005-05-24
申请号：US10778411
申请日：2004-02-13
申请人： Christopher A. Bode , Alexander J. Pasadyn
发明人： Christopher A. Bode , Alexander J. Pasadyn
IPC分类号： G03F7/20 , H01L21/027 , G01R21/26
CPC分类号： G03F7/70525
摘要： A method for controlling a photolithography process includes forming a first layer on a selected wafer. A first overlay error associated with the first layer is measured. At least one parameter in an operating recipe for performing a photolithography process on a second layer formed on the first wafer is determined based on at least the first overlay error measurement. A processing line includes a photolithography stepper, and overlay metrology tool, and a controller. The photolithography stepper is configured to process wafers in accordance with an operating recipe. The overlay metrology tool is configured to measure overlay errors associated with the processing of the wafers in the photolithography stepper. The controller is configured to receive a first overlay error measurement associated with the formation of a first layer on a selected wafer and determine at least one parameter in the operating recipe for performing a photolithography process on a second layer formed on the selected wafer based on at least the first overlay error measurement.
摘要翻译：一种用于控制光刻工艺的方法包括在所选晶片上形成第一层。测量与第一层相关联的第一重叠错误。至少基于第一覆盖误差测量来确定用于在形成在第一晶片上的第二层上进行光刻工艺的操作配方中的至少一个参数。处理线包括光刻步进机，重叠计量工具和控制器。光刻步进器被配置为根据操作配方处理晶片。覆盖计量工具被配置为测量与光刻步进机中的晶片的处理相关联的重叠误差。控制器被配置为接收与所选择的晶片上形成第一层相关联的第一重叠误差测量，并确定操作配方中的至少一个参数，用于在形成于所选择的晶片上的第二层上进行光刻处理最少重叠错误测量。

48. 发明授权

US06764868B1 Use of slurry waste composition to determine the amount of metal removed during chemical mechanical polishing, and system for accomplishing same 失效
标题翻译：使用浆料废料组合物来确定在化学机械抛光过程中去除的金属量，以及完成相同的系统
公开(公告)号：US06764868B1
公开(公告)日：2004-07-20
申请号：US09909112
申请日：2001-07-19
申请人： Joyce S. Oey Hewett , Alexander J. Pasadyn
发明人： Joyce S. Oey Hewett , Alexander J. Pasadyn
IPC分类号： H01L2166
CPC分类号： B24B37/013 , B24B37/042 , B24B49/00
摘要： In general, the present invention is directed to a method of using slurry waste composition to determine the amount of metal removed during chemical mechanical polishing processes, and a system for accomplishing same. In one embodiment, the method comprises providing a substrate having a metal layer formed thereabove, performing a chemical mechanical polishing process on the layer of metal in the presence of a polishing slurry, measuring at least a concentration of a material comprising the metal layer in the polishing slurry used during said polishing process after at least some of said polishing process has been performed, and determining a thickness of the layer of metal removed during the polishing process based upon at least the measured concentration of the material comprising the metal layer. In another embodiment, the present invention is directed to a system that is comprised of a chemical mechanical polishing tool for performing a chemical mechanical polishing process on a metal layer in the presence of a polishing slurry, a concentration monitor for measuring a concentration of a material comprising the metal layer in the polishing slurry after at least one of the polishing process has been performed, and a controller for receiving the measured concentration and determining a thickness of the layer of metal removed during the polishing process based upon at least the measured concentration of the material comprising the layer of metal.
摘要翻译：通常，本发明涉及一种使用浆料废料组合物来确定在化学机械抛光过程中去除的金属的量的方法和用于实现其的系统。在一个实施方案中，该方法包括提供具有在其上形成的金属层的基材，在抛光浆料存在下对该金属层进行化学机械抛光工艺，测量至少一种包含金属层的材料的浓度在至少一些所述抛光工艺已经进行之后，在抛光过程中使用的抛光浆料，以及至少基于所测量的包括金属层的材料的浓度，确定在抛光过程中去除的金属层的厚度。在另一个实施例中，本发明涉及一种系统，该系统包括用于在抛光浆料存在下对金属层进行化学机械抛光工艺的化学机械抛光工具，用于测量材料浓度的浓度监测器在至少一次抛光处理之后，在抛光浆料中包括金属层，以及控制器，用于接收测量的浓度并确定在抛光过程中除去的金属层的厚度，至少基于所测量的浓度该材料包括金属层。

49. 发明授权

US06746308B1 Dynamic lot allocation based upon wafer state characteristics, and system for accomplishing same 失效
标题翻译：基于晶片状态特性的动态批量分配以及完成相同的系统
公开(公告)号：US06746308B1
公开(公告)日：2004-06-08
申请号：US09903267
申请日：2001-07-11
申请人： Christopher A. Bode , Alexander J. Pasadyn
发明人： Christopher A. Bode , Alexander J. Pasadyn
IPC分类号： B24B4900
CPC分类号： H01L22/20
摘要： In one illustrative embodiment, the method comprises providing a plurality of wafer lots, each of the lots comprising a plurality of wafers, performing at least one process operation on at least some of the wafers in each of the plurality of lots, identifying processed wafers having similar characteristics, re-allocating the wafers to lots based upon the identified characteristics, and performing additional processing operations on the identified wafers having similar characteristics in the re-allocated lots. In one illustrative embodiment, the system comprises a first processing tool for performing processing operations on each of a plurality of wafers in each of a plurality of wafer lots, a controller for identifying processed wafers having similar characteristics and re-allocating the wafers to lots based upon the identified characteristics, and a second processing tool adapted to perform additional processing operations on the identified wafers having similar characteristics in the re-allocated lot.
摘要翻译：在一个说明性实施例中，该方法包括提供多个晶片批次，每个批次包括多个晶片，对多个批次中的每一个中的至少一些晶片执行至少一个处理操作，识别处理后的晶片具有类似的特征，基于所识别的特征将晶片重新分配到批次，以及对经重新分配的批次具有相似特征的所识别的晶片执行附加的处理操作。在一个说明性实施例中，该系统包括用于对多个晶片批次中的每一个中的多个晶片中的每一个执行处理操作的第一处理工具，用于识别具有相似特性并且将晶片重新分配给批次的处理晶片的控制器以及第二处理工具，其适于对所重新分配的批次中具有相似特征的所识别的晶片执行附加处理操作。

50. 发明授权

US06605479B1 Method of using damaged areas of a wafer for process qualifications and experiments, and system for accomplishing same 有权
标题翻译：使用晶圆的损坏区域进行工艺鉴定和实验的方法，以及完成相同的系统
公开(公告)号：US06605479B1
公开(公告)日：2003-08-12
申请号：US09917327
申请日：2001-07-27
申请人： Alexander J. Pasadyn , Christopher A. Bode
发明人： Alexander J. Pasadyn , Christopher A. Bode
IPC分类号： H01L2166
CPC分类号： H01L22/20
摘要： In one illustrative embodiment, the method comprises providing a wafer, forming a plurality of die above the wafer, identifying a plurality of good die and at least one non-useful die from the plurality of die, and performing a test process on the at least one non-useful die but not on the good die. In another aspect, the present invention is directed to a system that comprises a metrology tool for receiving a wafer having a plurality of die formed thereabove and identifying a plurality of good die and at least one non-useful die from the plurality of die formed above the wafer, and a process tool for performing a test process on the at least one non-useful die on the wafer but not on the plurality of good die.
摘要翻译：在一个说明性实施例中，该方法包括提供晶片，在晶片上形成多个管芯，从多个管芯识别出多个良好管芯和至少一个非有用管芯，以及至少在至少一个非有用的模具，但不是在好的死亡。在另一方面，本发明涉及一种系统，其包括用于接收具有在其上形成的多个模具的晶片的计量工具，并且从上述多个模具中识别多个良好模具和至少一个非有用模具所述晶片和用于对所述晶片上的所述至少一个非有用裸片执行测试处理而不在所述多个良好裸片上的处理工具。

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