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41. 发明申请

US20050193737A1 Steam engine 有权
公开(公告)号：US20050193737A1
公开(公告)日：2005-09-08
申请号：US11073483
申请日：2005-03-04
申请人： Shuzo Oda , Shinichi Yatsuzuka , Yasumasa Hagiwara , Toshiyuki Morishita
发明人： Shuzo Oda , Shinichi Yatsuzuka , Yasumasa Hagiwara , Toshiyuki Morishita
IPC分类号： F01B29/12 , F01B29/00 , F01K1/00 , F01K13/00
CPC分类号： F01K7/00 , F01K11/00 , F01K21/00
摘要： A stem engine has a fluid container, a heating device and a cooling device. The fluid container has an outer pipe having an upper closed end, and an inner pipe provided in the outer pipe and having a fluid inlet port through which the inside of the inner pipe is operatively communicated with the outside of the inner pipe. The inner pipe has a pressure control device at its lower end, and a fluid injection port at its upper end for injecting the working fluid in the inner pipe into a space defined between the inner pipe and the outer pipe, when the pressure in the inner pipe is increased. The working fluid injected into the space between the inner and outer pipes is heated and vaporized by the heating device, so that volumetric expansion of the working fluid takes place to increase fluid pressure in the fluid container. The vaporized steam is then cooled and liquidized by the cooling device and thereby the volumetric contraction takes place, so that the fluid pressure is decreased. By repeating the above volumetric expansion and contraction of the working fluid, the pressure change is given to the working fluid in the fluid container.

42. 发明授权

US6118152A Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US6118152A
公开(公告)日：2000-09-12
申请号：US181613
申请日：1998-10-28
申请人： Hitoshi Yamaguchi , Toshiyuki Morishita , Toshimasa Yamamoto
发明人： Hitoshi Yamaguchi , Toshiyuki Morishita , Toshimasa Yamamoto
IPC分类号： H01L21/02 , H01L21/331 , H01L21/336 , H01L21/762 , H01L21/8234 , H01L21/84 , H01L27/088 , H01L27/12 , H01L29/06 , H01L29/40 , H01L29/739 , H01L29/78 , H01L29/786 , H01L29/72
CPC分类号： H01L29/402 , H01L21/76264 , H01L21/84 , H01L27/1203 , H01L29/0653 , H01L29/404 , H01L29/407 , H01L29/66325 , H01L29/66681 , H01L29/7394 , H01L29/7813 , H01L29/7824 , H01L29/7835 , H01L29/78624 , H01L21/76275 , H01L21/76286
摘要： A silicon layer provided in a silicon substrate through a buried oxide film includes a silicon island partitioned by a trench. A surface of the silicon island in the trench is covered with a side wall oxide film, and LDMOS transistors are formed in the trench. A first impurity-doped polysilicon layer for applying a substrate potential is disposed between the buried oxide film and the substrate, and a second impurity-doped polysilicon layer is buried in the trench to communicate with the first impurity-doped polysilicon layer. Further, electrodes for applying the substrate potential are disposed on the second impurity-doped polysilicon layer. Accordingly, the substrate potential can be readily applied from the surface of the silicon layer.
摘要翻译：通过掩埋氧化膜设置在硅衬底中的硅层包括由沟槽分隔的硅岛。沟槽中的硅岛的表面被侧壁氧化膜覆盖，并且在沟槽中形成LDMOS晶体管。用于施加衬底电位的第一杂质掺杂多晶硅层设置在掩埋氧化膜和衬底之间，并且第二掺杂杂质的多晶硅层埋入沟槽中以与第一杂质掺杂多晶硅层连通。此外，用于施加衬底电位的电极设置在第二杂质掺杂多晶硅层上。因此，可以容易地从硅层的表面施加衬底电位。

43. 发明授权

US08835276B2 Method for manufacturing semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US08835276B2
公开(公告)日：2014-09-16
申请号：US12964141
申请日：2010-12-09
申请人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Nobuhiro Tsuji , Toshiyuki Morishita
发明人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Nobuhiro Tsuji , Toshiyuki Morishita
IPC分类号： H01L21/76 , H01L23/544 , H01L29/06 , H01L29/66 , H01L21/02
CPC分类号： H01L21/30604 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L21/02664 , H01L21/308 , H01L23/544 , H01L29/0634 , H01L29/66712 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： A semiconductor substrate is provided in which an alignment mark is formed that can be used for an alignment even after the formation of an impurity diffused layer by the planarization of an epitaxial film. A trench is formed in an alignment region of an N+-type substrate. This trench is used to leave voids after the formation of an N−-type layer. Then, the voids formed in the N+-type substrate can be used as an alignment mark. Thus, such a semiconductor substrate can be used to provide an alignment in the subsequent step of manufacturing the semiconductor apparatus. Thus, the respective components constituting the semiconductor apparatus can be formed at desired positions accurately.
摘要翻译：提供了一种半导体衬底，其中形成了即使在通过外延膜的平坦化形成杂质扩散层之后也可以用于取向的对准标记。在N +型衬底的取向区域中形成沟槽。这种沟槽用于在形成N型层之后留下空隙。然后，可以使用形成在N +型衬底中的空隙作为对准标记。因此，可以使用这样的半导体衬底在制造半导体器件的后续步骤中提供对准。因此，能够精确地形成构成半导体装置的各个部件。

44. 发明授权

US08593048B2 Electron source having a tungsten single crystal electrode 有权
标题翻译：具有钨单晶电极的电子源
公开(公告)号：US08593048B2
公开(公告)日：2013-11-26
申请号：US13695625
申请日：2010-11-30
申请人： Ryozo Nonogaki , Toshiyuki Morishita
发明人： Ryozo Nonogaki , Toshiyuki Morishita
IPC分类号： H01J1/304
CPC分类号： H01J1/15 , H01J1/304 , H01J37/06 , H01J2237/06316
摘要： Provided are an electron source which allows a high-angle current density operation even at a low extraction voltage, and reduces excess current that causes vacuum deterioration; and an electronic device using the electron source. The electron source has a cathode composed of single-crystal tungsten, and a diffusion source provided in the intermediate portion of the cathode. In the cathode, the angle between the axial direction of the cathode and orientation of the cathode is adjusted so that electrons to be emitted from the vicinity of the boundary between surface and surface formed on the tip of the cathode, are emitted substantially parallel to the axis of the cathode. The electronic device is provided with the electron source.
摘要翻译：提供了即使在低提取电压下也允许高角度电流密度操作并且减少导致真空劣化的过电流的电子源。以及使用该电子源的电子装置。电子源具有由单晶钨组成的阴极和设置在阴极的中间部分的扩散源。在阴极中，调节阴极的轴向和阴极的<100>取向之间的角度，使得从形成在阴极顶端的表面和表面之间的边界附近发射的电子基本上被发射平行于阴极的轴线。电子设备设有电子源。

45. 发明申请

US20130049568A1 ELECTRON SOURCE 有权
标题翻译：电子源
公开(公告)号：US20130049568A1
公开(公告)日：2013-02-28
申请号：US13695625
申请日：2010-11-30
申请人： Ryozo Nonogaki , Toshiyuki Morishita
发明人： Ryozo Nonogaki , Toshiyuki Morishita
IPC分类号： H01J1/304
CPC分类号： H01J1/15 , H01J1/304 , H01J37/06 , H01J2237/06316
摘要： Provided are an electron source which allows a high-angle current density operation even at a low extraction voltage, and reduces excess current that causes vacuum deterioration; and an electronic device using the electron source. The electron source has a cathode composed of single-crystal tungsten, and a diffusion source provided in the intermediate portion of the cathode. In the cathode, the angle between the axial direction of the cathode and orientation of the cathode is adjusted so that electrons to be emitted from the vicinity of the boundary between surface and surface formed on the tip of the cathode, are emitted substantially parallel to the axis of the cathode. The electronic device is provided with the electron source.
摘要翻译：提供了即使在低提取电压下也允许高角度电流密度操作并且减少导致真空劣化的过电流的电子源。以及使用该电子源的电子装置。电子源具有由单晶钨组成的阴极和设置在阴极的中间部分的扩散源。在阴极中，调节阴极的轴向和阴极的<100>取向之间的角度，使得从形成在阴极顶端的表面和表面之间的边界附近发射的电子基本上被发射平行于阴极的轴线。电子设备设有电子源。

46. 发明申请

US20120169210A1 ELECTRON-SOURCE ROD, ELECTRON SOURCE AND ELECTRONIC DEVICE 审中-公开
标题翻译：电子源，电子源和电子设备
公开(公告)号：US20120169210A1
公开(公告)日：2012-07-05
申请号：US13394703
申请日：2010-09-24
申请人： Toshiyuki Morishita
发明人： Toshiyuki Morishita
IPC分类号： H01J1/144
CPC分类号： H01J37/073 , H01J1/14 , H01J1/3044 , H01J2237/06316
摘要： An electron source is provided that operates at lower temperature and has a low work function and a narrower energy width. The electron source includes a porcelain insulator, two conductive terminals connected to the porcelain insulator, a filament formed between the conductive terminals, and a orientation single crystal rod of at least one metal selected from the group consisting of tungsten, molybdenum, tantalum and rhenium connected to the filament. The rod has an electron-emitting face formed in at its tip region with its {100} crystal face exposed. The rod further includes a diffusion source in its central region that is made of a composite oxide formed from barium oxide and scandium oxide wherein the proportion of barium oxide being 50 mol % or more of BaO and the proportion of scandium oxide being 10 to 50 mol % as Sc2O3 when the mixed oxide is prepared.
摘要翻译：提供了在较低温度下工作并具有低功函数和较窄能量宽度的电子源。电子源包括瓷绝缘体，连接到瓷绝缘体的两个导电端子，形成在导电端子之间的细丝和选自钨，钼，钽的至少一种金属的<100>取向单晶棒铼连接到灯丝上。该棒具有在其尖端区域形成的电子发射面，其{100}晶面露出。该棒还包括由氧化钡和氧化钪形成的复合氧化物构成的中心区域的扩散源，其中氧化钡的比例为50摩尔％以上的BaO，氧化钪的比例为10〜50摩尔当制备混合氧化物时为Sc2O3。

47. 发明授权

US08084011B2 Method and apparatus for manufacturing carbon nanotube 有权
标题翻译：制造碳纳米管的方法和装置
公开(公告)号：US08084011B2
公开(公告)日：2011-12-27
申请号：US12000089
申请日：2007-12-07
申请人： Yoshinobu Suzuki , Shinichi Mukainakano , Kenji Okeyui , Toshiyuki Morishita , Hisayoshi Ooshima
发明人： Yoshinobu Suzuki , Shinichi Mukainakano , Kenji Okeyui , Toshiyuki Morishita , Hisayoshi Ooshima
IPC分类号： D01C5/00
CPC分类号： B82Y30/00 , B82Y40/00 , C01B32/15 , Y10S977/842 , Y10S977/843
摘要： A carbon nanotube manufacturing method wherein a catalyst is heated in a reaction chamber while the reaction chamber is filled with argon gas containing hydrogen. When a predetermined temperature is reached in the reaction chamber, the reaction chamber is evacuated. Then a raw material gas as a carbon source is charged and sealed in the reaction chamber whereupon the synthesis of carbon nanotube begins. Subsequently, when a condition in which the synthesis of carbon nanotubes has proceeded to a predetermined level is detected, gases in the reaction chamber are exhausted. Then, the raw material gas is changed and sealed in the reaction tube again. Thereafter, the charging (synthesizing) operation and the exhausting operation are repeated until the carbon nanotube with a desired film thickness are synthesized. A carbon nanotube manufacturing apparatus is also disclosed.
摘要翻译：一种碳纳米管制造方法，其中在反应室中填充含有氢的氩气的同时，在反应室中加热催化剂。当在反应室中达到预定温度时，将反应室抽真空。然后将作为碳源的原料气体充入并密封在反应室中，由此合成碳纳米管。随后，当检测到碳纳米管的合成进行到预定水平的条件时，反应室中的气体被排出。然后，将原料气体再次变更并密封在反应管中。此后，重复充电（合成）操作和排气操作，直到合成具有所需膜厚度的碳纳米管。还公开了一种碳纳米管制造装置。

48. 发明申请

US20100278717A1 Method and apparatus for manufacturing carbon nanotube 有权
标题翻译：制造碳纳米管的方法和装置
公开(公告)号：US20100278717A1
公开(公告)日：2010-11-04
申请号：US12000089
申请日：2007-12-07
申请人： Yoshinobu Suzuki , Shinichi Mukainakano , Kenji Okeyui , Toshiyuki Morishita , Hisayoshi Ooshima
发明人： Yoshinobu Suzuki , Shinichi Mukainakano , Kenji Okeyui , Toshiyuki Morishita , Hisayoshi Ooshima
IPC分类号： D01F9/12 , C23C16/26 , C23C16/52
CPC分类号： B82Y30/00 , B82Y40/00 , C01B32/15 , Y10S977/842 , Y10S977/843
摘要： A carbon nanotube manufacturing method wherein a catalyst is heated in a reaction chamber while the reaction chamber is filled with argon gas containing hydrogen. When a predetermined temperature is reached in the reaction chamber, the reaction chamber is evacuated. Then a raw material gas as a carbon source is charged and sealed in the reaction chamber whereupon the synthesis of carbon nanotube begins. Subsequently, when a condition in which the synthesis of carbon nanotubes has proceeded to a predetermined level is detected, gases in the reaction chamber are exhausted. Then, the raw material gas is changed and sealed in the reaction tube again. Thereafter, the charging (synthesizing) operation and the exhausting operation are repeated until the carbon nanotube with a desired film thickness are synthesized. A carbon nanotube manufacturing apparatus is also disclosed
摘要翻译：一种碳纳米管制造方法，其中在反应室中填充含有氢的氩气的同时，在反应室中加热催化剂。当在反应室中达到预定温度时，将反应室抽真空。然后将作为碳源的原料气体充入并密封在反应室中，由此合成碳纳米管。随后，当检测到碳纳米管的合成进行到预定水平的条件时，反应室中的气体被排出。然后，将原料气体再次变更并密封在反应管中。此后，重复充电（合成）操作和排气操作，直到合成具有所需膜厚度的碳纳米管。还公开了一种碳纳米管制造装置

49. 发明授权

US07732821B2 Silicon carbide semiconductor device 有权
标题翻译：碳化硅半导体器件
公开(公告)号：US07732821B2
公开(公告)日：2010-06-08
申请号：US12073837
申请日：2008-03-11
申请人： Naohiro Suzuki , Tsuyoshi Yamamoto , Toshiyuki Morishita
发明人： Naohiro Suzuki , Tsuyoshi Yamamoto , Toshiyuki Morishita
IPC分类号： H01L29/72
CPC分类号： H01L29/66068 , H01L21/0465 , H01L29/0615 , H01L29/063 , H01L29/0638 , H01L29/1608 , H01L29/45 , H01L29/7828
摘要： The SiC semiconductor device includes a substrate of a first conduction type made of silicon carbide, a drift layer of the first conduction type made of silicon carbide, the drift layer being less doped than the substrate, a cell portion constituted by a part of the substrate and a part of the drift layer, a circumferential portion constituted by another part of the substrate and another part of the drift layer, the circumferential portion being formed so as to surround the cell portion, and a RESURF layer of a second conduction type formed in a surface portion of the drift layer so as to be located in the circumferential portion. The RESURF layer is constituted by first and second RESURF layers having different impurity concentrations, the second RESURF layer being in contact with an outer circumference of the first RESURF layer and extending to a circumference of the cell portion.
摘要翻译： SiC半导体器件包括由碳化硅制成的第一导电类型的衬底，由碳化硅制成的第一导电类型的漂移层，漂移层比衬底掺杂少，由衬底的一部分构成的单元部分以及漂移层的一部分，由基板的另一部分和漂移层的另一部分构成的圆周部分，周向部分形成为围绕电池部分，以及形成在第二导电类型的RESURF层漂移层的表面部分，以便位于圆周部分中。 RESURF层由具有不同杂质浓度的第一和第二RESURF层构成，第二RESURF层与第一RESURF层的外周接触并延伸到电池单元的周围。

50. 发明申请

US20090273102A1 Semiconductor Substrate and Method for Manufacturing the Same 审中-公开
标题翻译：半导体基板及其制造方法
公开(公告)号：US20090273102A1
公开(公告)日：2009-11-05
申请号：US12089497
申请日：2006-10-05
申请人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Nobuhiro Tsuji , Toshiyuki Morishita
发明人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Nobuhiro Tsuji , Toshiyuki Morishita
IPC分类号： H01L23/544 , H01L21/308
CPC分类号： H01L21/30604 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L21/02664 , H01L21/308 , H01L23/544 , H01L29/0634 , H01L29/66712 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： A semiconductor substrate is provided in which an alignment mark is formed that can be used for an aligment even after the formation of an impurity diffused layer by the planarization of an epitaxial film.A trench 11 is formed in an alignment region of an N+-type substrate 1. This trench 11 is used to leave voids 3 after the formation of an N−-type layer 2. Then, the voids 3 formed in the N+-type substrate 1 can be used as an alignment mark. Thus, such a semiconductor substrate can be used to provide an alignment in the subsequent step of manufacturing the semiconductor apparatus. Thus, the respective components constituting the semiconductor apparatus can be formed at desired positions accurately.
摘要翻译：提供了一种半导体衬底，其中形成了即使在通过外延膜的平坦化形成杂质扩散层之后也可用于分配的对准标记。在N +型衬底1的取向区域中形成沟槽11.在形成N型层2之后，该沟槽11用于留下空隙3.然后，形成在N +型衬底中的空隙3 1可用作对准标记。因此，可以使用这样的半导体衬底在制造半导体器件的后续步骤中提供对准。因此，能够精确地形成构成半导体装置的各个部件。

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