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1. 发明授权

US08835276B2 Method for manufacturing semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US08835276B2
公开(公告)日：2014-09-16
申请号：US12964141
申请日：2010-12-09
申请人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Nobuhiro Tsuji , Toshiyuki Morishita
发明人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Nobuhiro Tsuji , Toshiyuki Morishita
IPC分类号： H01L21/76 , H01L23/544 , H01L29/06 , H01L29/66 , H01L21/02
CPC分类号： H01L21/30604 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L21/02664 , H01L21/308 , H01L23/544 , H01L29/0634 , H01L29/66712 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： A semiconductor substrate is provided in which an alignment mark is formed that can be used for an alignment even after the formation of an impurity diffused layer by the planarization of an epitaxial film. A trench is formed in an alignment region of an N+-type substrate. This trench is used to leave voids after the formation of an N−-type layer. Then, the voids formed in the N+-type substrate can be used as an alignment mark. Thus, such a semiconductor substrate can be used to provide an alignment in the subsequent step of manufacturing the semiconductor apparatus. Thus, the respective components constituting the semiconductor apparatus can be formed at desired positions accurately.
摘要翻译：提供了一种半导体衬底，其中形成了即使在通过外延膜的平坦化形成杂质扩散层之后也可以用于取向的对准标记。在N +型衬底的取向区域中形成沟槽。这种沟槽用于在形成N型层之后留下空隙。然后，可以使用形成在N +型衬底中的空隙作为对准标记。因此，可以使用这样的半导体衬底在制造半导体器件的后续步骤中提供对准。因此，能够精确地形成构成半导体装置的各个部件。

2. 发明申请

US20090273102A1 Semiconductor Substrate and Method for Manufacturing the Same 审中-公开
标题翻译：半导体基板及其制造方法
公开(公告)号：US20090273102A1
公开(公告)日：2009-11-05
申请号：US12089497
申请日：2006-10-05
申请人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Nobuhiro Tsuji , Toshiyuki Morishita
发明人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Nobuhiro Tsuji , Toshiyuki Morishita
IPC分类号： H01L23/544 , H01L21/308
CPC分类号： H01L21/30604 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L21/02664 , H01L21/308 , H01L23/544 , H01L29/0634 , H01L29/66712 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： A semiconductor substrate is provided in which an alignment mark is formed that can be used for an aligment even after the formation of an impurity diffused layer by the planarization of an epitaxial film.A trench 11 is formed in an alignment region of an N+-type substrate 1. This trench 11 is used to leave voids 3 after the formation of an N−-type layer 2. Then, the voids 3 formed in the N+-type substrate 1 can be used as an alignment mark. Thus, such a semiconductor substrate can be used to provide an alignment in the subsequent step of manufacturing the semiconductor apparatus. Thus, the respective components constituting the semiconductor apparatus can be formed at desired positions accurately.
摘要翻译：提供了一种半导体衬底，其中形成了即使在通过外延膜的平坦化形成杂质扩散层之后也可用于分配的对准标记。在N +型衬底1的取向区域中形成沟槽11.在形成N型层2之后，该沟槽11用于留下空隙3.然后，形成在N +型衬底中的空隙3 1可用作对准标记。因此，可以使用这样的半导体衬底在制造半导体器件的后续步骤中提供对准。因此，能够精确地形成构成半导体装置的各个部件。

3. 发明授权

US07364980B2 Manufacturing method of semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US07364980B2
公开(公告)日：2008-04-29
申请号：US11539441
申请日：2006-10-06
申请人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Hitoshi Yamaguchi , Takumi Shibata
发明人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Hitoshi Yamaguchi , Takumi Shibata
IPC分类号： H01L21/76
CPC分类号： C30B25/165 , H01L21/02381 , H01L21/0243 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L29/0634
摘要： Closure at the opening of a trench with an epitaxial film is restrained, and thereby, filling morphology in the trenches is improved. A method for manufacturing a semiconductor substrate includes a step for growing an epitaxial layer 11 on the surface of a silicon substrate 13, a step of forming a trench 14 in this epitaxial layer, and a step of filling the inside of the trench 14 with the epitaxial film 12, wherein mixed gas made by mixing halogenoid gas into silicon source gas is circulated as material gas in filling the inside of the trench with the epitaxial film, and when the standard flow rate of the halogenoid gas is defined as Xslm and the film formation speed of the epitaxial film formed by the circulation of the silicon source gas is defined as Yμm/min, in the case when the aspect ratio of the trench is less than 10, an expression Y
摘要翻译：在具有外延膜的沟槽的开口处的闭合被抑制，从而提高了沟槽中的填充形态。一种制造半导体衬底的方法包括在硅衬底13的表面上生长外延层11的步骤，在该外延层中形成沟槽14的步骤，以及将沟槽14内部填充的步骤外延膜12，其中通过将卤素气体混入硅源气体而制成的混合气体作为原料气体循环，用外延膜填充沟槽内部，当将卤化物气体的标准流量定义为Xslm时，膜通过硅源气体的循环形成的外延膜的形成速度定义为Ymum / min，在沟槽的纵横比小于10的情况下，满足表达式Y <0.2X + 0.10，在沟槽的纵横比在10以上且小于20的情况下，满足表达式Y <0.2X + 0.05，在沟槽的纵横比为20以上的情况下，表达式Y <0.2× 满意

4. 发明申请

US20050221547A1 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20050221547A1
公开(公告)日：2005-10-06
申请号：US11094782
申请日：2005-03-31
申请人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
发明人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
IPC分类号： H01L29/06 , H01L21/20 , H01L21/205 , H01L21/336 , H01L21/338 , H01L21/8234 , H01L29/78
CPC分类号： H01L29/7813 , H01L21/823487 , H01L29/0634 , H01L29/7811
摘要： A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底中形成沟槽; 以及在包括沟槽的侧壁和底部的衬底上形成外延膜，使得外延膜填充在沟槽中。形成外延膜的步骤包括在沟槽被外延膜填充之前的最后步骤。最终步骤具有外延膜的形成条件，使得形成在沟槽的侧壁上的外延膜在沟槽的开口处的生长速率小于沟槽位置处的生长速率，其比沟槽的开口更深。

5. 发明授权

US07642178B2 Semiconductor device, method for manufacturing the same and method for evaluating the same 有权
标题翻译：半导体装置及其制造方法及其评价方法
公开(公告)号：US07642178B2
公开(公告)日：2010-01-05
申请号：US11526879
申请日：2006-09-26
申请人： Shoichi Yamauchi , Takumi Shibata , Tomonori Yamaoka , Syouji Nogami
发明人： Shoichi Yamauchi , Takumi Shibata , Tomonori Yamaoka , Syouji Nogami
IPC分类号： H01L21/00
CPC分类号： H01L29/66712 , H01L21/02381 , H01L21/02433 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02639 , H01L21/823487 , H01L29/0615 , H01L29/0634 , H01L29/1095 , H01L29/7811 , H01L29/7813
摘要： A method for manufacturing a semiconductor device includes steps of: forming a first epitaxial film on a silicon substrate; forming a trench in the first epitaxial film; and forming a second epitaxial film on the first epitaxial film and in the trench. The step of forming the second epitaxial film includes a final step, in which a mixed gas of a silicon source gas and a halide gas is used. The silicon substrate has an arsenic concentration defined as α. The second epitaxial film has an impurity concentration defined as β. The arsenic concentration and the impurity concentration has a relationship of: α≦3×1019×ln(β)−1×1021.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在硅衬底上形成第一外延膜; 在所述第一外延膜中形成沟槽; 以及在所述第一外延膜和所述沟槽中形成第二外延膜。形成第二外延膜的步骤包括使用硅源气体和卤化物气体的混合气体的最后步骤。硅衬底的砷浓度定义为α。第二外延膜具有定义为β的杂质浓度。砷浓度和杂质浓度具有以下关系：α<= 3×10 19×ln（β）-1×10 21。

6. 发明申请

US20070072398A1 Method for manufacturing semiconductor device and epitaxial growth equipment 有权
标题翻译：制造半导体器件和外延生长设备的方法
公开(公告)号：US20070072398A1
公开(公告)日：2007-03-29
申请号：US11528678
申请日：2006-09-28
申请人： Takumi Shibata , Shoichi Yamauchi , Tomonori Yamaoka , Syouji Nogami
发明人： Takumi Shibata , Shoichi Yamauchi , Tomonori Yamaoka , Syouji Nogami
IPC分类号： H01L21/20
CPC分类号： H01L29/7813 , H01L21/02381 , H01L21/0243 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/02639 , H01L29/045 , H01L29/0634 , H01L29/66734 , H01L29/7811
摘要： A method for manufacturing a semiconductor device includes steps of: forming a trench on a main surface of a silicon substrate; forming a first epitaxial film on the main surface and in the trench; and forming a second epitaxial film on the first epitaxial film. The step of forming the first epitaxial film has a first process condition with a first growth rate of the first epitaxial film. The step of forming the second epitaxial film has a second process condition with a second growth rate of the second epitaxial film. The second growth rate is larger than the first growth rate.
摘要翻译：一种制造半导体器件的方法，包括以下步骤：在硅衬底的主表面上形成沟槽; 在主表面和沟槽中形成第一外延膜; 以及在所述第一外延膜上形成第二外延膜。形成第一外延膜的步骤具有第一外延膜的第一生长速率的第一工艺条件。形成第二外延膜的步骤具有第二外延膜的第二生长速率的第二工艺条件。第二增长率大于第一增长率。

7. 再颁专利

USRE44236E1 Method for manufacturing semiconductor device 有权
公开(公告)号：USRE44236E1
公开(公告)日：2013-05-21
申请号：US13271485
申请日：2011-10-12
申请人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
发明人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
IPC分类号： H01L21/20
CPC分类号： H01L29/7813 , H01L21/823487 , H01L29/0634 , H01L29/7811
摘要： A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.

8. 发明授权

US07811907B2 Method for manufacturing semiconductor device and epitaxial growth equipment 有权
标题翻译：制造半导体器件和外延生长设备的方法
公开(公告)号：US07811907B2
公开(公告)日：2010-10-12
申请号：US11528678
申请日：2006-09-28
申请人： Takumi Shibata , Shoichi Yamauchi , Tomonori Yamaoka , Syouji Nogami
发明人： Takumi Shibata , Shoichi Yamauchi , Tomonori Yamaoka , Syouji Nogami
IPC分类号： H01L29/78 , H01L29/12 , H01L21/336 , H01L21/205
CPC分类号： H01L29/7813 , H01L21/02381 , H01L21/0243 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/02639 , H01L29/045 , H01L29/0634 , H01L29/66734 , H01L29/7811
摘要： A method for manufacturing a semiconductor device includes steps of: forming a trench on a main surface of a silicon substrate; forming a first epitaxial film on the main surface and in the trench; and forming a second epitaxial film on the first epitaxial film. The step of forming the first epitaxial film has a first process condition with a first growth rate of the first epitaxial film. The step of forming the second epitaxial film has a second process condition with a second growth rate of the second epitaxial film. The second growth rate is larger than the first growth rate.
摘要翻译：一种制造半导体器件的方法，包括以下步骤：在硅衬底的主表面上形成沟槽; 在主表面和沟槽中形成第一外延膜; 以及在所述第一外延膜上形成第二外延膜。形成第一外延膜的步骤具有第一外延膜的第一生长速率的第一工艺条件。形成第二外延膜的步骤具有第二外延膜的第二生长速率的第二工艺条件。第二增长率大于第一增长率。

9. 发明授权

US07601603B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07601603B2
公开(公告)日：2009-10-13
申请号：US11094782
申请日：2005-03-31
申请人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
发明人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
IPC分类号： H01L21/20
CPC分类号： H01L29/7813 , H01L21/823487 , H01L29/0634 , H01L29/7811
摘要： A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底中形成沟槽; 以及在包括沟槽的侧壁和底部的衬底上形成外延膜，使得外延膜填充在沟槽中。形成外延膜的步骤包括在沟槽被外延膜填充之前的最后步骤。最终步骤具有外延膜的形成条件，使得形成在沟槽的侧壁上的外延膜在沟槽的开口处的生长速率小于沟槽位置处的生长速率，其比沟槽的开口更深。

10. 发明申请

US20080001261A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR SUBSTRATE 审中-公开
标题翻译：制造半导体基板的方法
公开(公告)号：US20080001261A1
公开(公告)日：2008-01-03
申请号：US11847656
申请日：2007-08-30
申请人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Hitoshi Yamaguchi
发明人： Syouji Nogami , Tomonori Yamaoka , Shoichi Yamauchi , Hitoshi Yamaguchi
IPC分类号： H01L29/06 , H01L21/20
CPC分类号： H01L29/861 , H01L29/0634 , H01L29/6609
摘要： In order to suppress deterioration in charge balance and maintain excellent withstand voltage characteristics after forming a super junction structure on a semiconductor substrate, a plurality of columnar first epitaxial layers are respectively formed on a surface of a substrate main body at predetermined intervals, and a plurality of second epitaxial layers are respectively formed in trenches between the plurality of first epitaxial layers. A concentration distribution of a dopant included in the first epitaxial layer in a surface parallel with the surface of the substrate main body is configured to match with a concentration distribution of a dopant included in the second epitaxial layer in a surface parallel with the surface of the substrate main body.
摘要翻译：为了抑制电荷平衡的劣化，并且在半导体衬底上形成超结结构之后保持优异的耐电压特性，多个柱状第一外延层分别以预定间隔分别形成在衬底主体的表面上，并且多个的第二外延层分别形成在多个第一外延层之间的沟槽中。在与基板主体的表面平行的表面中包含在第一外延层中的掺杂剂的浓度分布被配置为与包含在第二外延层中的掺杂剂的浓度分布在与基板主体。

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